xref: /qemu/hw/mips/loongson3_bootp.c (revision f81198cefad223afc8e1ae60e9830b60e5f2d6ff)
1  /*
2   * LEFI (a UEFI-like interface for BIOS-Kernel boot parameters) helpers
3   *
4   * Copyright (c) 2018-2020 Huacai Chen (chenhc@lemote.com)
5   * Copyright (c) 2018-2020 Jiaxun Yang <jiaxun.yang@flygoat.com>
6   *
7   * This program is free software: you can redistribute it and/or modify
8   * it under the terms of the GNU General Public License as published by
9   * the Free Software Foundation, either version 2 of the License, or
10   * (at your option) any later version.
11   *
12   * This program is distributed in the hope that it will be useful,
13   * but WITHOUT ANY WARRANTY; without even the implied warranty of
14   * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15   * GNU General Public License for more details.
16   *
17   * You should have received a copy of the GNU General Public License
18   * along with this program. If not, see <https://www.gnu.org/licenses/>.
19   */
20  
21  #include "qemu/osdep.h"
22  #include "qemu/units.h"
23  #include "qemu/cutils.h"
24  #include "cpu.h"
25  #include "hw/boards.h"
26  #include "hw/mips/loongson3_bootp.h"
27  
28  static void init_cpu_info(void *g_cpuinfo, uint64_t cpu_freq)
29  {
30      struct efi_cpuinfo_loongson *c = g_cpuinfo;
31  
32      c->cputype = cpu_to_le32(Loongson_3A);
33      c->processor_id = cpu_to_le32(MIPS_CPU(first_cpu)->env.CP0_PRid);
34      if (cpu_freq > UINT_MAX) {
35          c->cpu_clock_freq = cpu_to_le32(UINT_MAX);
36      } else {
37          c->cpu_clock_freq = cpu_to_le32(cpu_freq);
38      }
39  
40      c->cpu_startup_core_id = cpu_to_le16(0);
41      c->nr_cpus = cpu_to_le32(current_machine->smp.cpus);
42      c->total_node = cpu_to_le32(DIV_ROUND_UP(current_machine->smp.cpus,
43                                               LOONGSON3_CORE_PER_NODE));
44  }
45  
46  static void init_memory_map(void *g_map, uint64_t ram_size)
47  {
48      struct efi_memory_map_loongson *emap = g_map;
49  
50      emap->nr_map = cpu_to_le32(2);
51      emap->mem_freq = cpu_to_le32(300000000);
52  
53      emap->map[0].node_id = cpu_to_le32(0);
54      emap->map[0].mem_type = cpu_to_le32(1);
55      emap->map[0].mem_start = cpu_to_le64(0x0);
56      emap->map[0].mem_size = cpu_to_le32(240);
57  
58      emap->map[1].node_id = cpu_to_le32(0);
59      emap->map[1].mem_type = cpu_to_le32(2);
60      emap->map[1].mem_start = cpu_to_le64(0x90000000);
61      emap->map[1].mem_size = cpu_to_le32((ram_size / MiB) - 256);
62  }
63  
64  static void init_system_loongson(void *g_system)
65  {
66      struct system_loongson *s = g_system;
67  
68      s->ccnuma_smp = cpu_to_le32(0);
69      s->sing_double_channel = cpu_to_le32(1);
70      s->nr_uarts = cpu_to_le32(1);
71      s->uarts[0].iotype = cpu_to_le32(2);
72      s->uarts[0].int_offset = cpu_to_le32(2);
73      s->uarts[0].uartclk = cpu_to_le32(25000000); /* Random value */
74      s->uarts[0].uart_base = cpu_to_le64(virt_memmap[VIRT_UART].base);
75  }
76  
77  static void init_irq_source(void *g_irq_source)
78  {
79      struct irq_source_routing_table *irq_info = g_irq_source;
80  
81      irq_info->node_id = cpu_to_le32(0);
82      irq_info->PIC_type = cpu_to_le32(0);
83      irq_info->dma_mask_bits = cpu_to_le16(64);
84      irq_info->pci_mem_start_addr = cpu_to_le64(virt_memmap[VIRT_PCIE_MMIO].base);
85      irq_info->pci_mem_end_addr = cpu_to_le64(virt_memmap[VIRT_PCIE_MMIO].base +
86                                               virt_memmap[VIRT_PCIE_MMIO].size - 1);
87      irq_info->pci_io_start_addr = cpu_to_le64(virt_memmap[VIRT_PCIE_PIO].base);
88  }
89  
90  static void init_interface_info(void *g_interface)
91  {
92      struct interface_info *interface = g_interface;
93  
94      interface->vers = cpu_to_le16(0x01);
95      strpadcpy(interface->description, 64, "UEFI_Version_v1.0", '\0');
96  }
97  
98  static void board_devices_info(void *g_board)
99  {
100      struct board_devices *bd = g_board;
101  
102      strpadcpy(bd->name, 64, "Loongson-3A-VIRT-1w-V1.00-demo", '\0');
103  }
104  
105  static void init_special_info(void *g_special)
106  {
107      struct loongson_special_attribute *special = g_special;
108  
109      strpadcpy(special->special_name, 64, "2018-05-01", '\0');
110  }
111  
112  void init_loongson_params(struct loongson_params *lp, void *p,
113                            uint64_t cpu_freq, uint64_t ram_size)
114  {
115      init_cpu_info(p, cpu_freq);
116      lp->cpu_offset = cpu_to_le64((uintptr_t)p - (uintptr_t)lp);
117      p += ROUND_UP(sizeof(struct efi_cpuinfo_loongson), 64);
118  
119      init_memory_map(p, ram_size);
120      lp->memory_offset = cpu_to_le64((uintptr_t)p - (uintptr_t)lp);
121      p += ROUND_UP(sizeof(struct efi_memory_map_loongson), 64);
122  
123      init_system_loongson(p);
124      lp->system_offset = cpu_to_le64((uintptr_t)p - (uintptr_t)lp);
125      p += ROUND_UP(sizeof(struct system_loongson), 64);
126  
127      init_irq_source(p);
128      lp->irq_offset = cpu_to_le64((uintptr_t)p - (uintptr_t)lp);
129      p += ROUND_UP(sizeof(struct irq_source_routing_table), 64);
130  
131      init_interface_info(p);
132      lp->interface_offset = cpu_to_le64((uintptr_t)p - (uintptr_t)lp);
133      p += ROUND_UP(sizeof(struct interface_info), 64);
134  
135      board_devices_info(p);
136      lp->boarddev_table_offset = cpu_to_le64((uintptr_t)p - (uintptr_t)lp);
137      p += ROUND_UP(sizeof(struct board_devices), 64);
138  
139      init_special_info(p);
140      lp->special_offset = cpu_to_le64((uintptr_t)p - (uintptr_t)lp);
141      p += ROUND_UP(sizeof(struct loongson_special_attribute), 64);
142  }
143  
144  void init_reset_system(struct efi_reset_system_t *reset)
145  {
146      reset->Shutdown = cpu_to_le64(0xffffffffbfc000a8);
147      reset->ResetCold = cpu_to_le64(0xffffffffbfc00080);
148      reset->ResetWarm = cpu_to_le64(0xffffffffbfc00080);
149      reset->DoSuspend = cpu_to_le64(0xffffffffbfc000d0);
150  }
151