xref: /qemu/hw/microblaze/petalogix_ml605_mmu.c (revision 0d09e41a51aa0752b1ce525ce084f7cd210e461b)
100914b7dSMichal Simek /*
200914b7dSMichal Simek  * Model of Petalogix linux reference design targeting Xilinx Spartan ml605
300914b7dSMichal Simek  * board.
400914b7dSMichal Simek  *
500914b7dSMichal Simek  * Copyright (c) 2011 Michal Simek <monstr@monstr.eu>
600914b7dSMichal Simek  * Copyright (c) 2011 PetaLogix
700914b7dSMichal Simek  * Copyright (c) 2009 Edgar E. Iglesias.
800914b7dSMichal Simek  *
900914b7dSMichal Simek  * Permission is hereby granted, free of charge, to any person obtaining a copy
1000914b7dSMichal Simek  * of this software and associated documentation files (the "Software"), to deal
1100914b7dSMichal Simek  * in the Software without restriction, including without limitation the rights
1200914b7dSMichal Simek  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
1300914b7dSMichal Simek  * copies of the Software, and to permit persons to whom the Software is
1400914b7dSMichal Simek  * furnished to do so, subject to the following conditions:
1500914b7dSMichal Simek  *
1600914b7dSMichal Simek  * The above copyright notice and this permission notice shall be included in
1700914b7dSMichal Simek  * all copies or substantial portions of the Software.
1800914b7dSMichal Simek  *
1900914b7dSMichal Simek  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
2000914b7dSMichal Simek  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
2100914b7dSMichal Simek  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
2200914b7dSMichal Simek  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
2300914b7dSMichal Simek  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
2400914b7dSMichal Simek  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
2500914b7dSMichal Simek  * THE SOFTWARE.
2600914b7dSMichal Simek  */
2700914b7dSMichal Simek 
2883c9f4caSPaolo Bonzini #include "hw/sysbus.h"
2983c9f4caSPaolo Bonzini #include "hw/hw.h"
301422e32dSPaolo Bonzini #include "net/net.h"
31*0d09e41aSPaolo Bonzini #include "hw/block/flash.h"
329c17d615SPaolo Bonzini #include "sysemu/sysemu.h"
33*0d09e41aSPaolo Bonzini #include "hw/arm/devices.h"
3483c9f4caSPaolo Bonzini #include "hw/boards.h"
3583c9f4caSPaolo Bonzini #include "hw/xilinx.h"
369c17d615SPaolo Bonzini #include "sysemu/blockdev.h"
37*0d09e41aSPaolo Bonzini #include "hw/char/serial.h"
38022c62cbSPaolo Bonzini #include "exec/address-spaces.h"
3983c9f4caSPaolo Bonzini #include "hw/ssi.h"
4000914b7dSMichal Simek 
4183c9f4caSPaolo Bonzini #include "hw/microblaze_boot.h"
4283c9f4caSPaolo Bonzini #include "hw/microblaze_pic_cpu.h"
43669b4983SPeter A. G. Crosthwaite 
4483c9f4caSPaolo Bonzini #include "hw/stream.h"
4500914b7dSMichal Simek 
4600914b7dSMichal Simek #define LMB_BRAM_SIZE  (128 * 1024)
4700914b7dSMichal Simek #define FLASH_SIZE     (32 * 1024 * 1024)
4800914b7dSMichal Simek 
49d94e7434SPeter A. G. Crosthwaite #define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb"
5000914b7dSMichal Simek 
51acd3b6beSPeter A. G. Crosthwaite #define NUM_SPI_FLASHES 4
52acd3b6beSPeter A. G. Crosthwaite 
53d94e7434SPeter A. G. Crosthwaite #define MEMORY_BASEADDR 0x50000000
54d94e7434SPeter A. G. Crosthwaite #define FLASH_BASEADDR 0x86000000
55d94e7434SPeter A. G. Crosthwaite #define INTC_BASEADDR 0x81800000
56d94e7434SPeter A. G. Crosthwaite #define TIMER_BASEADDR 0x83c00000
57d94e7434SPeter A. G. Crosthwaite #define UART16550_BASEADDR 0x83e00000
58d94e7434SPeter A. G. Crosthwaite #define AXIENET_BASEADDR 0x82780000
59d94e7434SPeter A. G. Crosthwaite #define AXIDMA_BASEADDR 0x84600000
6000914b7dSMichal Simek 
61bf494367SAndreas Färber static void machine_cpu_reset(MicroBlazeCPU *cpu)
62d94e7434SPeter A. G. Crosthwaite {
63bf494367SAndreas Färber     CPUMBState *env = &cpu->env;
64bf494367SAndreas Färber 
6500914b7dSMichal Simek     env->pvr.regs[10] = 0x0e000000; /* virtex 6 */
6600914b7dSMichal Simek     /* setup pvr to match kernel setting */
6700914b7dSMichal Simek     env->pvr.regs[5] |= PVR5_DCACHE_WRITEBACK_MASK;
6800914b7dSMichal Simek     env->pvr.regs[0] |= PVR0_USE_FPU_MASK | PVR0_ENDI;
6900914b7dSMichal Simek     env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8);
7000914b7dSMichal Simek     env->pvr.regs[2] ^= PVR2_USE_FPU2_MASK;
7100914b7dSMichal Simek     env->pvr.regs[4] = 0xc56b8000;
7200914b7dSMichal Simek     env->pvr.regs[5] = 0xc56be000;
7300914b7dSMichal Simek }
7400914b7dSMichal Simek 
7500914b7dSMichal Simek static void
765f072e1fSEduardo Habkost petalogix_ml605_init(QEMUMachineInitArgs *args)
7700914b7dSMichal Simek {
785f072e1fSEduardo Habkost     ram_addr_t ram_size = args->ram_size;
795f072e1fSEduardo Habkost     const char *cpu_model = args->cpu_model;
8039186d8aSRichard Henderson     MemoryRegion *address_space_mem = get_system_memory();
81669b4983SPeter A. G. Crosthwaite     DeviceState *dev, *dma, *eth0;
82a9480e5dSAndreas Färber     MicroBlazeCPU *cpu;
83acd3b6beSPeter A. G. Crosthwaite     SysBusDevice *busdev;
84ee118507SAndreas Färber     CPUMBState *env;
8500914b7dSMichal Simek     DriveInfo *dinfo;
8600914b7dSMichal Simek     int i;
87a8170e5eSAvi Kivity     hwaddr ddr_base = MEMORY_BASEADDR;
88d7973c77SAvi Kivity     MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
89d7973c77SAvi Kivity     MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
9000914b7dSMichal Simek     qemu_irq irq[32], *cpu_irq;
9100914b7dSMichal Simek 
9200914b7dSMichal Simek     /* init CPUs */
9300914b7dSMichal Simek     if (cpu_model == NULL) {
9400914b7dSMichal Simek         cpu_model = "microblaze";
9500914b7dSMichal Simek     }
96a9480e5dSAndreas Färber     cpu = cpu_mb_init(cpu_model);
97a9480e5dSAndreas Färber     env = &cpu->env;
9800914b7dSMichal Simek 
9900914b7dSMichal Simek     /* Attach emulated BRAM through the LMB.  */
100c5705a77SAvi Kivity     memory_region_init_ram(phys_lmb_bram, "petalogix_ml605.lmb_bram",
10100914b7dSMichal Simek                            LMB_BRAM_SIZE);
102c5705a77SAvi Kivity     vmstate_register_ram_global(phys_lmb_bram);
103d7973c77SAvi Kivity     memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);
10400914b7dSMichal Simek 
105c5705a77SAvi Kivity     memory_region_init_ram(phys_ram, "petalogix_ml605.ram", ram_size);
106c5705a77SAvi Kivity     vmstate_register_ram_global(phys_ram);
107d7973c77SAvi Kivity     memory_region_add_subregion(address_space_mem, ddr_base, phys_ram);
10800914b7dSMichal Simek 
10900914b7dSMichal Simek     dinfo = drive_get(IF_PFLASH, 0, 0);
11000914b7dSMichal Simek     /* 5th parameter 2 means bank-width
11100914b7dSMichal Simek      * 10th paremeter 0 means little-endian */
112cfe5f011SAvi Kivity     pflash_cfi01_register(FLASH_BASEADDR,
113cfe5f011SAvi Kivity                           NULL, "petalogix_ml605.flash", FLASH_SIZE,
11400914b7dSMichal Simek                           dinfo ? dinfo->bdrv : NULL, (64 * 1024),
11500914b7dSMichal Simek                           FLASH_SIZE >> 16,
11601e0451aSAnthony Liguori                           2, 0x89, 0x18, 0x0000, 0x0, 0);
11700914b7dSMichal Simek 
11800914b7dSMichal Simek 
11900914b7dSMichal Simek     cpu_irq = microblaze_pic_init_cpu(env);
12000914b7dSMichal Simek     dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 4);
12100914b7dSMichal Simek     for (i = 0; i < 32; i++) {
12200914b7dSMichal Simek         irq[i] = qdev_get_gpio_in(dev, i);
12300914b7dSMichal Simek     }
12400914b7dSMichal Simek 
12539186d8aSRichard Henderson     serial_mm_init(address_space_mem, UART16550_BASEADDR + 0x1000, 2,
12639186d8aSRichard Henderson                    irq[5], 115200, serial_hds[0], DEVICE_LITTLE_ENDIAN);
12700914b7dSMichal Simek 
12800914b7dSMichal Simek     /* 2 timers at irq 2 @ 100 Mhz.  */
129abe098e4SPeter A. G. Crosthwaite     xilinx_timer_create(TIMER_BASEADDR, irq[2], 0, 100 * 1000000);
13000914b7dSMichal Simek 
131669b4983SPeter A. G. Crosthwaite     /* axi ethernet and dma initialization. */
132dada5c7eSPeter Crosthwaite     qemu_check_nic_model(&nd_table[0], "xlnx.axi-ethernet");
133dada5c7eSPeter Crosthwaite     eth0 = qdev_create(NULL, "xlnx.axi-ethernet");
134669b4983SPeter A. G. Crosthwaite     dma = qdev_create(NULL, "xlnx.axi-dma");
13500914b7dSMichal Simek 
136669b4983SPeter A. G. Crosthwaite     /* FIXME: attach to the sysbus instead */
137669b4983SPeter A. G. Crosthwaite     object_property_add_child(container_get(qdev_get_machine(), "/unattached"),
138669b4983SPeter A. G. Crosthwaite                                   "xilinx-dma", OBJECT(dma), NULL);
139669b4983SPeter A. G. Crosthwaite 
140dada5c7eSPeter Crosthwaite     xilinx_axiethernet_init(eth0, &nd_table[0], STREAM_SLAVE(dma),
141669b4983SPeter A. G. Crosthwaite                                    0x82780000, irq[3], 0x1000, 0x1000);
142669b4983SPeter A. G. Crosthwaite 
1437ce4106cSPeter Crosthwaite     xilinx_axidma_init(dma, STREAM_SLAVE(eth0), 0x84600000, irq[1], irq[0],
1447ce4106cSPeter Crosthwaite                        100 * 1000000);
14500914b7dSMichal Simek 
146acd3b6beSPeter A. G. Crosthwaite     {
147acd3b6beSPeter A. G. Crosthwaite         SSIBus *spi;
148acd3b6beSPeter A. G. Crosthwaite 
149acd3b6beSPeter A. G. Crosthwaite         dev = qdev_create(NULL, "xlnx.xps-spi");
150acd3b6beSPeter A. G. Crosthwaite         qdev_prop_set_uint8(dev, "num-ss-bits", NUM_SPI_FLASHES);
151acd3b6beSPeter A. G. Crosthwaite         qdev_init_nofail(dev);
1521356b98dSAndreas Färber         busdev = SYS_BUS_DEVICE(dev);
153acd3b6beSPeter A. G. Crosthwaite         sysbus_mmio_map(busdev, 0, 0x40a00000);
154acd3b6beSPeter A. G. Crosthwaite         sysbus_connect_irq(busdev, 0, irq[4]);
155acd3b6beSPeter A. G. Crosthwaite 
156acd3b6beSPeter A. G. Crosthwaite         spi = (SSIBus *)qdev_get_child_bus(dev, "spi");
157acd3b6beSPeter A. G. Crosthwaite 
158acd3b6beSPeter A. G. Crosthwaite         for (i = 0; i < NUM_SPI_FLASHES; i++) {
159acd3b6beSPeter A. G. Crosthwaite             qemu_irq cs_line;
160acd3b6beSPeter A. G. Crosthwaite 
161e641080fSPeter Crosthwaite             dev = ssi_create_slave(spi, "n25q128");
162acd3b6beSPeter A. G. Crosthwaite             cs_line = qdev_get_gpio_in(dev, 0);
163acd3b6beSPeter A. G. Crosthwaite             sysbus_connect_irq(busdev, i+1, cs_line);
164acd3b6beSPeter A. G. Crosthwaite         }
165acd3b6beSPeter A. G. Crosthwaite     }
166acd3b6beSPeter A. G. Crosthwaite 
167bf494367SAndreas Färber     microblaze_load_kernel(cpu, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE,
168d94e7434SPeter A. G. Crosthwaite                                                             machine_cpu_reset);
16900914b7dSMichal Simek 
17000914b7dSMichal Simek }
17100914b7dSMichal Simek 
17200914b7dSMichal Simek static QEMUMachine petalogix_ml605_machine = {
17300914b7dSMichal Simek     .name = "petalogix-ml605",
17400914b7dSMichal Simek     .desc = "PetaLogix linux refdesign for xilinx ml605 little endian",
17500914b7dSMichal Simek     .init = petalogix_ml605_init,
176e4ada29eSAvik Sil     .is_default = 0,
177e4ada29eSAvik Sil     DEFAULT_MACHINE_OPTIONS,
17800914b7dSMichal Simek };
17900914b7dSMichal Simek 
18000914b7dSMichal Simek static void petalogix_ml605_machine_init(void)
18100914b7dSMichal Simek {
18200914b7dSMichal Simek     qemu_register_machine(&petalogix_ml605_machine);
18300914b7dSMichal Simek }
18400914b7dSMichal Simek 
18500914b7dSMichal Simek machine_init(petalogix_ml605_machine_init);
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