1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * QEMU loongson 3a5000 develop board emulation 4 * 5 * Copyright (c) 2021 Loongson Technology Corporation Limited 6 */ 7 #include "qemu/osdep.h" 8 #include "qemu/units.h" 9 #include "qemu/datadir.h" 10 #include "qapi/error.h" 11 #include "hw/boards.h" 12 #include "hw/char/serial-mm.h" 13 #include "system/kvm.h" 14 #include "system/tcg.h" 15 #include "system/system.h" 16 #include "system/qtest.h" 17 #include "system/runstate.h" 18 #include "system/reset.h" 19 #include "system/rtc.h" 20 #include "hw/loongarch/virt.h" 21 #include "exec/address-spaces.h" 22 #include "hw/irq.h" 23 #include "net/net.h" 24 #include "hw/loader.h" 25 #include "elf.h" 26 #include "hw/intc/loongarch_ipi.h" 27 #include "hw/intc/loongarch_extioi.h" 28 #include "hw/intc/loongarch_pch_pic.h" 29 #include "hw/intc/loongarch_pch_msi.h" 30 #include "hw/pci-host/ls7a.h" 31 #include "hw/pci-host/gpex.h" 32 #include "hw/misc/unimp.h" 33 #include "hw/loongarch/fw_cfg.h" 34 #include "target/loongarch/cpu.h" 35 #include "hw/firmware/smbios.h" 36 #include "qapi/qapi-visit-common.h" 37 #include "hw/acpi/generic_event_device.h" 38 #include "hw/mem/nvdimm.h" 39 #include "hw/platform-bus.h" 40 #include "hw/display/ramfb.h" 41 #include "hw/mem/pc-dimm.h" 42 #include "system/tpm.h" 43 #include "system/block-backend.h" 44 #include "hw/block/flash.h" 45 #include "hw/virtio/virtio-iommu.h" 46 #include "qemu/error-report.h" 47 48 static void virt_get_veiointc(Object *obj, Visitor *v, const char *name, 49 void *opaque, Error **errp) 50 { 51 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 52 OnOffAuto veiointc = lvms->veiointc; 53 54 visit_type_OnOffAuto(v, name, &veiointc, errp); 55 } 56 57 static void virt_set_veiointc(Object *obj, Visitor *v, const char *name, 58 void *opaque, Error **errp) 59 { 60 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 61 62 visit_type_OnOffAuto(v, name, &lvms->veiointc, errp); 63 } 64 65 static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, 66 const char *name, 67 const char *alias_prop_name) 68 { 69 DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); 70 71 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); 72 qdev_prop_set_uint8(dev, "width", 4); 73 qdev_prop_set_uint8(dev, "device-width", 2); 74 qdev_prop_set_bit(dev, "big-endian", false); 75 qdev_prop_set_uint16(dev, "id0", 0x89); 76 qdev_prop_set_uint16(dev, "id1", 0x18); 77 qdev_prop_set_uint16(dev, "id2", 0x00); 78 qdev_prop_set_uint16(dev, "id3", 0x00); 79 qdev_prop_set_string(dev, "name", name); 80 object_property_add_child(OBJECT(lvms), name, OBJECT(dev)); 81 object_property_add_alias(OBJECT(lvms), alias_prop_name, 82 OBJECT(dev), "drive"); 83 return PFLASH_CFI01(dev); 84 } 85 86 static void virt_flash_create(LoongArchVirtMachineState *lvms) 87 { 88 lvms->flash[0] = virt_flash_create1(lvms, "virt.flash0", "pflash0"); 89 lvms->flash[1] = virt_flash_create1(lvms, "virt.flash1", "pflash1"); 90 } 91 92 static void virt_flash_map1(PFlashCFI01 *flash, 93 hwaddr base, hwaddr size, 94 MemoryRegion *sysmem) 95 { 96 DeviceState *dev = DEVICE(flash); 97 BlockBackend *blk; 98 hwaddr real_size = size; 99 100 blk = pflash_cfi01_get_blk(flash); 101 if (blk) { 102 real_size = blk_getlength(blk); 103 assert(real_size && real_size <= size); 104 } 105 106 assert(QEMU_IS_ALIGNED(real_size, VIRT_FLASH_SECTOR_SIZE)); 107 assert(real_size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX); 108 109 qdev_prop_set_uint32(dev, "num-blocks", real_size / VIRT_FLASH_SECTOR_SIZE); 110 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 111 memory_region_add_subregion(sysmem, base, 112 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); 113 } 114 115 static void virt_flash_map(LoongArchVirtMachineState *lvms, 116 MemoryRegion *sysmem) 117 { 118 PFlashCFI01 *flash0 = lvms->flash[0]; 119 PFlashCFI01 *flash1 = lvms->flash[1]; 120 121 virt_flash_map1(flash0, VIRT_FLASH0_BASE, VIRT_FLASH0_SIZE, sysmem); 122 virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem); 123 } 124 125 static void virt_build_smbios(LoongArchVirtMachineState *lvms) 126 { 127 MachineState *ms = MACHINE(lvms); 128 MachineClass *mc = MACHINE_GET_CLASS(lvms); 129 uint8_t *smbios_tables, *smbios_anchor; 130 size_t smbios_tables_len, smbios_anchor_len; 131 const char *product = "QEMU Virtual Machine"; 132 133 if (!lvms->fw_cfg) { 134 return; 135 } 136 137 smbios_set_defaults("QEMU", product, mc->name); 138 139 smbios_get_tables(ms, SMBIOS_ENTRY_POINT_TYPE_64, 140 NULL, 0, 141 &smbios_tables, &smbios_tables_len, 142 &smbios_anchor, &smbios_anchor_len, &error_fatal); 143 144 if (smbios_anchor) { 145 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-tables", 146 smbios_tables, smbios_tables_len); 147 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-anchor", 148 smbios_anchor, smbios_anchor_len); 149 } 150 } 151 152 static void virt_done(Notifier *notifier, void *data) 153 { 154 LoongArchVirtMachineState *lvms = container_of(notifier, 155 LoongArchVirtMachineState, machine_done); 156 virt_build_smbios(lvms); 157 virt_acpi_setup(lvms); 158 virt_fdt_setup(lvms); 159 } 160 161 static void virt_powerdown_req(Notifier *notifier, void *opaque) 162 { 163 LoongArchVirtMachineState *s; 164 165 s = container_of(notifier, LoongArchVirtMachineState, powerdown_notifier); 166 acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS); 167 } 168 169 static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type) 170 { 171 /* Ensure there are no duplicate entries. */ 172 for (unsigned i = 0; i < memmap_entries; i++) { 173 assert(memmap_table[i].address != address); 174 } 175 176 memmap_table = g_renew(struct memmap_entry, memmap_table, 177 memmap_entries + 1); 178 memmap_table[memmap_entries].address = cpu_to_le64(address); 179 memmap_table[memmap_entries].length = cpu_to_le64(length); 180 memmap_table[memmap_entries].type = cpu_to_le32(type); 181 memmap_table[memmap_entries].reserved = 0; 182 memmap_entries++; 183 } 184 185 static DeviceState *create_acpi_ged(DeviceState *pch_pic, 186 LoongArchVirtMachineState *lvms) 187 { 188 DeviceState *dev; 189 MachineState *ms = MACHINE(lvms); 190 MachineClass *mc = MACHINE_GET_CLASS(lvms); 191 uint32_t event = ACPI_GED_PWR_DOWN_EVT; 192 193 if (ms->ram_slots) { 194 event |= ACPI_GED_MEM_HOTPLUG_EVT; 195 } 196 197 if (mc->has_hotpluggable_cpus) { 198 event |= ACPI_GED_CPU_HOTPLUG_EVT; 199 } 200 201 dev = qdev_new(TYPE_ACPI_GED); 202 qdev_prop_set_uint32(dev, "ged-event", event); 203 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 204 205 /* ged event */ 206 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VIRT_GED_EVT_ADDR); 207 /* memory hotplug */ 208 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, VIRT_GED_MEM_ADDR); 209 /* ged regs used for reset and power down */ 210 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR); 211 212 if (mc->has_hotpluggable_cpus) { 213 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 3, VIRT_GED_CPUHP_ADDR); 214 } 215 216 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 217 qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE)); 218 return dev; 219 } 220 221 static DeviceState *create_platform_bus(DeviceState *pch_pic) 222 { 223 DeviceState *dev; 224 SysBusDevice *sysbus; 225 int i, irq; 226 MemoryRegion *sysmem = get_system_memory(); 227 228 dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); 229 dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); 230 qdev_prop_set_uint32(dev, "num_irqs", VIRT_PLATFORM_BUS_NUM_IRQS); 231 qdev_prop_set_uint32(dev, "mmio_size", VIRT_PLATFORM_BUS_SIZE); 232 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 233 234 sysbus = SYS_BUS_DEVICE(dev); 235 for (i = 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) { 236 irq = VIRT_PLATFORM_BUS_IRQ - VIRT_GSI_BASE + i; 237 sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(pch_pic, irq)); 238 } 239 240 memory_region_add_subregion(sysmem, 241 VIRT_PLATFORM_BUS_BASEADDRESS, 242 sysbus_mmio_get_region(sysbus, 0)); 243 return dev; 244 } 245 246 static void virt_devices_init(DeviceState *pch_pic, 247 LoongArchVirtMachineState *lvms) 248 { 249 MachineClass *mc = MACHINE_GET_CLASS(lvms); 250 DeviceState *gpex_dev; 251 SysBusDevice *d; 252 PCIBus *pci_bus; 253 MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg; 254 MemoryRegion *mmio_alias, *mmio_reg; 255 int i; 256 257 gpex_dev = qdev_new(TYPE_GPEX_HOST); 258 d = SYS_BUS_DEVICE(gpex_dev); 259 sysbus_realize_and_unref(d, &error_fatal); 260 pci_bus = PCI_HOST_BRIDGE(gpex_dev)->bus; 261 lvms->pci_bus = pci_bus; 262 263 /* Map only part size_ecam bytes of ECAM space */ 264 ecam_alias = g_new0(MemoryRegion, 1); 265 ecam_reg = sysbus_mmio_get_region(d, 0); 266 memory_region_init_alias(ecam_alias, OBJECT(gpex_dev), "pcie-ecam", 267 ecam_reg, 0, VIRT_PCI_CFG_SIZE); 268 memory_region_add_subregion(get_system_memory(), VIRT_PCI_CFG_BASE, 269 ecam_alias); 270 271 /* Map PCI mem space */ 272 mmio_alias = g_new0(MemoryRegion, 1); 273 mmio_reg = sysbus_mmio_get_region(d, 1); 274 memory_region_init_alias(mmio_alias, OBJECT(gpex_dev), "pcie-mmio", 275 mmio_reg, VIRT_PCI_MEM_BASE, VIRT_PCI_MEM_SIZE); 276 memory_region_add_subregion(get_system_memory(), VIRT_PCI_MEM_BASE, 277 mmio_alias); 278 279 /* Map PCI IO port space. */ 280 pio_alias = g_new0(MemoryRegion, 1); 281 pio_reg = sysbus_mmio_get_region(d, 2); 282 memory_region_init_alias(pio_alias, OBJECT(gpex_dev), "pcie-io", pio_reg, 283 VIRT_PCI_IO_OFFSET, VIRT_PCI_IO_SIZE); 284 memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE, 285 pio_alias); 286 287 for (i = 0; i < PCI_NUM_PINS; i++) { 288 sysbus_connect_irq(d, i, 289 qdev_get_gpio_in(pch_pic, 16 + i)); 290 gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); 291 } 292 293 /* 294 * Create uart fdt node in reverse order so that they appear 295 * in the finished device tree lowest address first 296 */ 297 for (i = VIRT_UART_COUNT; i-- > 0;) { 298 hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; 299 int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE; 300 serial_mm_init(get_system_memory(), base, 0, 301 qdev_get_gpio_in(pch_pic, irq), 302 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); 303 } 304 305 /* Network init */ 306 pci_init_nic_devices(pci_bus, mc->default_nic); 307 308 /* 309 * There are some invalid guest memory access. 310 * Create some unimplemented devices to emulate this. 311 */ 312 create_unimplemented_device("pci-dma-cfg", 0x1001041c, 0x4); 313 sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, 314 qdev_get_gpio_in(pch_pic, 315 VIRT_RTC_IRQ - VIRT_GSI_BASE)); 316 317 /* acpi ged */ 318 lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); 319 /* platform bus */ 320 lvms->platform_bus_dev = create_platform_bus(pch_pic); 321 } 322 323 static void virt_cpu_irq_init(LoongArchVirtMachineState *lvms) 324 { 325 int num; 326 MachineState *ms = MACHINE(lvms); 327 MachineClass *mc = MACHINE_GET_CLASS(ms); 328 const CPUArchIdList *possible_cpus; 329 CPUState *cs; 330 331 /* cpu nodes */ 332 possible_cpus = mc->possible_cpu_arch_ids(ms); 333 for (num = 0; num < possible_cpus->len; num++) { 334 cs = possible_cpus->cpus[num].cpu; 335 if (cs == NULL) { 336 continue; 337 } 338 339 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), DEVICE(cs), 340 &error_abort); 341 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), DEVICE(cs), 342 &error_abort); 343 } 344 } 345 346 static void virt_irq_init(LoongArchVirtMachineState *lvms) 347 { 348 DeviceState *pch_pic, *pch_msi; 349 DeviceState *ipi, *extioi; 350 SysBusDevice *d; 351 int i, start, num; 352 353 /* 354 * Extended IRQ model. 355 * | 356 * +-----------+ +-------------|--------+ +-----------+ 357 * | IPI/Timer | --> | CPUINTC(0-3)|(4-255) | <-- | IPI/Timer | 358 * +-----------+ +-------------|--------+ +-----------+ 359 * ^ | 360 * | 361 * +---------+ 362 * | EIOINTC | 363 * +---------+ 364 * ^ ^ 365 * | | 366 * +---------+ +---------+ 367 * | PCH-PIC | | PCH-MSI | 368 * +---------+ +---------+ 369 * ^ ^ ^ 370 * | | | 371 * +--------+ +---------+ +---------+ 372 * | UARTs | | Devices | | Devices | 373 * +--------+ +---------+ +---------+ 374 * 375 * Virt extended IRQ model. 376 * 377 * +-----+ +---------------+ +-------+ 378 * | IPI |--> | CPUINTC(0-255)| <-- | Timer | 379 * +-----+ +---------------+ +-------+ 380 * ^ 381 * | 382 * +-----------+ 383 * | V-EIOINTC | 384 * +-----------+ 385 * ^ ^ 386 * | | 387 * +---------+ +---------+ 388 * | PCH-PIC | | PCH-MSI | 389 * +---------+ +---------+ 390 * ^ ^ ^ 391 * | | | 392 * +--------+ +---------+ +---------+ 393 * | UARTs | | Devices | | Devices | 394 * +--------+ +---------+ +---------+ 395 */ 396 397 /* Create IPI device */ 398 ipi = qdev_new(TYPE_LOONGARCH_IPI); 399 lvms->ipi = ipi; 400 sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); 401 402 /* IPI iocsr memory region */ 403 memory_region_add_subregion(&lvms->system_iocsr, SMP_IPI_MAILBOX, 404 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0)); 405 memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, 406 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); 407 408 /* Create EXTIOI device */ 409 extioi = qdev_new(TYPE_LOONGARCH_EXTIOI); 410 lvms->extioi = extioi; 411 if (virt_is_veiointc_enabled(lvms)) { 412 qdev_prop_set_bit(extioi, "has-virtualization-extension", true); 413 } 414 sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal); 415 memory_region_add_subregion(&lvms->system_iocsr, APIC_BASE, 416 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); 417 if (virt_is_veiointc_enabled(lvms)) { 418 memory_region_add_subregion(&lvms->system_iocsr, EXTIOI_VIRT_BASE, 419 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 1)); 420 } 421 422 virt_cpu_irq_init(lvms); 423 pch_pic = qdev_new(TYPE_LOONGARCH_PIC); 424 num = VIRT_PCH_PIC_IRQ_NUM; 425 qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); 426 d = SYS_BUS_DEVICE(pch_pic); 427 sysbus_realize_and_unref(d, &error_fatal); 428 memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE, 429 sysbus_mmio_get_region(d, 0)); 430 memory_region_add_subregion(get_system_memory(), 431 VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY_OFFSET, 432 sysbus_mmio_get_region(d, 1)); 433 memory_region_add_subregion(get_system_memory(), 434 VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS_LO, 435 sysbus_mmio_get_region(d, 2)); 436 437 /* Connect pch_pic irqs to extioi */ 438 for (i = 0; i < num; i++) { 439 qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); 440 } 441 442 pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); 443 start = num; 444 num = EXTIOI_IRQS - start; 445 qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); 446 qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); 447 d = SYS_BUS_DEVICE(pch_msi); 448 sysbus_realize_and_unref(d, &error_fatal); 449 sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW); 450 for (i = 0; i < num; i++) { 451 /* Connect pch_msi irqs to extioi */ 452 qdev_connect_gpio_out(DEVICE(d), i, 453 qdev_get_gpio_in(extioi, i + start)); 454 } 455 456 virt_devices_init(pch_pic, lvms); 457 } 458 459 static void virt_firmware_init(LoongArchVirtMachineState *lvms) 460 { 461 char *filename = MACHINE(lvms)->firmware; 462 char *bios_name = NULL; 463 int bios_size, i; 464 BlockBackend *pflash_blk0; 465 MemoryRegion *mr; 466 467 lvms->bios_loaded = false; 468 469 /* Map legacy -drive if=pflash to machine properties */ 470 for (i = 0; i < ARRAY_SIZE(lvms->flash); i++) { 471 pflash_cfi01_legacy_drive(lvms->flash[i], 472 drive_get(IF_PFLASH, 0, i)); 473 } 474 475 virt_flash_map(lvms, get_system_memory()); 476 477 pflash_blk0 = pflash_cfi01_get_blk(lvms->flash[0]); 478 479 if (pflash_blk0) { 480 if (filename) { 481 error_report("cannot use both '-bios' and '-drive if=pflash'" 482 "options at once"); 483 exit(1); 484 } 485 lvms->bios_loaded = true; 486 return; 487 } 488 489 if (filename) { 490 bios_name = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename); 491 if (!bios_name) { 492 error_report("Could not find ROM image '%s'", filename); 493 exit(1); 494 } 495 496 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(lvms->flash[0]), 0); 497 bios_size = load_image_mr(bios_name, mr); 498 if (bios_size < 0) { 499 error_report("Could not load ROM image '%s'", bios_name); 500 exit(1); 501 } 502 g_free(bios_name); 503 lvms->bios_loaded = true; 504 } 505 } 506 507 static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, 508 uint64_t val, unsigned size, 509 MemTxAttrs attrs) 510 { 511 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 512 uint64_t features; 513 514 switch (addr) { 515 case MISC_FUNC_REG: 516 if (!virt_is_veiointc_enabled(lvms)) { 517 return MEMTX_OK; 518 } 519 520 features = address_space_ldl(&lvms->as_iocsr, 521 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 522 attrs, NULL); 523 if (val & BIT_ULL(IOCSRM_EXTIOI_EN)) { 524 features |= BIT(EXTIOI_ENABLE); 525 } 526 if (val & BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE)) { 527 features |= BIT(EXTIOI_ENABLE_INT_ENCODE); 528 } 529 530 address_space_stl(&lvms->as_iocsr, 531 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 532 features, attrs, NULL); 533 break; 534 default: 535 g_assert_not_reached(); 536 } 537 538 return MEMTX_OK; 539 } 540 541 static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, 542 uint64_t *data, 543 unsigned size, MemTxAttrs attrs) 544 { 545 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 546 uint64_t ret = 0; 547 int features; 548 549 switch (addr) { 550 case VERSION_REG: 551 ret = 0x11ULL; 552 break; 553 case FEATURE_REG: 554 ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI); 555 if (kvm_enabled()) { 556 ret |= BIT(IOCSRF_VM); 557 } 558 break; 559 case VENDOR_REG: 560 ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */ 561 break; 562 case CPUNAME_REG: 563 ret = 0x303030354133ULL; /* "3A5000" */ 564 break; 565 case MISC_FUNC_REG: 566 if (!virt_is_veiointc_enabled(lvms)) { 567 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 568 break; 569 } 570 571 features = address_space_ldl(&lvms->as_iocsr, 572 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 573 attrs, NULL); 574 if (features & BIT(EXTIOI_ENABLE)) { 575 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 576 } 577 if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) { 578 ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE); 579 } 580 break; 581 default: 582 g_assert_not_reached(); 583 } 584 585 *data = ret; 586 return MEMTX_OK; 587 } 588 589 static const MemoryRegionOps virt_iocsr_misc_ops = { 590 .read_with_attrs = virt_iocsr_misc_read, 591 .write_with_attrs = virt_iocsr_misc_write, 592 .endianness = DEVICE_LITTLE_ENDIAN, 593 .valid = { 594 .min_access_size = 4, 595 .max_access_size = 8, 596 }, 597 .impl = { 598 .min_access_size = 8, 599 .max_access_size = 8, 600 }, 601 }; 602 603 static void fw_cfg_add_memory(MachineState *ms) 604 { 605 hwaddr base, size, ram_size, gap; 606 int nb_numa_nodes, nodes; 607 NodeInfo *numa_info; 608 609 ram_size = ms->ram_size; 610 base = VIRT_LOWMEM_BASE; 611 gap = VIRT_LOWMEM_SIZE; 612 nodes = nb_numa_nodes = ms->numa_state->num_nodes; 613 numa_info = ms->numa_state->nodes; 614 if (!nodes) { 615 nodes = 1; 616 } 617 618 /* add fw_cfg memory map of node0 */ 619 if (nb_numa_nodes) { 620 size = numa_info[0].node_mem; 621 } else { 622 size = ram_size; 623 } 624 625 if (size >= gap) { 626 memmap_add_entry(base, gap, 1); 627 size -= gap; 628 base = VIRT_HIGHMEM_BASE; 629 } 630 631 if (size) { 632 memmap_add_entry(base, size, 1); 633 base += size; 634 } 635 636 if (nodes < 2) { 637 return; 638 } 639 640 /* add fw_cfg memory map of other nodes */ 641 if (numa_info[0].node_mem < gap && ram_size > gap) { 642 /* 643 * memory map for the maining nodes splited into two part 644 * lowram: [base, +(gap - numa_info[0].node_mem)) 645 * highram: [VIRT_HIGHMEM_BASE, +(ram_size - gap)) 646 */ 647 memmap_add_entry(base, gap - numa_info[0].node_mem, 1); 648 size = ram_size - gap; 649 base = VIRT_HIGHMEM_BASE; 650 } else { 651 size = ram_size - numa_info[0].node_mem; 652 } 653 654 if (size) { 655 memmap_add_entry(base, size, 1); 656 } 657 } 658 659 static void virt_init(MachineState *machine) 660 { 661 const char *cpu_model = machine->cpu_type; 662 MemoryRegion *address_space_mem = get_system_memory(); 663 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine); 664 int i; 665 hwaddr base, size, ram_size = machine->ram_size; 666 MachineClass *mc = MACHINE_GET_CLASS(machine); 667 Object *cpuobj; 668 669 if (!cpu_model) { 670 cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); 671 } 672 673 /* Create IOCSR space */ 674 memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, 675 machine, "iocsr", UINT64_MAX); 676 address_space_init(&lvms->as_iocsr, &lvms->system_iocsr, "IOCSR"); 677 memory_region_init_io(&lvms->iocsr_mem, OBJECT(machine), 678 &virt_iocsr_misc_ops, 679 machine, "iocsr_misc", 0x428); 680 memory_region_add_subregion(&lvms->system_iocsr, 0, &lvms->iocsr_mem); 681 682 /* Init CPUs */ 683 mc->possible_cpu_arch_ids(machine); 684 for (i = 0; i < machine->smp.cpus; i++) { 685 cpuobj = object_new(machine->cpu_type); 686 if (cpuobj == NULL) { 687 error_report("Fail to create object with type %s ", 688 machine->cpu_type); 689 exit(EXIT_FAILURE); 690 } 691 qdev_realize_and_unref(DEVICE(cpuobj), NULL, &error_fatal); 692 } 693 fw_cfg_add_memory(machine); 694 695 /* Node0 memory */ 696 size = ram_size; 697 base = VIRT_LOWMEM_BASE; 698 if (size > VIRT_LOWMEM_SIZE) { 699 size = VIRT_LOWMEM_SIZE; 700 } 701 702 memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram", 703 machine->ram, base, size); 704 memory_region_add_subregion(address_space_mem, base, &lvms->lowmem); 705 base += size; 706 if (ram_size - size) { 707 base = VIRT_HIGHMEM_BASE; 708 memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram", 709 machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size); 710 memory_region_add_subregion(address_space_mem, base, &lvms->highmem); 711 base += ram_size - size; 712 } 713 714 /* initialize device memory address space */ 715 if (machine->ram_size < machine->maxram_size) { 716 ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; 717 718 if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { 719 error_report("unsupported amount of memory slots: %"PRIu64, 720 machine->ram_slots); 721 exit(EXIT_FAILURE); 722 } 723 724 if (QEMU_ALIGN_UP(machine->maxram_size, 725 TARGET_PAGE_SIZE) != machine->maxram_size) { 726 error_report("maximum memory size must by aligned to multiple of " 727 "%d bytes", TARGET_PAGE_SIZE); 728 exit(EXIT_FAILURE); 729 } 730 machine_memory_devices_init(machine, base, device_mem_size); 731 } 732 733 /* load the BIOS image. */ 734 virt_firmware_init(lvms); 735 736 /* fw_cfg init */ 737 lvms->fw_cfg = virt_fw_cfg_init(ram_size, machine); 738 rom_set_fw(lvms->fw_cfg); 739 if (lvms->fw_cfg != NULL) { 740 fw_cfg_add_file(lvms->fw_cfg, "etc/memmap", 741 memmap_table, 742 sizeof(struct memmap_entry) * (memmap_entries)); 743 } 744 745 /* Initialize the IO interrupt subsystem */ 746 virt_irq_init(lvms); 747 lvms->machine_done.notify = virt_done; 748 qemu_add_machine_init_done_notifier(&lvms->machine_done); 749 /* connect powerdown request */ 750 lvms->powerdown_notifier.notify = virt_powerdown_req; 751 qemu_register_powerdown_notifier(&lvms->powerdown_notifier); 752 753 lvms->bootinfo.ram_size = ram_size; 754 loongarch_load_kernel(machine, &lvms->bootinfo); 755 } 756 757 static void virt_get_acpi(Object *obj, Visitor *v, const char *name, 758 void *opaque, Error **errp) 759 { 760 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 761 OnOffAuto acpi = lvms->acpi; 762 763 visit_type_OnOffAuto(v, name, &acpi, errp); 764 } 765 766 static void virt_set_acpi(Object *obj, Visitor *v, const char *name, 767 void *opaque, Error **errp) 768 { 769 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 770 771 visit_type_OnOffAuto(v, name, &lvms->acpi, errp); 772 } 773 774 static void virt_initfn(Object *obj) 775 { 776 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 777 778 if (tcg_enabled()) { 779 lvms->veiointc = ON_OFF_AUTO_OFF; 780 } 781 lvms->acpi = ON_OFF_AUTO_AUTO; 782 lvms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); 783 lvms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); 784 virt_flash_create(lvms); 785 } 786 787 static void virt_get_topo_from_index(MachineState *ms, 788 LoongArchCPUTopo *topo, int index) 789 { 790 topo->socket_id = index / (ms->smp.cores * ms->smp.threads); 791 topo->core_id = index / ms->smp.threads % ms->smp.cores; 792 topo->thread_id = index % ms->smp.threads; 793 } 794 795 static unsigned int topo_align_up(unsigned int count) 796 { 797 g_assert(count >= 1); 798 count -= 1; 799 return BIT(count ? 32 - clz32(count) : 0); 800 } 801 802 /* 803 * LoongArch Reference Manual Vol1, Chapter 7.4.12 CPU Identity 804 * For CPU architecture, bit0 .. bit8 is valid for CPU id, max cpuid is 512 805 * However for IPI/Eiointc interrupt controller, max supported cpu id for 806 * irq routingis 256 807 * 808 * Here max cpu id is 256 for virt machine 809 */ 810 static int virt_get_arch_id_from_topo(MachineState *ms, LoongArchCPUTopo *topo) 811 { 812 int arch_id, threads, cores, sockets; 813 814 threads = topo_align_up(ms->smp.threads); 815 cores = topo_align_up(ms->smp.cores); 816 sockets = topo_align_up(ms->smp.sockets); 817 if ((threads * cores * sockets) > 256) { 818 error_report("Exceeding max cpuid 256 with sockets[%d] cores[%d]" 819 " threads[%d]", ms->smp.sockets, ms->smp.cores, 820 ms->smp.threads); 821 exit(1); 822 } 823 824 arch_id = topo->thread_id + topo->core_id * threads; 825 arch_id += topo->socket_id * threads * cores; 826 return arch_id; 827 } 828 829 /* Find cpu slot in machine->possible_cpus by arch_id */ 830 static CPUArchId *virt_find_cpu_slot(MachineState *ms, int arch_id) 831 { 832 int n; 833 for (n = 0; n < ms->possible_cpus->len; n++) { 834 if (ms->possible_cpus->cpus[n].arch_id == arch_id) { 835 return &ms->possible_cpus->cpus[n]; 836 } 837 } 838 839 return NULL; 840 } 841 842 /* Find cpu slot for cold-plut CPU object where cpu is NULL */ 843 static CPUArchId *virt_find_empty_cpu_slot(MachineState *ms) 844 { 845 int n; 846 for (n = 0; n < ms->possible_cpus->len; n++) { 847 if (ms->possible_cpus->cpus[n].cpu == NULL) { 848 return &ms->possible_cpus->cpus[n]; 849 } 850 } 851 852 return NULL; 853 } 854 855 static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, 856 DeviceState *dev, Error **errp) 857 { 858 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 859 MachineState *ms = MACHINE(OBJECT(hotplug_dev)); 860 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 861 CPUState *cs = CPU(dev); 862 CPUArchId *cpu_slot; 863 LoongArchCPUTopo topo; 864 int arch_id; 865 866 if (lvms->acpi_ged) { 867 if ((cpu->thread_id < 0) || (cpu->thread_id >= ms->smp.threads)) { 868 error_setg(errp, 869 "Invalid thread-id %u specified, must be in range 1:%u", 870 cpu->thread_id, ms->smp.threads - 1); 871 return; 872 } 873 874 if ((cpu->core_id < 0) || (cpu->core_id >= ms->smp.cores)) { 875 error_setg(errp, 876 "Invalid core-id %u specified, must be in range 1:%u", 877 cpu->core_id, ms->smp.cores - 1); 878 return; 879 } 880 881 if ((cpu->socket_id < 0) || (cpu->socket_id >= ms->smp.sockets)) { 882 error_setg(errp, 883 "Invalid socket-id %u specified, must be in range 1:%u", 884 cpu->socket_id, ms->smp.sockets - 1); 885 return; 886 } 887 888 topo.socket_id = cpu->socket_id; 889 topo.core_id = cpu->core_id; 890 topo.thread_id = cpu->thread_id; 891 arch_id = virt_get_arch_id_from_topo(ms, &topo); 892 cpu_slot = virt_find_cpu_slot(ms, arch_id); 893 if (CPU(cpu_slot->cpu)) { 894 error_setg(errp, 895 "cpu(id%d=%d:%d:%d) with arch-id %" PRIu64 " exists", 896 cs->cpu_index, cpu->socket_id, cpu->core_id, 897 cpu->thread_id, cpu_slot->arch_id); 898 return; 899 } 900 } else { 901 /* For cold-add cpu, find empty cpu slot */ 902 cpu_slot = virt_find_empty_cpu_slot(ms); 903 topo.socket_id = cpu_slot->props.socket_id; 904 topo.core_id = cpu_slot->props.core_id; 905 topo.thread_id = cpu_slot->props.thread_id; 906 object_property_set_int(OBJECT(dev), "socket-id", topo.socket_id, NULL); 907 object_property_set_int(OBJECT(dev), "core-id", topo.core_id, NULL); 908 object_property_set_int(OBJECT(dev), "thread-id", topo.thread_id, NULL); 909 } 910 911 cpu->env.address_space_iocsr = &lvms->as_iocsr; 912 cpu->phy_id = cpu_slot->arch_id; 913 cs->cpu_index = cpu_slot - ms->possible_cpus->cpus; 914 numa_cpu_pre_plug(cpu_slot, dev, errp); 915 } 916 917 static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev, 918 DeviceState *dev, Error **errp) 919 { 920 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 921 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 922 CPUState *cs = CPU(dev); 923 924 if (cs->cpu_index == 0) { 925 error_setg(errp, "hot-unplug of boot cpu(id%d=%d:%d:%d) not supported", 926 cs->cpu_index, cpu->socket_id, 927 cpu->core_id, cpu->thread_id); 928 return; 929 } 930 931 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 932 } 933 934 static void virt_cpu_unplug(HotplugHandler *hotplug_dev, 935 DeviceState *dev, Error **errp) 936 { 937 CPUArchId *cpu_slot; 938 Error *err = NULL; 939 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 940 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 941 942 /* Notify ipi and extioi irqchip to remove interrupt routing to CPU */ 943 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->ipi), dev, &err); 944 if (err) { 945 error_propagate(errp, err); 946 return; 947 } 948 949 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->extioi), dev, &err); 950 if (err) { 951 error_propagate(errp, err); 952 return; 953 } 954 955 /* Notify acpi ged CPU removed */ 956 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &err); 957 if (err) { 958 error_propagate(errp, err); 959 return; 960 } 961 962 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 963 cpu_slot->cpu = NULL; 964 return; 965 } 966 967 static void virt_cpu_plug(HotplugHandler *hotplug_dev, 968 DeviceState *dev, Error **errp) 969 { 970 CPUArchId *cpu_slot; 971 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 972 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 973 Error *err = NULL; 974 975 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 976 cpu_slot->cpu = CPU(dev); 977 if (lvms->ipi) { 978 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), dev, &err); 979 if (err) { 980 error_propagate(errp, err); 981 return; 982 } 983 } 984 985 if (lvms->extioi) { 986 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), dev, &err); 987 if (err) { 988 error_propagate(errp, err); 989 return; 990 } 991 } 992 993 if (lvms->acpi_ged) { 994 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &err); 995 if (err) { 996 error_propagate(errp, err); 997 } 998 } 999 1000 return; 1001 } 1002 1003 static bool memhp_type_supported(DeviceState *dev) 1004 { 1005 /* we only support pc dimm now */ 1006 return object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) && 1007 !object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); 1008 } 1009 1010 static void virt_mem_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 1011 Error **errp) 1012 { 1013 pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), errp); 1014 } 1015 1016 static void virt_device_pre_plug(HotplugHandler *hotplug_dev, 1017 DeviceState *dev, Error **errp) 1018 { 1019 if (memhp_type_supported(dev)) { 1020 virt_mem_pre_plug(hotplug_dev, dev, errp); 1021 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1022 virt_cpu_pre_plug(hotplug_dev, dev, errp); 1023 } 1024 } 1025 1026 static void virt_mem_unplug_request(HotplugHandler *hotplug_dev, 1027 DeviceState *dev, Error **errp) 1028 { 1029 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1030 1031 /* the acpi ged is always exist */ 1032 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, 1033 errp); 1034 } 1035 1036 static void virt_device_unplug_request(HotplugHandler *hotplug_dev, 1037 DeviceState *dev, Error **errp) 1038 { 1039 if (memhp_type_supported(dev)) { 1040 virt_mem_unplug_request(hotplug_dev, dev, errp); 1041 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1042 virt_cpu_unplug_request(hotplug_dev, dev, errp); 1043 } 1044 } 1045 1046 static void virt_mem_unplug(HotplugHandler *hotplug_dev, 1047 DeviceState *dev, Error **errp) 1048 { 1049 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1050 1051 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 1052 pc_dimm_unplug(PC_DIMM(dev), MACHINE(lvms)); 1053 qdev_unrealize(dev); 1054 } 1055 1056 static void virt_device_unplug(HotplugHandler *hotplug_dev, 1057 DeviceState *dev, Error **errp) 1058 { 1059 if (memhp_type_supported(dev)) { 1060 virt_mem_unplug(hotplug_dev, dev, errp); 1061 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1062 virt_cpu_unplug(hotplug_dev, dev, errp); 1063 } 1064 } 1065 1066 static void virt_mem_plug(HotplugHandler *hotplug_dev, 1067 DeviceState *dev, Error **errp) 1068 { 1069 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1070 1071 pc_dimm_plug(PC_DIMM(dev), MACHINE(lvms)); 1072 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), 1073 dev, &error_abort); 1074 } 1075 1076 static void virt_device_plug_cb(HotplugHandler *hotplug_dev, 1077 DeviceState *dev, Error **errp) 1078 { 1079 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1080 MachineClass *mc = MACHINE_GET_CLASS(lvms); 1081 PlatformBusDevice *pbus; 1082 1083 if (device_is_dynamic_sysbus(mc, dev)) { 1084 if (lvms->platform_bus_dev) { 1085 pbus = PLATFORM_BUS_DEVICE(lvms->platform_bus_dev); 1086 platform_bus_link_device(pbus, SYS_BUS_DEVICE(dev)); 1087 } 1088 } else if (memhp_type_supported(dev)) { 1089 virt_mem_plug(hotplug_dev, dev, errp); 1090 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1091 virt_cpu_plug(hotplug_dev, dev, errp); 1092 } 1093 } 1094 1095 static HotplugHandler *virt_get_hotplug_handler(MachineState *machine, 1096 DeviceState *dev) 1097 { 1098 MachineClass *mc = MACHINE_GET_CLASS(machine); 1099 1100 if (device_is_dynamic_sysbus(mc, dev) || 1101 object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU) || 1102 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || 1103 memhp_type_supported(dev)) { 1104 return HOTPLUG_HANDLER(machine); 1105 } 1106 return NULL; 1107 } 1108 1109 static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) 1110 { 1111 int n, arch_id; 1112 unsigned int max_cpus = ms->smp.max_cpus; 1113 LoongArchCPUTopo topo; 1114 1115 if (ms->possible_cpus) { 1116 assert(ms->possible_cpus->len == max_cpus); 1117 return ms->possible_cpus; 1118 } 1119 1120 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + 1121 sizeof(CPUArchId) * max_cpus); 1122 ms->possible_cpus->len = max_cpus; 1123 for (n = 0; n < ms->possible_cpus->len; n++) { 1124 virt_get_topo_from_index(ms, &topo, n); 1125 arch_id = virt_get_arch_id_from_topo(ms, &topo); 1126 ms->possible_cpus->cpus[n].type = ms->cpu_type; 1127 ms->possible_cpus->cpus[n].arch_id = arch_id; 1128 ms->possible_cpus->cpus[n].vcpus_count = 1; 1129 ms->possible_cpus->cpus[n].props.has_socket_id = true; 1130 ms->possible_cpus->cpus[n].props.socket_id = topo.socket_id; 1131 ms->possible_cpus->cpus[n].props.has_core_id = true; 1132 ms->possible_cpus->cpus[n].props.core_id = topo.core_id; 1133 ms->possible_cpus->cpus[n].props.has_thread_id = true; 1134 ms->possible_cpus->cpus[n].props.thread_id = topo.thread_id; 1135 } 1136 return ms->possible_cpus; 1137 } 1138 1139 static CpuInstanceProperties virt_cpu_index_to_props(MachineState *ms, 1140 unsigned cpu_index) 1141 { 1142 MachineClass *mc = MACHINE_GET_CLASS(ms); 1143 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1144 1145 assert(cpu_index < possible_cpus->len); 1146 return possible_cpus->cpus[cpu_index].props; 1147 } 1148 1149 static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx) 1150 { 1151 int64_t socket_id; 1152 1153 if (ms->numa_state->num_nodes) { 1154 socket_id = ms->possible_cpus->cpus[idx].props.socket_id; 1155 return socket_id % ms->numa_state->num_nodes; 1156 } else { 1157 return 0; 1158 } 1159 } 1160 1161 static void virt_class_init(ObjectClass *oc, void *data) 1162 { 1163 MachineClass *mc = MACHINE_CLASS(oc); 1164 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); 1165 1166 mc->init = virt_init; 1167 mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464"); 1168 mc->default_ram_id = "loongarch.ram"; 1169 mc->desc = "QEMU LoongArch Virtual Machine"; 1170 mc->max_cpus = LOONGARCH_MAX_CPUS; 1171 mc->is_default = 1; 1172 mc->default_kernel_irqchip_split = false; 1173 mc->block_default_type = IF_VIRTIO; 1174 mc->default_boot_order = "c"; 1175 mc->no_cdrom = 1; 1176 mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids; 1177 mc->cpu_index_to_instance_props = virt_cpu_index_to_props; 1178 mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; 1179 mc->numa_mem_supported = true; 1180 mc->auto_enable_numa_with_memhp = true; 1181 mc->auto_enable_numa_with_memdev = true; 1182 mc->has_hotpluggable_cpus = true; 1183 mc->get_hotplug_handler = virt_get_hotplug_handler; 1184 mc->default_nic = "virtio-net-pci"; 1185 hc->plug = virt_device_plug_cb; 1186 hc->pre_plug = virt_device_pre_plug; 1187 hc->unplug_request = virt_device_unplug_request; 1188 hc->unplug = virt_device_unplug; 1189 1190 object_class_property_add(oc, "acpi", "OnOffAuto", 1191 virt_get_acpi, virt_set_acpi, 1192 NULL, NULL); 1193 object_class_property_set_description(oc, "acpi", 1194 "Enable ACPI"); 1195 object_class_property_add(oc, "v-eiointc", "OnOffAuto", 1196 virt_get_veiointc, virt_set_veiointc, 1197 NULL, NULL); 1198 object_class_property_set_description(oc, "v-eiointc", 1199 "Enable Virt Extend I/O Interrupt Controller."); 1200 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); 1201 #ifdef CONFIG_TPM 1202 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); 1203 #endif 1204 } 1205 1206 static const TypeInfo virt_machine_types[] = { 1207 { 1208 .name = TYPE_LOONGARCH_VIRT_MACHINE, 1209 .parent = TYPE_MACHINE, 1210 .instance_size = sizeof(LoongArchVirtMachineState), 1211 .class_init = virt_class_init, 1212 .instance_init = virt_initfn, 1213 .interfaces = (InterfaceInfo[]) { 1214 { TYPE_HOTPLUG_HANDLER }, 1215 { } 1216 }, 1217 } 1218 }; 1219 1220 DEFINE_TYPES(virt_machine_types) 1221