1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * QEMU loongson 3a5000 develop board emulation 4 * 5 * Copyright (c) 2021 Loongson Technology Corporation Limited 6 */ 7 #include "qemu/osdep.h" 8 #include "qemu/units.h" 9 #include "qemu/datadir.h" 10 #include "qapi/error.h" 11 #include "exec/target_page.h" 12 #include "hw/boards.h" 13 #include "hw/char/serial-mm.h" 14 #include "system/kvm.h" 15 #include "system/tcg.h" 16 #include "system/system.h" 17 #include "system/qtest.h" 18 #include "system/runstate.h" 19 #include "system/reset.h" 20 #include "system/rtc.h" 21 #include "hw/loongarch/virt.h" 22 #include "system/address-spaces.h" 23 #include "hw/irq.h" 24 #include "net/net.h" 25 #include "hw/loader.h" 26 #include "elf.h" 27 #include "hw/intc/loongarch_ipi.h" 28 #include "hw/intc/loongarch_extioi.h" 29 #include "hw/intc/loongarch_pch_pic.h" 30 #include "hw/intc/loongarch_pch_msi.h" 31 #include "hw/pci-host/ls7a.h" 32 #include "hw/pci-host/gpex.h" 33 #include "hw/misc/unimp.h" 34 #include "hw/loongarch/fw_cfg.h" 35 #include "target/loongarch/cpu.h" 36 #include "hw/firmware/smbios.h" 37 #include "qapi/qapi-visit-common.h" 38 #include "hw/acpi/generic_event_device.h" 39 #include "hw/mem/nvdimm.h" 40 #include "hw/platform-bus.h" 41 #include "hw/display/ramfb.h" 42 #include "hw/uefi/var-service-api.h" 43 #include "hw/mem/pc-dimm.h" 44 #include "system/tpm.h" 45 #include "system/block-backend.h" 46 #include "hw/block/flash.h" 47 #include "hw/virtio/virtio-iommu.h" 48 #include "qemu/error-report.h" 49 50 static void virt_get_veiointc(Object *obj, Visitor *v, const char *name, 51 void *opaque, Error **errp) 52 { 53 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 54 OnOffAuto veiointc = lvms->veiointc; 55 56 visit_type_OnOffAuto(v, name, &veiointc, errp); 57 } 58 59 static void virt_set_veiointc(Object *obj, Visitor *v, const char *name, 60 void *opaque, Error **errp) 61 { 62 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 63 64 visit_type_OnOffAuto(v, name, &lvms->veiointc, errp); 65 } 66 67 static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, 68 const char *name, 69 const char *alias_prop_name) 70 { 71 DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); 72 73 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); 74 qdev_prop_set_uint8(dev, "width", 4); 75 qdev_prop_set_uint8(dev, "device-width", 2); 76 qdev_prop_set_bit(dev, "big-endian", false); 77 qdev_prop_set_uint16(dev, "id0", 0x89); 78 qdev_prop_set_uint16(dev, "id1", 0x18); 79 qdev_prop_set_uint16(dev, "id2", 0x00); 80 qdev_prop_set_uint16(dev, "id3", 0x00); 81 qdev_prop_set_string(dev, "name", name); 82 object_property_add_child(OBJECT(lvms), name, OBJECT(dev)); 83 object_property_add_alias(OBJECT(lvms), alias_prop_name, 84 OBJECT(dev), "drive"); 85 return PFLASH_CFI01(dev); 86 } 87 88 static void virt_flash_create(LoongArchVirtMachineState *lvms) 89 { 90 lvms->flash[0] = virt_flash_create1(lvms, "virt.flash0", "pflash0"); 91 lvms->flash[1] = virt_flash_create1(lvms, "virt.flash1", "pflash1"); 92 } 93 94 static void virt_flash_map1(PFlashCFI01 *flash, 95 hwaddr base, hwaddr size, 96 MemoryRegion *sysmem) 97 { 98 DeviceState *dev = DEVICE(flash); 99 BlockBackend *blk; 100 hwaddr real_size = size; 101 102 blk = pflash_cfi01_get_blk(flash); 103 if (blk) { 104 real_size = blk_getlength(blk); 105 assert(real_size && real_size <= size); 106 } 107 108 assert(QEMU_IS_ALIGNED(real_size, VIRT_FLASH_SECTOR_SIZE)); 109 assert(real_size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX); 110 111 qdev_prop_set_uint32(dev, "num-blocks", real_size / VIRT_FLASH_SECTOR_SIZE); 112 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 113 memory_region_add_subregion(sysmem, base, 114 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); 115 } 116 117 static void virt_flash_map(LoongArchVirtMachineState *lvms, 118 MemoryRegion *sysmem) 119 { 120 PFlashCFI01 *flash0 = lvms->flash[0]; 121 PFlashCFI01 *flash1 = lvms->flash[1]; 122 123 virt_flash_map1(flash0, VIRT_FLASH0_BASE, VIRT_FLASH0_SIZE, sysmem); 124 virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem); 125 } 126 127 static void virt_build_smbios(LoongArchVirtMachineState *lvms) 128 { 129 MachineState *ms = MACHINE(lvms); 130 MachineClass *mc = MACHINE_GET_CLASS(lvms); 131 uint8_t *smbios_tables, *smbios_anchor; 132 size_t smbios_tables_len, smbios_anchor_len; 133 const char *product = "QEMU Virtual Machine"; 134 135 if (!lvms->fw_cfg) { 136 return; 137 } 138 139 if (kvm_enabled()) { 140 product = "KVM Virtual Machine"; 141 } 142 143 smbios_set_defaults("QEMU", product, mc->name); 144 145 smbios_get_tables(ms, SMBIOS_ENTRY_POINT_TYPE_64, 146 NULL, 0, 147 &smbios_tables, &smbios_tables_len, 148 &smbios_anchor, &smbios_anchor_len, &error_fatal); 149 150 if (smbios_anchor) { 151 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-tables", 152 smbios_tables, smbios_tables_len); 153 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-anchor", 154 smbios_anchor, smbios_anchor_len); 155 } 156 } 157 158 static void virt_done(Notifier *notifier, void *data) 159 { 160 LoongArchVirtMachineState *lvms = container_of(notifier, 161 LoongArchVirtMachineState, machine_done); 162 virt_build_smbios(lvms); 163 virt_acpi_setup(lvms); 164 virt_fdt_setup(lvms); 165 } 166 167 static void virt_powerdown_req(Notifier *notifier, void *opaque) 168 { 169 LoongArchVirtMachineState *s; 170 171 s = container_of(notifier, LoongArchVirtMachineState, powerdown_notifier); 172 acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS); 173 } 174 175 static void memmap_add_entry(MachineState *ms, uint64_t address, 176 uint64_t length, uint32_t type) 177 { 178 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(ms); 179 struct memmap_entry *memmap_table; 180 unsigned int memmap_entries; 181 182 memmap_table = lvms->memmap_table; 183 memmap_entries = lvms->memmap_entries; 184 /* Ensure there are no duplicate entries. */ 185 for (unsigned i = 0; i < memmap_entries; i++) { 186 assert(memmap_table[i].address != address); 187 } 188 189 memmap_table = g_renew(struct memmap_entry, memmap_table, 190 memmap_entries + 1); 191 memmap_table[memmap_entries].address = cpu_to_le64(address); 192 memmap_table[memmap_entries].length = cpu_to_le64(length); 193 memmap_table[memmap_entries].type = cpu_to_le32(type); 194 memmap_table[memmap_entries].reserved = 0; 195 memmap_entries++; 196 lvms->memmap_table = memmap_table; 197 lvms->memmap_entries = memmap_entries; 198 } 199 200 static DeviceState *create_acpi_ged(DeviceState *pch_pic, 201 LoongArchVirtMachineState *lvms) 202 { 203 DeviceState *dev; 204 MachineState *ms = MACHINE(lvms); 205 MachineClass *mc = MACHINE_GET_CLASS(lvms); 206 uint32_t event = ACPI_GED_PWR_DOWN_EVT; 207 208 if (ms->ram_slots) { 209 event |= ACPI_GED_MEM_HOTPLUG_EVT; 210 } 211 212 if (mc->has_hotpluggable_cpus) { 213 event |= ACPI_GED_CPU_HOTPLUG_EVT; 214 } 215 216 dev = qdev_new(TYPE_ACPI_GED); 217 qdev_prop_set_uint32(dev, "ged-event", event); 218 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 219 220 /* ged event */ 221 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VIRT_GED_EVT_ADDR); 222 /* memory hotplug */ 223 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, VIRT_GED_MEM_ADDR); 224 /* ged regs used for reset and power down */ 225 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR); 226 227 if (mc->has_hotpluggable_cpus) { 228 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 3, VIRT_GED_CPUHP_ADDR); 229 } 230 231 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 232 qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE)); 233 return dev; 234 } 235 236 static DeviceState *create_platform_bus(DeviceState *pch_pic) 237 { 238 DeviceState *dev; 239 SysBusDevice *sysbus; 240 int i, irq; 241 MemoryRegion *sysmem = get_system_memory(); 242 243 dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); 244 dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); 245 qdev_prop_set_uint32(dev, "num_irqs", VIRT_PLATFORM_BUS_NUM_IRQS); 246 qdev_prop_set_uint32(dev, "mmio_size", VIRT_PLATFORM_BUS_SIZE); 247 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 248 249 sysbus = SYS_BUS_DEVICE(dev); 250 for (i = 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) { 251 irq = VIRT_PLATFORM_BUS_IRQ - VIRT_GSI_BASE + i; 252 sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(pch_pic, irq)); 253 } 254 255 memory_region_add_subregion(sysmem, 256 VIRT_PLATFORM_BUS_BASEADDRESS, 257 sysbus_mmio_get_region(sysbus, 0)); 258 return dev; 259 } 260 261 static void virt_devices_init(DeviceState *pch_pic, 262 LoongArchVirtMachineState *lvms) 263 { 264 MachineClass *mc = MACHINE_GET_CLASS(lvms); 265 DeviceState *gpex_dev; 266 SysBusDevice *d; 267 PCIBus *pci_bus; 268 MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg; 269 MemoryRegion *mmio_alias, *mmio_reg; 270 int i; 271 272 gpex_dev = qdev_new(TYPE_GPEX_HOST); 273 d = SYS_BUS_DEVICE(gpex_dev); 274 sysbus_realize_and_unref(d, &error_fatal); 275 pci_bus = PCI_HOST_BRIDGE(gpex_dev)->bus; 276 lvms->pci_bus = pci_bus; 277 278 /* Map only part size_ecam bytes of ECAM space */ 279 ecam_alias = g_new0(MemoryRegion, 1); 280 ecam_reg = sysbus_mmio_get_region(d, 0); 281 memory_region_init_alias(ecam_alias, OBJECT(gpex_dev), "pcie-ecam", 282 ecam_reg, 0, VIRT_PCI_CFG_SIZE); 283 memory_region_add_subregion(get_system_memory(), VIRT_PCI_CFG_BASE, 284 ecam_alias); 285 286 /* Map PCI mem space */ 287 mmio_alias = g_new0(MemoryRegion, 1); 288 mmio_reg = sysbus_mmio_get_region(d, 1); 289 memory_region_init_alias(mmio_alias, OBJECT(gpex_dev), "pcie-mmio", 290 mmio_reg, VIRT_PCI_MEM_BASE, VIRT_PCI_MEM_SIZE); 291 memory_region_add_subregion(get_system_memory(), VIRT_PCI_MEM_BASE, 292 mmio_alias); 293 294 /* Map PCI IO port space. */ 295 pio_alias = g_new0(MemoryRegion, 1); 296 pio_reg = sysbus_mmio_get_region(d, 2); 297 memory_region_init_alias(pio_alias, OBJECT(gpex_dev), "pcie-io", pio_reg, 298 VIRT_PCI_IO_OFFSET, VIRT_PCI_IO_SIZE); 299 memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE, 300 pio_alias); 301 302 for (i = 0; i < PCI_NUM_PINS; i++) { 303 sysbus_connect_irq(d, i, 304 qdev_get_gpio_in(pch_pic, 16 + i)); 305 gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); 306 } 307 308 /* 309 * Create uart fdt node in reverse order so that they appear 310 * in the finished device tree lowest address first 311 */ 312 for (i = VIRT_UART_COUNT; i-- > 0;) { 313 hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; 314 int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE; 315 serial_mm_init(get_system_memory(), base, 0, 316 qdev_get_gpio_in(pch_pic, irq), 317 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); 318 } 319 320 /* Network init */ 321 pci_init_nic_devices(pci_bus, mc->default_nic); 322 323 /* 324 * There are some invalid guest memory access. 325 * Create some unimplemented devices to emulate this. 326 */ 327 create_unimplemented_device("pci-dma-cfg", 0x1001041c, 0x4); 328 sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, 329 qdev_get_gpio_in(pch_pic, 330 VIRT_RTC_IRQ - VIRT_GSI_BASE)); 331 332 /* acpi ged */ 333 lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); 334 /* platform bus */ 335 lvms->platform_bus_dev = create_platform_bus(pch_pic); 336 } 337 338 static void virt_cpu_irq_init(LoongArchVirtMachineState *lvms) 339 { 340 int num; 341 MachineState *ms = MACHINE(lvms); 342 MachineClass *mc = MACHINE_GET_CLASS(ms); 343 const CPUArchIdList *possible_cpus; 344 CPUState *cs; 345 346 /* cpu nodes */ 347 possible_cpus = mc->possible_cpu_arch_ids(ms); 348 for (num = 0; num < possible_cpus->len; num++) { 349 cs = possible_cpus->cpus[num].cpu; 350 if (cs == NULL) { 351 continue; 352 } 353 354 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), DEVICE(cs), 355 &error_abort); 356 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), DEVICE(cs), 357 &error_abort); 358 } 359 } 360 361 static void virt_irq_init(LoongArchVirtMachineState *lvms) 362 { 363 DeviceState *pch_pic, *pch_msi; 364 DeviceState *ipi, *extioi; 365 SysBusDevice *d; 366 int i, start, num; 367 368 /* 369 * Extended IRQ model. 370 * | 371 * +-----------+ +-------------|--------+ +-----------+ 372 * | IPI/Timer | --> | CPUINTC(0-3)|(4-255) | <-- | IPI/Timer | 373 * +-----------+ +-------------|--------+ +-----------+ 374 * ^ | 375 * | 376 * +---------+ 377 * | EIOINTC | 378 * +---------+ 379 * ^ ^ 380 * | | 381 * +---------+ +---------+ 382 * | PCH-PIC | | PCH-MSI | 383 * +---------+ +---------+ 384 * ^ ^ ^ 385 * | | | 386 * +--------+ +---------+ +---------+ 387 * | UARTs | | Devices | | Devices | 388 * +--------+ +---------+ +---------+ 389 * 390 * Virt extended IRQ model. 391 * 392 * +-----+ +---------------+ +-------+ 393 * | IPI |--> | CPUINTC(0-255)| <-- | Timer | 394 * +-----+ +---------------+ +-------+ 395 * ^ 396 * | 397 * +-----------+ 398 * | V-EIOINTC | 399 * +-----------+ 400 * ^ ^ 401 * | | 402 * +---------+ +---------+ 403 * | PCH-PIC | | PCH-MSI | 404 * +---------+ +---------+ 405 * ^ ^ ^ 406 * | | | 407 * +--------+ +---------+ +---------+ 408 * | UARTs | | Devices | | Devices | 409 * +--------+ +---------+ +---------+ 410 */ 411 412 /* Create IPI device */ 413 ipi = qdev_new(TYPE_LOONGARCH_IPI); 414 lvms->ipi = ipi; 415 sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); 416 417 /* IPI iocsr memory region */ 418 memory_region_add_subregion(&lvms->system_iocsr, SMP_IPI_MAILBOX, 419 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0)); 420 memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, 421 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); 422 423 /* Create EXTIOI device */ 424 extioi = qdev_new(TYPE_LOONGARCH_EXTIOI); 425 lvms->extioi = extioi; 426 if (virt_is_veiointc_enabled(lvms)) { 427 qdev_prop_set_bit(extioi, "has-virtualization-extension", true); 428 } 429 sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal); 430 memory_region_add_subregion(&lvms->system_iocsr, APIC_BASE, 431 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); 432 if (virt_is_veiointc_enabled(lvms)) { 433 memory_region_add_subregion(&lvms->system_iocsr, EXTIOI_VIRT_BASE, 434 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 1)); 435 } 436 437 virt_cpu_irq_init(lvms); 438 pch_pic = qdev_new(TYPE_LOONGARCH_PIC); 439 num = VIRT_PCH_PIC_IRQ_NUM; 440 qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); 441 d = SYS_BUS_DEVICE(pch_pic); 442 sysbus_realize_and_unref(d, &error_fatal); 443 memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE, 444 sysbus_mmio_get_region(d, 0)); 445 446 /* Connect pch_pic irqs to extioi */ 447 for (i = 0; i < num; i++) { 448 qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); 449 } 450 451 pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); 452 start = num; 453 num = EXTIOI_IRQS - start; 454 qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); 455 qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); 456 d = SYS_BUS_DEVICE(pch_msi); 457 sysbus_realize_and_unref(d, &error_fatal); 458 sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW); 459 for (i = 0; i < num; i++) { 460 /* Connect pch_msi irqs to extioi */ 461 qdev_connect_gpio_out(DEVICE(d), i, 462 qdev_get_gpio_in(extioi, i + start)); 463 } 464 465 virt_devices_init(pch_pic, lvms); 466 } 467 468 static void virt_firmware_init(LoongArchVirtMachineState *lvms) 469 { 470 char *filename = MACHINE(lvms)->firmware; 471 char *bios_name = NULL; 472 int bios_size, i; 473 BlockBackend *pflash_blk0; 474 MemoryRegion *mr; 475 476 lvms->bios_loaded = false; 477 478 /* Map legacy -drive if=pflash to machine properties */ 479 for (i = 0; i < ARRAY_SIZE(lvms->flash); i++) { 480 pflash_cfi01_legacy_drive(lvms->flash[i], 481 drive_get(IF_PFLASH, 0, i)); 482 } 483 484 virt_flash_map(lvms, get_system_memory()); 485 486 pflash_blk0 = pflash_cfi01_get_blk(lvms->flash[0]); 487 488 if (pflash_blk0) { 489 if (filename) { 490 error_report("cannot use both '-bios' and '-drive if=pflash'" 491 "options at once"); 492 exit(1); 493 } 494 lvms->bios_loaded = true; 495 return; 496 } 497 498 if (filename) { 499 bios_name = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename); 500 if (!bios_name) { 501 error_report("Could not find ROM image '%s'", filename); 502 exit(1); 503 } 504 505 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(lvms->flash[0]), 0); 506 bios_size = load_image_mr(bios_name, mr); 507 if (bios_size < 0) { 508 error_report("Could not load ROM image '%s'", bios_name); 509 exit(1); 510 } 511 g_free(bios_name); 512 lvms->bios_loaded = true; 513 } 514 } 515 516 static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, 517 uint64_t val, unsigned size, 518 MemTxAttrs attrs) 519 { 520 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 521 uint64_t features; 522 523 switch (addr) { 524 case MISC_FUNC_REG: 525 if (!virt_is_veiointc_enabled(lvms)) { 526 return MEMTX_OK; 527 } 528 529 features = address_space_ldl(&lvms->as_iocsr, 530 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 531 attrs, NULL); 532 if (val & BIT_ULL(IOCSRM_EXTIOI_EN)) { 533 features |= BIT(EXTIOI_ENABLE); 534 } 535 if (val & BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE)) { 536 features |= BIT(EXTIOI_ENABLE_INT_ENCODE); 537 } 538 539 address_space_stl(&lvms->as_iocsr, 540 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 541 features, attrs, NULL); 542 break; 543 default: 544 g_assert_not_reached(); 545 } 546 547 return MEMTX_OK; 548 } 549 550 static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, 551 uint64_t *data, 552 unsigned size, MemTxAttrs attrs) 553 { 554 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 555 uint64_t ret = 0; 556 int features; 557 558 switch (addr) { 559 case VERSION_REG: 560 ret = 0x11ULL; 561 break; 562 case FEATURE_REG: 563 ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI); 564 if (kvm_enabled()) { 565 ret |= BIT(IOCSRF_VM); 566 } 567 break; 568 case VENDOR_REG: 569 ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */ 570 break; 571 case CPUNAME_REG: 572 ret = 0x303030354133ULL; /* "3A5000" */ 573 break; 574 case MISC_FUNC_REG: 575 if (!virt_is_veiointc_enabled(lvms)) { 576 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 577 break; 578 } 579 580 features = address_space_ldl(&lvms->as_iocsr, 581 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 582 attrs, NULL); 583 if (features & BIT(EXTIOI_ENABLE)) { 584 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 585 } 586 if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) { 587 ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE); 588 } 589 break; 590 default: 591 g_assert_not_reached(); 592 } 593 594 *data = ret; 595 return MEMTX_OK; 596 } 597 598 static const MemoryRegionOps virt_iocsr_misc_ops = { 599 .read_with_attrs = virt_iocsr_misc_read, 600 .write_with_attrs = virt_iocsr_misc_write, 601 .endianness = DEVICE_LITTLE_ENDIAN, 602 .valid = { 603 .min_access_size = 4, 604 .max_access_size = 8, 605 }, 606 .impl = { 607 .min_access_size = 8, 608 .max_access_size = 8, 609 }, 610 }; 611 612 static void fw_cfg_add_memory(MachineState *ms) 613 { 614 hwaddr base, size, ram_size, gap; 615 int nb_numa_nodes, nodes; 616 NodeInfo *numa_info; 617 618 ram_size = ms->ram_size; 619 base = VIRT_LOWMEM_BASE; 620 gap = VIRT_LOWMEM_SIZE; 621 nodes = nb_numa_nodes = ms->numa_state->num_nodes; 622 numa_info = ms->numa_state->nodes; 623 if (!nodes) { 624 nodes = 1; 625 } 626 627 /* add fw_cfg memory map of node0 */ 628 if (nb_numa_nodes) { 629 size = numa_info[0].node_mem; 630 } else { 631 size = ram_size; 632 } 633 634 if (size >= gap) { 635 memmap_add_entry(ms, base, gap, 1); 636 size -= gap; 637 base = VIRT_HIGHMEM_BASE; 638 } 639 640 if (size) { 641 memmap_add_entry(ms, base, size, 1); 642 base += size; 643 } 644 645 if (nodes < 2) { 646 return; 647 } 648 649 /* add fw_cfg memory map of other nodes */ 650 if (numa_info[0].node_mem < gap && ram_size > gap) { 651 /* 652 * memory map for the maining nodes splited into two part 653 * lowram: [base, +(gap - numa_info[0].node_mem)) 654 * highram: [VIRT_HIGHMEM_BASE, +(ram_size - gap)) 655 */ 656 memmap_add_entry(ms, base, gap - numa_info[0].node_mem, 1); 657 size = ram_size - gap; 658 base = VIRT_HIGHMEM_BASE; 659 } else { 660 size = ram_size - numa_info[0].node_mem; 661 } 662 663 if (size) { 664 memmap_add_entry(ms, base, size, 1); 665 } 666 } 667 668 static void virt_init(MachineState *machine) 669 { 670 const char *cpu_model = machine->cpu_type; 671 MemoryRegion *address_space_mem = get_system_memory(); 672 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine); 673 int i; 674 hwaddr base, size, ram_size = machine->ram_size; 675 MachineClass *mc = MACHINE_GET_CLASS(machine); 676 Object *cpuobj; 677 678 if (!cpu_model) { 679 cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); 680 } 681 682 /* Create IOCSR space */ 683 memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, 684 machine, "iocsr", UINT64_MAX); 685 address_space_init(&lvms->as_iocsr, &lvms->system_iocsr, "IOCSR"); 686 memory_region_init_io(&lvms->iocsr_mem, OBJECT(machine), 687 &virt_iocsr_misc_ops, 688 machine, "iocsr_misc", 0x428); 689 memory_region_add_subregion(&lvms->system_iocsr, 0, &lvms->iocsr_mem); 690 691 /* Init CPUs */ 692 mc->possible_cpu_arch_ids(machine); 693 for (i = 0; i < machine->smp.cpus; i++) { 694 cpuobj = object_new(machine->cpu_type); 695 if (cpuobj == NULL) { 696 error_report("Fail to create object with type %s ", 697 machine->cpu_type); 698 exit(EXIT_FAILURE); 699 } 700 qdev_realize_and_unref(DEVICE(cpuobj), NULL, &error_fatal); 701 } 702 fw_cfg_add_memory(machine); 703 704 /* Node0 memory */ 705 size = ram_size; 706 base = VIRT_LOWMEM_BASE; 707 if (size > VIRT_LOWMEM_SIZE) { 708 size = VIRT_LOWMEM_SIZE; 709 } 710 711 memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram", 712 machine->ram, base, size); 713 memory_region_add_subregion(address_space_mem, base, &lvms->lowmem); 714 base += size; 715 if (ram_size - size) { 716 base = VIRT_HIGHMEM_BASE; 717 memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram", 718 machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size); 719 memory_region_add_subregion(address_space_mem, base, &lvms->highmem); 720 base += ram_size - size; 721 } 722 723 /* initialize device memory address space */ 724 if (machine->ram_size < machine->maxram_size) { 725 ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; 726 727 if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { 728 error_report("unsupported amount of memory slots: %"PRIu64, 729 machine->ram_slots); 730 exit(EXIT_FAILURE); 731 } 732 733 if (QEMU_ALIGN_UP(machine->maxram_size, 734 TARGET_PAGE_SIZE) != machine->maxram_size) { 735 error_report("maximum memory size must by aligned to multiple of " 736 "%d bytes", TARGET_PAGE_SIZE); 737 exit(EXIT_FAILURE); 738 } 739 machine_memory_devices_init(machine, base, device_mem_size); 740 } 741 742 /* load the BIOS image. */ 743 virt_firmware_init(lvms); 744 745 /* fw_cfg init */ 746 lvms->fw_cfg = virt_fw_cfg_init(ram_size, machine); 747 rom_set_fw(lvms->fw_cfg); 748 if (lvms->fw_cfg != NULL) { 749 fw_cfg_add_file(lvms->fw_cfg, "etc/memmap", 750 lvms->memmap_table, 751 sizeof(struct memmap_entry) * lvms->memmap_entries); 752 } 753 754 /* Initialize the IO interrupt subsystem */ 755 virt_irq_init(lvms); 756 lvms->machine_done.notify = virt_done; 757 qemu_add_machine_init_done_notifier(&lvms->machine_done); 758 /* connect powerdown request */ 759 lvms->powerdown_notifier.notify = virt_powerdown_req; 760 qemu_register_powerdown_notifier(&lvms->powerdown_notifier); 761 762 lvms->bootinfo.ram_size = ram_size; 763 loongarch_load_kernel(machine, &lvms->bootinfo); 764 } 765 766 static void virt_get_acpi(Object *obj, Visitor *v, const char *name, 767 void *opaque, Error **errp) 768 { 769 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 770 OnOffAuto acpi = lvms->acpi; 771 772 visit_type_OnOffAuto(v, name, &acpi, errp); 773 } 774 775 static void virt_set_acpi(Object *obj, Visitor *v, const char *name, 776 void *opaque, Error **errp) 777 { 778 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 779 780 visit_type_OnOffAuto(v, name, &lvms->acpi, errp); 781 } 782 783 static char *virt_get_oem_id(Object *obj, Error **errp) 784 { 785 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 786 787 return g_strdup(lvms->oem_id); 788 } 789 790 static void virt_set_oem_id(Object *obj, const char *value, Error **errp) 791 { 792 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 793 size_t len = strlen(value); 794 795 if (len > 6) { 796 error_setg(errp, 797 "User specified oem-id value is bigger than 6 bytes in size"); 798 return; 799 } 800 801 strncpy(lvms->oem_id, value, 6); 802 } 803 804 static char *virt_get_oem_table_id(Object *obj, Error **errp) 805 { 806 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 807 808 return g_strdup(lvms->oem_table_id); 809 } 810 811 static void virt_set_oem_table_id(Object *obj, const char *value, 812 Error **errp) 813 { 814 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 815 size_t len = strlen(value); 816 817 if (len > 8) { 818 error_setg(errp, 819 "User specified oem-table-id value is bigger than 8 bytes in size"); 820 return; 821 } 822 strncpy(lvms->oem_table_id, value, 8); 823 } 824 825 static void virt_initfn(Object *obj) 826 { 827 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 828 829 if (tcg_enabled()) { 830 lvms->veiointc = ON_OFF_AUTO_OFF; 831 } 832 lvms->acpi = ON_OFF_AUTO_AUTO; 833 lvms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); 834 lvms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); 835 virt_flash_create(lvms); 836 } 837 838 static void virt_get_topo_from_index(MachineState *ms, 839 LoongArchCPUTopo *topo, int index) 840 { 841 topo->socket_id = index / (ms->smp.cores * ms->smp.threads); 842 topo->core_id = index / ms->smp.threads % ms->smp.cores; 843 topo->thread_id = index % ms->smp.threads; 844 } 845 846 static unsigned int topo_align_up(unsigned int count) 847 { 848 g_assert(count >= 1); 849 count -= 1; 850 return BIT(count ? 32 - clz32(count) : 0); 851 } 852 853 /* 854 * LoongArch Reference Manual Vol1, Chapter 7.4.12 CPU Identity 855 * For CPU architecture, bit0 .. bit8 is valid for CPU id, max cpuid is 512 856 * However for IPI/Eiointc interrupt controller, max supported cpu id for 857 * irq routingis 256 858 * 859 * Here max cpu id is 256 for virt machine 860 */ 861 static int virt_get_arch_id_from_topo(MachineState *ms, LoongArchCPUTopo *topo) 862 { 863 int arch_id, threads, cores, sockets; 864 865 threads = topo_align_up(ms->smp.threads); 866 cores = topo_align_up(ms->smp.cores); 867 sockets = topo_align_up(ms->smp.sockets); 868 if ((threads * cores * sockets) > 256) { 869 error_report("Exceeding max cpuid 256 with sockets[%d] cores[%d]" 870 " threads[%d]", ms->smp.sockets, ms->smp.cores, 871 ms->smp.threads); 872 exit(1); 873 } 874 875 arch_id = topo->thread_id + topo->core_id * threads; 876 arch_id += topo->socket_id * threads * cores; 877 return arch_id; 878 } 879 880 /* Find cpu slot in machine->possible_cpus by arch_id */ 881 static CPUArchId *virt_find_cpu_slot(MachineState *ms, int arch_id) 882 { 883 int n; 884 for (n = 0; n < ms->possible_cpus->len; n++) { 885 if (ms->possible_cpus->cpus[n].arch_id == arch_id) { 886 return &ms->possible_cpus->cpus[n]; 887 } 888 } 889 890 return NULL; 891 } 892 893 /* Find cpu slot for cold-plut CPU object where cpu is NULL */ 894 static CPUArchId *virt_find_empty_cpu_slot(MachineState *ms) 895 { 896 int n; 897 for (n = 0; n < ms->possible_cpus->len; n++) { 898 if (ms->possible_cpus->cpus[n].cpu == NULL) { 899 return &ms->possible_cpus->cpus[n]; 900 } 901 } 902 903 return NULL; 904 } 905 906 static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, 907 DeviceState *dev, Error **errp) 908 { 909 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 910 MachineState *ms = MACHINE(OBJECT(hotplug_dev)); 911 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 912 CPUState *cs = CPU(dev); 913 CPUArchId *cpu_slot; 914 LoongArchCPUTopo topo; 915 int arch_id; 916 917 if (lvms->acpi_ged) { 918 if ((cpu->thread_id < 0) || (cpu->thread_id >= ms->smp.threads)) { 919 error_setg(errp, 920 "Invalid thread-id %u specified, must be in range 1:%u", 921 cpu->thread_id, ms->smp.threads - 1); 922 return; 923 } 924 925 if ((cpu->core_id < 0) || (cpu->core_id >= ms->smp.cores)) { 926 error_setg(errp, 927 "Invalid core-id %u specified, must be in range 1:%u", 928 cpu->core_id, ms->smp.cores - 1); 929 return; 930 } 931 932 if ((cpu->socket_id < 0) || (cpu->socket_id >= ms->smp.sockets)) { 933 error_setg(errp, 934 "Invalid socket-id %u specified, must be in range 1:%u", 935 cpu->socket_id, ms->smp.sockets - 1); 936 return; 937 } 938 939 topo.socket_id = cpu->socket_id; 940 topo.core_id = cpu->core_id; 941 topo.thread_id = cpu->thread_id; 942 arch_id = virt_get_arch_id_from_topo(ms, &topo); 943 cpu_slot = virt_find_cpu_slot(ms, arch_id); 944 if (CPU(cpu_slot->cpu)) { 945 error_setg(errp, 946 "cpu(id%d=%d:%d:%d) with arch-id %" PRIu64 " exists", 947 cs->cpu_index, cpu->socket_id, cpu->core_id, 948 cpu->thread_id, cpu_slot->arch_id); 949 return; 950 } 951 } else { 952 /* For cold-add cpu, find empty cpu slot */ 953 cpu_slot = virt_find_empty_cpu_slot(ms); 954 topo.socket_id = cpu_slot->props.socket_id; 955 topo.core_id = cpu_slot->props.core_id; 956 topo.thread_id = cpu_slot->props.thread_id; 957 object_property_set_int(OBJECT(dev), "socket-id", topo.socket_id, NULL); 958 object_property_set_int(OBJECT(dev), "core-id", topo.core_id, NULL); 959 object_property_set_int(OBJECT(dev), "thread-id", topo.thread_id, NULL); 960 } 961 962 cpu->env.address_space_iocsr = &lvms->as_iocsr; 963 cpu->phy_id = cpu_slot->arch_id; 964 cs->cpu_index = cpu_slot - ms->possible_cpus->cpus; 965 numa_cpu_pre_plug(cpu_slot, dev, errp); 966 } 967 968 static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev, 969 DeviceState *dev, Error **errp) 970 { 971 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 972 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 973 CPUState *cs = CPU(dev); 974 975 if (cs->cpu_index == 0) { 976 error_setg(errp, "hot-unplug of boot cpu(id%d=%d:%d:%d) not supported", 977 cs->cpu_index, cpu->socket_id, 978 cpu->core_id, cpu->thread_id); 979 return; 980 } 981 982 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 983 } 984 985 static void virt_cpu_unplug(HotplugHandler *hotplug_dev, 986 DeviceState *dev, Error **errp) 987 { 988 CPUArchId *cpu_slot; 989 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 990 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 991 992 /* Notify ipi and extioi irqchip to remove interrupt routing to CPU */ 993 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->ipi), dev, &error_abort); 994 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->extioi), dev, &error_abort); 995 996 /* Notify acpi ged CPU removed */ 997 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &error_abort); 998 999 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 1000 cpu_slot->cpu = NULL; 1001 } 1002 1003 static void virt_cpu_plug(HotplugHandler *hotplug_dev, 1004 DeviceState *dev, Error **errp) 1005 { 1006 CPUArchId *cpu_slot; 1007 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 1008 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1009 1010 if (lvms->ipi) { 1011 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), dev, &error_abort); 1012 } 1013 1014 if (lvms->extioi) { 1015 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), dev, &error_abort); 1016 } 1017 1018 if (lvms->acpi_ged) { 1019 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, 1020 &error_abort); 1021 } 1022 1023 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 1024 cpu_slot->cpu = CPU(dev); 1025 } 1026 1027 static bool memhp_type_supported(DeviceState *dev) 1028 { 1029 /* we only support pc dimm now */ 1030 return object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) && 1031 !object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); 1032 } 1033 1034 static void virt_mem_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 1035 Error **errp) 1036 { 1037 pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), errp); 1038 } 1039 1040 static void virt_device_pre_plug(HotplugHandler *hotplug_dev, 1041 DeviceState *dev, Error **errp) 1042 { 1043 if (memhp_type_supported(dev)) { 1044 virt_mem_pre_plug(hotplug_dev, dev, errp); 1045 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1046 virt_cpu_pre_plug(hotplug_dev, dev, errp); 1047 } 1048 } 1049 1050 static void virt_mem_unplug_request(HotplugHandler *hotplug_dev, 1051 DeviceState *dev, Error **errp) 1052 { 1053 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1054 1055 /* the acpi ged is always exist */ 1056 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, 1057 errp); 1058 } 1059 1060 static void virt_device_unplug_request(HotplugHandler *hotplug_dev, 1061 DeviceState *dev, Error **errp) 1062 { 1063 if (memhp_type_supported(dev)) { 1064 virt_mem_unplug_request(hotplug_dev, dev, errp); 1065 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1066 virt_cpu_unplug_request(hotplug_dev, dev, errp); 1067 } 1068 } 1069 1070 static void virt_mem_unplug(HotplugHandler *hotplug_dev, 1071 DeviceState *dev, Error **errp) 1072 { 1073 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1074 1075 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 1076 pc_dimm_unplug(PC_DIMM(dev), MACHINE(lvms)); 1077 qdev_unrealize(dev); 1078 } 1079 1080 static void virt_device_unplug(HotplugHandler *hotplug_dev, 1081 DeviceState *dev, Error **errp) 1082 { 1083 if (memhp_type_supported(dev)) { 1084 virt_mem_unplug(hotplug_dev, dev, errp); 1085 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1086 virt_cpu_unplug(hotplug_dev, dev, errp); 1087 } 1088 } 1089 1090 static void virt_mem_plug(HotplugHandler *hotplug_dev, 1091 DeviceState *dev, Error **errp) 1092 { 1093 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1094 1095 pc_dimm_plug(PC_DIMM(dev), MACHINE(lvms)); 1096 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), 1097 dev, &error_abort); 1098 } 1099 1100 static void virt_device_plug_cb(HotplugHandler *hotplug_dev, 1101 DeviceState *dev, Error **errp) 1102 { 1103 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1104 MachineClass *mc = MACHINE_GET_CLASS(lvms); 1105 PlatformBusDevice *pbus; 1106 1107 if (device_is_dynamic_sysbus(mc, dev)) { 1108 if (lvms->platform_bus_dev) { 1109 pbus = PLATFORM_BUS_DEVICE(lvms->platform_bus_dev); 1110 platform_bus_link_device(pbus, SYS_BUS_DEVICE(dev)); 1111 } 1112 } else if (memhp_type_supported(dev)) { 1113 virt_mem_plug(hotplug_dev, dev, errp); 1114 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1115 virt_cpu_plug(hotplug_dev, dev, errp); 1116 } 1117 } 1118 1119 static HotplugHandler *virt_get_hotplug_handler(MachineState *machine, 1120 DeviceState *dev) 1121 { 1122 MachineClass *mc = MACHINE_GET_CLASS(machine); 1123 1124 if (device_is_dynamic_sysbus(mc, dev) || 1125 object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU) || 1126 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || 1127 memhp_type_supported(dev)) { 1128 return HOTPLUG_HANDLER(machine); 1129 } 1130 return NULL; 1131 } 1132 1133 static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) 1134 { 1135 int n, arch_id; 1136 unsigned int max_cpus = ms->smp.max_cpus; 1137 LoongArchCPUTopo topo; 1138 1139 if (ms->possible_cpus) { 1140 assert(ms->possible_cpus->len == max_cpus); 1141 return ms->possible_cpus; 1142 } 1143 1144 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + 1145 sizeof(CPUArchId) * max_cpus); 1146 ms->possible_cpus->len = max_cpus; 1147 for (n = 0; n < ms->possible_cpus->len; n++) { 1148 virt_get_topo_from_index(ms, &topo, n); 1149 arch_id = virt_get_arch_id_from_topo(ms, &topo); 1150 ms->possible_cpus->cpus[n].type = ms->cpu_type; 1151 ms->possible_cpus->cpus[n].arch_id = arch_id; 1152 ms->possible_cpus->cpus[n].vcpus_count = 1; 1153 ms->possible_cpus->cpus[n].props.has_socket_id = true; 1154 ms->possible_cpus->cpus[n].props.socket_id = topo.socket_id; 1155 ms->possible_cpus->cpus[n].props.has_core_id = true; 1156 ms->possible_cpus->cpus[n].props.core_id = topo.core_id; 1157 ms->possible_cpus->cpus[n].props.has_thread_id = true; 1158 ms->possible_cpus->cpus[n].props.thread_id = topo.thread_id; 1159 } 1160 return ms->possible_cpus; 1161 } 1162 1163 static CpuInstanceProperties virt_cpu_index_to_props(MachineState *ms, 1164 unsigned cpu_index) 1165 { 1166 MachineClass *mc = MACHINE_GET_CLASS(ms); 1167 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1168 1169 assert(cpu_index < possible_cpus->len); 1170 return possible_cpus->cpus[cpu_index].props; 1171 } 1172 1173 static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx) 1174 { 1175 int64_t socket_id; 1176 1177 if (ms->numa_state->num_nodes) { 1178 socket_id = ms->possible_cpus->cpus[idx].props.socket_id; 1179 return socket_id % ms->numa_state->num_nodes; 1180 } else { 1181 return 0; 1182 } 1183 } 1184 1185 static void virt_class_init(ObjectClass *oc, const void *data) 1186 { 1187 MachineClass *mc = MACHINE_CLASS(oc); 1188 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); 1189 1190 mc->init = virt_init; 1191 mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464"); 1192 mc->default_ram_id = "loongarch.ram"; 1193 mc->desc = "QEMU LoongArch Virtual Machine"; 1194 mc->max_cpus = LOONGARCH_MAX_CPUS; 1195 mc->is_default = 1; 1196 mc->default_kernel_irqchip_split = false; 1197 mc->block_default_type = IF_VIRTIO; 1198 mc->default_boot_order = "c"; 1199 mc->no_cdrom = 1; 1200 mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids; 1201 mc->cpu_index_to_instance_props = virt_cpu_index_to_props; 1202 mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; 1203 mc->numa_mem_supported = true; 1204 mc->auto_enable_numa_with_memhp = true; 1205 mc->auto_enable_numa_with_memdev = true; 1206 mc->has_hotpluggable_cpus = true; 1207 mc->get_hotplug_handler = virt_get_hotplug_handler; 1208 mc->default_nic = "virtio-net-pci"; 1209 hc->plug = virt_device_plug_cb; 1210 hc->pre_plug = virt_device_pre_plug; 1211 hc->unplug_request = virt_device_unplug_request; 1212 hc->unplug = virt_device_unplug; 1213 1214 object_class_property_add(oc, "acpi", "OnOffAuto", 1215 virt_get_acpi, virt_set_acpi, 1216 NULL, NULL); 1217 object_class_property_set_description(oc, "acpi", 1218 "Enable ACPI"); 1219 object_class_property_add(oc, "v-eiointc", "OnOffAuto", 1220 virt_get_veiointc, virt_set_veiointc, 1221 NULL, NULL); 1222 object_class_property_set_description(oc, "v-eiointc", 1223 "Enable Virt Extend I/O Interrupt Controller."); 1224 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); 1225 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_UEFI_VARS_SYSBUS); 1226 #ifdef CONFIG_TPM 1227 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); 1228 #endif 1229 object_class_property_add_str(oc, "x-oem-id", 1230 virt_get_oem_id, 1231 virt_set_oem_id); 1232 object_class_property_set_description(oc, "x-oem-id", 1233 "Override the default value of field OEMID " 1234 "in ACPI table header." 1235 "The string may be up to 6 bytes in size"); 1236 1237 1238 object_class_property_add_str(oc, "x-oem-table-id", 1239 virt_get_oem_table_id, 1240 virt_set_oem_table_id); 1241 object_class_property_set_description(oc, "x-oem-table-id", 1242 "Override the default value of field OEM Table ID " 1243 "in ACPI table header." 1244 "The string may be up to 8 bytes in size"); 1245 } 1246 1247 static const TypeInfo virt_machine_types[] = { 1248 { 1249 .name = TYPE_LOONGARCH_VIRT_MACHINE, 1250 .parent = TYPE_MACHINE, 1251 .instance_size = sizeof(LoongArchVirtMachineState), 1252 .class_init = virt_class_init, 1253 .instance_init = virt_initfn, 1254 .interfaces = (const InterfaceInfo[]) { 1255 { TYPE_HOTPLUG_HANDLER }, 1256 { } 1257 }, 1258 } 1259 }; 1260 1261 DEFINE_TYPES(virt_machine_types) 1262