1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * QEMU loongson 3a5000 develop board emulation 4 * 5 * Copyright (c) 2021 Loongson Technology Corporation Limited 6 */ 7 #include "qemu/osdep.h" 8 #include "qemu/units.h" 9 #include "qemu/datadir.h" 10 #include "qapi/error.h" 11 #include "exec/target_page.h" 12 #include "hw/boards.h" 13 #include "hw/char/serial-mm.h" 14 #include "system/kvm.h" 15 #include "system/tcg.h" 16 #include "system/system.h" 17 #include "system/qtest.h" 18 #include "system/runstate.h" 19 #include "system/reset.h" 20 #include "system/rtc.h" 21 #include "hw/loongarch/virt.h" 22 #include "system/address-spaces.h" 23 #include "hw/irq.h" 24 #include "net/net.h" 25 #include "hw/loader.h" 26 #include "elf.h" 27 #include "hw/intc/loongarch_ipi.h" 28 #include "hw/intc/loongarch_extioi.h" 29 #include "hw/intc/loongarch_pch_pic.h" 30 #include "hw/intc/loongarch_pch_msi.h" 31 #include "hw/pci-host/ls7a.h" 32 #include "hw/pci-host/gpex.h" 33 #include "hw/misc/unimp.h" 34 #include "hw/loongarch/fw_cfg.h" 35 #include "target/loongarch/cpu.h" 36 #include "hw/firmware/smbios.h" 37 #include "qapi/qapi-visit-common.h" 38 #include "hw/acpi/generic_event_device.h" 39 #include "hw/mem/nvdimm.h" 40 #include "hw/platform-bus.h" 41 #include "hw/display/ramfb.h" 42 #include "hw/uefi/var-service-api.h" 43 #include "hw/mem/pc-dimm.h" 44 #include "system/tpm.h" 45 #include "system/block-backend.h" 46 #include "hw/block/flash.h" 47 #include "hw/virtio/virtio-iommu.h" 48 #include "qemu/error-report.h" 49 50 static void virt_get_veiointc(Object *obj, Visitor *v, const char *name, 51 void *opaque, Error **errp) 52 { 53 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 54 OnOffAuto veiointc = lvms->veiointc; 55 56 visit_type_OnOffAuto(v, name, &veiointc, errp); 57 } 58 59 static void virt_set_veiointc(Object *obj, Visitor *v, const char *name, 60 void *opaque, Error **errp) 61 { 62 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 63 64 visit_type_OnOffAuto(v, name, &lvms->veiointc, errp); 65 } 66 67 static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, 68 const char *name, 69 const char *alias_prop_name) 70 { 71 DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); 72 73 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); 74 qdev_prop_set_uint8(dev, "width", 4); 75 qdev_prop_set_uint8(dev, "device-width", 2); 76 qdev_prop_set_bit(dev, "big-endian", false); 77 qdev_prop_set_uint16(dev, "id0", 0x89); 78 qdev_prop_set_uint16(dev, "id1", 0x18); 79 qdev_prop_set_uint16(dev, "id2", 0x00); 80 qdev_prop_set_uint16(dev, "id3", 0x00); 81 qdev_prop_set_string(dev, "name", name); 82 object_property_add_child(OBJECT(lvms), name, OBJECT(dev)); 83 object_property_add_alias(OBJECT(lvms), alias_prop_name, 84 OBJECT(dev), "drive"); 85 return PFLASH_CFI01(dev); 86 } 87 88 static void virt_flash_create(LoongArchVirtMachineState *lvms) 89 { 90 lvms->flash[0] = virt_flash_create1(lvms, "virt.flash0", "pflash0"); 91 lvms->flash[1] = virt_flash_create1(lvms, "virt.flash1", "pflash1"); 92 } 93 94 static void virt_flash_map1(PFlashCFI01 *flash, 95 hwaddr base, hwaddr size, 96 MemoryRegion *sysmem) 97 { 98 DeviceState *dev = DEVICE(flash); 99 BlockBackend *blk; 100 hwaddr real_size = size; 101 102 blk = pflash_cfi01_get_blk(flash); 103 if (blk) { 104 real_size = blk_getlength(blk); 105 assert(real_size && real_size <= size); 106 } 107 108 assert(QEMU_IS_ALIGNED(real_size, VIRT_FLASH_SECTOR_SIZE)); 109 assert(real_size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX); 110 111 qdev_prop_set_uint32(dev, "num-blocks", real_size / VIRT_FLASH_SECTOR_SIZE); 112 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 113 memory_region_add_subregion(sysmem, base, 114 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); 115 } 116 117 static void virt_flash_map(LoongArchVirtMachineState *lvms, 118 MemoryRegion *sysmem) 119 { 120 PFlashCFI01 *flash0 = lvms->flash[0]; 121 PFlashCFI01 *flash1 = lvms->flash[1]; 122 123 virt_flash_map1(flash0, VIRT_FLASH0_BASE, VIRT_FLASH0_SIZE, sysmem); 124 virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem); 125 } 126 127 static void virt_build_smbios(LoongArchVirtMachineState *lvms) 128 { 129 MachineState *ms = MACHINE(lvms); 130 MachineClass *mc = MACHINE_GET_CLASS(lvms); 131 uint8_t *smbios_tables, *smbios_anchor; 132 size_t smbios_tables_len, smbios_anchor_len; 133 const char *product = "QEMU Virtual Machine"; 134 135 if (!lvms->fw_cfg) { 136 return; 137 } 138 139 if (kvm_enabled()) { 140 product = "KVM Virtual Machine"; 141 } 142 143 smbios_set_defaults("QEMU", product, mc->name); 144 145 smbios_get_tables(ms, SMBIOS_ENTRY_POINT_TYPE_64, 146 NULL, 0, 147 &smbios_tables, &smbios_tables_len, 148 &smbios_anchor, &smbios_anchor_len, &error_fatal); 149 150 if (smbios_anchor) { 151 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-tables", 152 smbios_tables, smbios_tables_len); 153 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-anchor", 154 smbios_anchor, smbios_anchor_len); 155 } 156 } 157 158 static void virt_done(Notifier *notifier, void *data) 159 { 160 LoongArchVirtMachineState *lvms = container_of(notifier, 161 LoongArchVirtMachineState, machine_done); 162 virt_build_smbios(lvms); 163 virt_acpi_setup(lvms); 164 virt_fdt_setup(lvms); 165 } 166 167 static void virt_powerdown_req(Notifier *notifier, void *opaque) 168 { 169 LoongArchVirtMachineState *s; 170 171 s = container_of(notifier, LoongArchVirtMachineState, powerdown_notifier); 172 acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS); 173 } 174 175 static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type) 176 { 177 /* Ensure there are no duplicate entries. */ 178 for (unsigned i = 0; i < memmap_entries; i++) { 179 assert(memmap_table[i].address != address); 180 } 181 182 memmap_table = g_renew(struct memmap_entry, memmap_table, 183 memmap_entries + 1); 184 memmap_table[memmap_entries].address = cpu_to_le64(address); 185 memmap_table[memmap_entries].length = cpu_to_le64(length); 186 memmap_table[memmap_entries].type = cpu_to_le32(type); 187 memmap_table[memmap_entries].reserved = 0; 188 memmap_entries++; 189 } 190 191 static DeviceState *create_acpi_ged(DeviceState *pch_pic, 192 LoongArchVirtMachineState *lvms) 193 { 194 DeviceState *dev; 195 MachineState *ms = MACHINE(lvms); 196 MachineClass *mc = MACHINE_GET_CLASS(lvms); 197 uint32_t event = ACPI_GED_PWR_DOWN_EVT; 198 199 if (ms->ram_slots) { 200 event |= ACPI_GED_MEM_HOTPLUG_EVT; 201 } 202 203 if (mc->has_hotpluggable_cpus) { 204 event |= ACPI_GED_CPU_HOTPLUG_EVT; 205 } 206 207 dev = qdev_new(TYPE_ACPI_GED); 208 qdev_prop_set_uint32(dev, "ged-event", event); 209 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 210 211 /* ged event */ 212 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VIRT_GED_EVT_ADDR); 213 /* memory hotplug */ 214 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, VIRT_GED_MEM_ADDR); 215 /* ged regs used for reset and power down */ 216 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR); 217 218 if (mc->has_hotpluggable_cpus) { 219 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 3, VIRT_GED_CPUHP_ADDR); 220 } 221 222 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 223 qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE)); 224 return dev; 225 } 226 227 static DeviceState *create_platform_bus(DeviceState *pch_pic) 228 { 229 DeviceState *dev; 230 SysBusDevice *sysbus; 231 int i, irq; 232 MemoryRegion *sysmem = get_system_memory(); 233 234 dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); 235 dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); 236 qdev_prop_set_uint32(dev, "num_irqs", VIRT_PLATFORM_BUS_NUM_IRQS); 237 qdev_prop_set_uint32(dev, "mmio_size", VIRT_PLATFORM_BUS_SIZE); 238 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 239 240 sysbus = SYS_BUS_DEVICE(dev); 241 for (i = 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) { 242 irq = VIRT_PLATFORM_BUS_IRQ - VIRT_GSI_BASE + i; 243 sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(pch_pic, irq)); 244 } 245 246 memory_region_add_subregion(sysmem, 247 VIRT_PLATFORM_BUS_BASEADDRESS, 248 sysbus_mmio_get_region(sysbus, 0)); 249 return dev; 250 } 251 252 static void virt_devices_init(DeviceState *pch_pic, 253 LoongArchVirtMachineState *lvms) 254 { 255 MachineClass *mc = MACHINE_GET_CLASS(lvms); 256 DeviceState *gpex_dev; 257 SysBusDevice *d; 258 PCIBus *pci_bus; 259 MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg; 260 MemoryRegion *mmio_alias, *mmio_reg; 261 int i; 262 263 gpex_dev = qdev_new(TYPE_GPEX_HOST); 264 d = SYS_BUS_DEVICE(gpex_dev); 265 sysbus_realize_and_unref(d, &error_fatal); 266 pci_bus = PCI_HOST_BRIDGE(gpex_dev)->bus; 267 lvms->pci_bus = pci_bus; 268 269 /* Map only part size_ecam bytes of ECAM space */ 270 ecam_alias = g_new0(MemoryRegion, 1); 271 ecam_reg = sysbus_mmio_get_region(d, 0); 272 memory_region_init_alias(ecam_alias, OBJECT(gpex_dev), "pcie-ecam", 273 ecam_reg, 0, VIRT_PCI_CFG_SIZE); 274 memory_region_add_subregion(get_system_memory(), VIRT_PCI_CFG_BASE, 275 ecam_alias); 276 277 /* Map PCI mem space */ 278 mmio_alias = g_new0(MemoryRegion, 1); 279 mmio_reg = sysbus_mmio_get_region(d, 1); 280 memory_region_init_alias(mmio_alias, OBJECT(gpex_dev), "pcie-mmio", 281 mmio_reg, VIRT_PCI_MEM_BASE, VIRT_PCI_MEM_SIZE); 282 memory_region_add_subregion(get_system_memory(), VIRT_PCI_MEM_BASE, 283 mmio_alias); 284 285 /* Map PCI IO port space. */ 286 pio_alias = g_new0(MemoryRegion, 1); 287 pio_reg = sysbus_mmio_get_region(d, 2); 288 memory_region_init_alias(pio_alias, OBJECT(gpex_dev), "pcie-io", pio_reg, 289 VIRT_PCI_IO_OFFSET, VIRT_PCI_IO_SIZE); 290 memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE, 291 pio_alias); 292 293 for (i = 0; i < PCI_NUM_PINS; i++) { 294 sysbus_connect_irq(d, i, 295 qdev_get_gpio_in(pch_pic, 16 + i)); 296 gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); 297 } 298 299 /* 300 * Create uart fdt node in reverse order so that they appear 301 * in the finished device tree lowest address first 302 */ 303 for (i = VIRT_UART_COUNT; i-- > 0;) { 304 hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; 305 int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE; 306 serial_mm_init(get_system_memory(), base, 0, 307 qdev_get_gpio_in(pch_pic, irq), 308 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); 309 } 310 311 /* Network init */ 312 pci_init_nic_devices(pci_bus, mc->default_nic); 313 314 /* 315 * There are some invalid guest memory access. 316 * Create some unimplemented devices to emulate this. 317 */ 318 create_unimplemented_device("pci-dma-cfg", 0x1001041c, 0x4); 319 sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, 320 qdev_get_gpio_in(pch_pic, 321 VIRT_RTC_IRQ - VIRT_GSI_BASE)); 322 323 /* acpi ged */ 324 lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); 325 /* platform bus */ 326 lvms->platform_bus_dev = create_platform_bus(pch_pic); 327 } 328 329 static void virt_cpu_irq_init(LoongArchVirtMachineState *lvms) 330 { 331 int num; 332 MachineState *ms = MACHINE(lvms); 333 MachineClass *mc = MACHINE_GET_CLASS(ms); 334 const CPUArchIdList *possible_cpus; 335 CPUState *cs; 336 337 /* cpu nodes */ 338 possible_cpus = mc->possible_cpu_arch_ids(ms); 339 for (num = 0; num < possible_cpus->len; num++) { 340 cs = possible_cpus->cpus[num].cpu; 341 if (cs == NULL) { 342 continue; 343 } 344 345 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), DEVICE(cs), 346 &error_abort); 347 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), DEVICE(cs), 348 &error_abort); 349 } 350 } 351 352 static void virt_irq_init(LoongArchVirtMachineState *lvms) 353 { 354 DeviceState *pch_pic, *pch_msi; 355 DeviceState *ipi, *extioi; 356 SysBusDevice *d; 357 int i, start, num; 358 359 /* 360 * Extended IRQ model. 361 * | 362 * +-----------+ +-------------|--------+ +-----------+ 363 * | IPI/Timer | --> | CPUINTC(0-3)|(4-255) | <-- | IPI/Timer | 364 * +-----------+ +-------------|--------+ +-----------+ 365 * ^ | 366 * | 367 * +---------+ 368 * | EIOINTC | 369 * +---------+ 370 * ^ ^ 371 * | | 372 * +---------+ +---------+ 373 * | PCH-PIC | | PCH-MSI | 374 * +---------+ +---------+ 375 * ^ ^ ^ 376 * | | | 377 * +--------+ +---------+ +---------+ 378 * | UARTs | | Devices | | Devices | 379 * +--------+ +---------+ +---------+ 380 * 381 * Virt extended IRQ model. 382 * 383 * +-----+ +---------------+ +-------+ 384 * | IPI |--> | CPUINTC(0-255)| <-- | Timer | 385 * +-----+ +---------------+ +-------+ 386 * ^ 387 * | 388 * +-----------+ 389 * | V-EIOINTC | 390 * +-----------+ 391 * ^ ^ 392 * | | 393 * +---------+ +---------+ 394 * | PCH-PIC | | PCH-MSI | 395 * +---------+ +---------+ 396 * ^ ^ ^ 397 * | | | 398 * +--------+ +---------+ +---------+ 399 * | UARTs | | Devices | | Devices | 400 * +--------+ +---------+ +---------+ 401 */ 402 403 /* Create IPI device */ 404 ipi = qdev_new(TYPE_LOONGARCH_IPI); 405 lvms->ipi = ipi; 406 sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); 407 408 /* IPI iocsr memory region */ 409 memory_region_add_subregion(&lvms->system_iocsr, SMP_IPI_MAILBOX, 410 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0)); 411 memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, 412 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); 413 414 /* Create EXTIOI device */ 415 extioi = qdev_new(TYPE_LOONGARCH_EXTIOI); 416 lvms->extioi = extioi; 417 if (virt_is_veiointc_enabled(lvms)) { 418 qdev_prop_set_bit(extioi, "has-virtualization-extension", true); 419 } 420 sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal); 421 memory_region_add_subregion(&lvms->system_iocsr, APIC_BASE, 422 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); 423 if (virt_is_veiointc_enabled(lvms)) { 424 memory_region_add_subregion(&lvms->system_iocsr, EXTIOI_VIRT_BASE, 425 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 1)); 426 } 427 428 virt_cpu_irq_init(lvms); 429 pch_pic = qdev_new(TYPE_LOONGARCH_PIC); 430 num = VIRT_PCH_PIC_IRQ_NUM; 431 qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); 432 d = SYS_BUS_DEVICE(pch_pic); 433 sysbus_realize_and_unref(d, &error_fatal); 434 memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE, 435 sysbus_mmio_get_region(d, 0)); 436 437 /* Connect pch_pic irqs to extioi */ 438 for (i = 0; i < num; i++) { 439 qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); 440 } 441 442 pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); 443 start = num; 444 num = EXTIOI_IRQS - start; 445 qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); 446 qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); 447 d = SYS_BUS_DEVICE(pch_msi); 448 sysbus_realize_and_unref(d, &error_fatal); 449 sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW); 450 for (i = 0; i < num; i++) { 451 /* Connect pch_msi irqs to extioi */ 452 qdev_connect_gpio_out(DEVICE(d), i, 453 qdev_get_gpio_in(extioi, i + start)); 454 } 455 456 virt_devices_init(pch_pic, lvms); 457 } 458 459 static void virt_firmware_init(LoongArchVirtMachineState *lvms) 460 { 461 char *filename = MACHINE(lvms)->firmware; 462 char *bios_name = NULL; 463 int bios_size, i; 464 BlockBackend *pflash_blk0; 465 MemoryRegion *mr; 466 467 lvms->bios_loaded = false; 468 469 /* Map legacy -drive if=pflash to machine properties */ 470 for (i = 0; i < ARRAY_SIZE(lvms->flash); i++) { 471 pflash_cfi01_legacy_drive(lvms->flash[i], 472 drive_get(IF_PFLASH, 0, i)); 473 } 474 475 virt_flash_map(lvms, get_system_memory()); 476 477 pflash_blk0 = pflash_cfi01_get_blk(lvms->flash[0]); 478 479 if (pflash_blk0) { 480 if (filename) { 481 error_report("cannot use both '-bios' and '-drive if=pflash'" 482 "options at once"); 483 exit(1); 484 } 485 lvms->bios_loaded = true; 486 return; 487 } 488 489 if (filename) { 490 bios_name = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename); 491 if (!bios_name) { 492 error_report("Could not find ROM image '%s'", filename); 493 exit(1); 494 } 495 496 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(lvms->flash[0]), 0); 497 bios_size = load_image_mr(bios_name, mr); 498 if (bios_size < 0) { 499 error_report("Could not load ROM image '%s'", bios_name); 500 exit(1); 501 } 502 g_free(bios_name); 503 lvms->bios_loaded = true; 504 } 505 } 506 507 static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, 508 uint64_t val, unsigned size, 509 MemTxAttrs attrs) 510 { 511 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 512 uint64_t features; 513 514 switch (addr) { 515 case MISC_FUNC_REG: 516 if (!virt_is_veiointc_enabled(lvms)) { 517 return MEMTX_OK; 518 } 519 520 features = address_space_ldl(&lvms->as_iocsr, 521 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 522 attrs, NULL); 523 if (val & BIT_ULL(IOCSRM_EXTIOI_EN)) { 524 features |= BIT(EXTIOI_ENABLE); 525 } 526 if (val & BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE)) { 527 features |= BIT(EXTIOI_ENABLE_INT_ENCODE); 528 } 529 530 address_space_stl(&lvms->as_iocsr, 531 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 532 features, attrs, NULL); 533 break; 534 default: 535 g_assert_not_reached(); 536 } 537 538 return MEMTX_OK; 539 } 540 541 static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, 542 uint64_t *data, 543 unsigned size, MemTxAttrs attrs) 544 { 545 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 546 uint64_t ret = 0; 547 int features; 548 549 switch (addr) { 550 case VERSION_REG: 551 ret = 0x11ULL; 552 break; 553 case FEATURE_REG: 554 ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI); 555 if (kvm_enabled()) { 556 ret |= BIT(IOCSRF_VM); 557 } 558 break; 559 case VENDOR_REG: 560 ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */ 561 break; 562 case CPUNAME_REG: 563 ret = 0x303030354133ULL; /* "3A5000" */ 564 break; 565 case MISC_FUNC_REG: 566 if (!virt_is_veiointc_enabled(lvms)) { 567 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 568 break; 569 } 570 571 features = address_space_ldl(&lvms->as_iocsr, 572 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 573 attrs, NULL); 574 if (features & BIT(EXTIOI_ENABLE)) { 575 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 576 } 577 if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) { 578 ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE); 579 } 580 break; 581 default: 582 g_assert_not_reached(); 583 } 584 585 *data = ret; 586 return MEMTX_OK; 587 } 588 589 static const MemoryRegionOps virt_iocsr_misc_ops = { 590 .read_with_attrs = virt_iocsr_misc_read, 591 .write_with_attrs = virt_iocsr_misc_write, 592 .endianness = DEVICE_LITTLE_ENDIAN, 593 .valid = { 594 .min_access_size = 4, 595 .max_access_size = 8, 596 }, 597 .impl = { 598 .min_access_size = 8, 599 .max_access_size = 8, 600 }, 601 }; 602 603 static void fw_cfg_add_memory(MachineState *ms) 604 { 605 hwaddr base, size, ram_size, gap; 606 int nb_numa_nodes, nodes; 607 NodeInfo *numa_info; 608 609 ram_size = ms->ram_size; 610 base = VIRT_LOWMEM_BASE; 611 gap = VIRT_LOWMEM_SIZE; 612 nodes = nb_numa_nodes = ms->numa_state->num_nodes; 613 numa_info = ms->numa_state->nodes; 614 if (!nodes) { 615 nodes = 1; 616 } 617 618 /* add fw_cfg memory map of node0 */ 619 if (nb_numa_nodes) { 620 size = numa_info[0].node_mem; 621 } else { 622 size = ram_size; 623 } 624 625 if (size >= gap) { 626 memmap_add_entry(base, gap, 1); 627 size -= gap; 628 base = VIRT_HIGHMEM_BASE; 629 } 630 631 if (size) { 632 memmap_add_entry(base, size, 1); 633 base += size; 634 } 635 636 if (nodes < 2) { 637 return; 638 } 639 640 /* add fw_cfg memory map of other nodes */ 641 if (numa_info[0].node_mem < gap && ram_size > gap) { 642 /* 643 * memory map for the maining nodes splited into two part 644 * lowram: [base, +(gap - numa_info[0].node_mem)) 645 * highram: [VIRT_HIGHMEM_BASE, +(ram_size - gap)) 646 */ 647 memmap_add_entry(base, gap - numa_info[0].node_mem, 1); 648 size = ram_size - gap; 649 base = VIRT_HIGHMEM_BASE; 650 } else { 651 size = ram_size - numa_info[0].node_mem; 652 } 653 654 if (size) { 655 memmap_add_entry(base, size, 1); 656 } 657 } 658 659 static void virt_init(MachineState *machine) 660 { 661 const char *cpu_model = machine->cpu_type; 662 MemoryRegion *address_space_mem = get_system_memory(); 663 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine); 664 int i; 665 hwaddr base, size, ram_size = machine->ram_size; 666 MachineClass *mc = MACHINE_GET_CLASS(machine); 667 Object *cpuobj; 668 669 if (!cpu_model) { 670 cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); 671 } 672 673 /* Create IOCSR space */ 674 memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, 675 machine, "iocsr", UINT64_MAX); 676 address_space_init(&lvms->as_iocsr, &lvms->system_iocsr, "IOCSR"); 677 memory_region_init_io(&lvms->iocsr_mem, OBJECT(machine), 678 &virt_iocsr_misc_ops, 679 machine, "iocsr_misc", 0x428); 680 memory_region_add_subregion(&lvms->system_iocsr, 0, &lvms->iocsr_mem); 681 682 /* Init CPUs */ 683 mc->possible_cpu_arch_ids(machine); 684 for (i = 0; i < machine->smp.cpus; i++) { 685 cpuobj = object_new(machine->cpu_type); 686 if (cpuobj == NULL) { 687 error_report("Fail to create object with type %s ", 688 machine->cpu_type); 689 exit(EXIT_FAILURE); 690 } 691 qdev_realize_and_unref(DEVICE(cpuobj), NULL, &error_fatal); 692 } 693 fw_cfg_add_memory(machine); 694 695 /* Node0 memory */ 696 size = ram_size; 697 base = VIRT_LOWMEM_BASE; 698 if (size > VIRT_LOWMEM_SIZE) { 699 size = VIRT_LOWMEM_SIZE; 700 } 701 702 memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram", 703 machine->ram, base, size); 704 memory_region_add_subregion(address_space_mem, base, &lvms->lowmem); 705 base += size; 706 if (ram_size - size) { 707 base = VIRT_HIGHMEM_BASE; 708 memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram", 709 machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size); 710 memory_region_add_subregion(address_space_mem, base, &lvms->highmem); 711 base += ram_size - size; 712 } 713 714 /* initialize device memory address space */ 715 if (machine->ram_size < machine->maxram_size) { 716 ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; 717 718 if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { 719 error_report("unsupported amount of memory slots: %"PRIu64, 720 machine->ram_slots); 721 exit(EXIT_FAILURE); 722 } 723 724 if (QEMU_ALIGN_UP(machine->maxram_size, 725 TARGET_PAGE_SIZE) != machine->maxram_size) { 726 error_report("maximum memory size must by aligned to multiple of " 727 "%d bytes", TARGET_PAGE_SIZE); 728 exit(EXIT_FAILURE); 729 } 730 machine_memory_devices_init(machine, base, device_mem_size); 731 } 732 733 /* load the BIOS image. */ 734 virt_firmware_init(lvms); 735 736 /* fw_cfg init */ 737 lvms->fw_cfg = virt_fw_cfg_init(ram_size, machine); 738 rom_set_fw(lvms->fw_cfg); 739 if (lvms->fw_cfg != NULL) { 740 fw_cfg_add_file(lvms->fw_cfg, "etc/memmap", 741 memmap_table, 742 sizeof(struct memmap_entry) * (memmap_entries)); 743 } 744 745 /* Initialize the IO interrupt subsystem */ 746 virt_irq_init(lvms); 747 lvms->machine_done.notify = virt_done; 748 qemu_add_machine_init_done_notifier(&lvms->machine_done); 749 /* connect powerdown request */ 750 lvms->powerdown_notifier.notify = virt_powerdown_req; 751 qemu_register_powerdown_notifier(&lvms->powerdown_notifier); 752 753 lvms->bootinfo.ram_size = ram_size; 754 loongarch_load_kernel(machine, &lvms->bootinfo); 755 } 756 757 static void virt_get_acpi(Object *obj, Visitor *v, const char *name, 758 void *opaque, Error **errp) 759 { 760 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 761 OnOffAuto acpi = lvms->acpi; 762 763 visit_type_OnOffAuto(v, name, &acpi, errp); 764 } 765 766 static void virt_set_acpi(Object *obj, Visitor *v, const char *name, 767 void *opaque, Error **errp) 768 { 769 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 770 771 visit_type_OnOffAuto(v, name, &lvms->acpi, errp); 772 } 773 774 static char *virt_get_oem_id(Object *obj, Error **errp) 775 { 776 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 777 778 return g_strdup(lvms->oem_id); 779 } 780 781 static void virt_set_oem_id(Object *obj, const char *value, Error **errp) 782 { 783 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 784 size_t len = strlen(value); 785 786 if (len > 6) { 787 error_setg(errp, 788 "User specified oem-id value is bigger than 6 bytes in size"); 789 return; 790 } 791 792 strncpy(lvms->oem_id, value, 6); 793 } 794 795 static char *virt_get_oem_table_id(Object *obj, Error **errp) 796 { 797 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 798 799 return g_strdup(lvms->oem_table_id); 800 } 801 802 static void virt_set_oem_table_id(Object *obj, const char *value, 803 Error **errp) 804 { 805 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 806 size_t len = strlen(value); 807 808 if (len > 8) { 809 error_setg(errp, 810 "User specified oem-table-id value is bigger than 8 bytes in size"); 811 return; 812 } 813 strncpy(lvms->oem_table_id, value, 8); 814 } 815 816 static void virt_initfn(Object *obj) 817 { 818 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 819 820 if (tcg_enabled()) { 821 lvms->veiointc = ON_OFF_AUTO_OFF; 822 } 823 lvms->acpi = ON_OFF_AUTO_AUTO; 824 lvms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); 825 lvms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); 826 virt_flash_create(lvms); 827 } 828 829 static void virt_get_topo_from_index(MachineState *ms, 830 LoongArchCPUTopo *topo, int index) 831 { 832 topo->socket_id = index / (ms->smp.cores * ms->smp.threads); 833 topo->core_id = index / ms->smp.threads % ms->smp.cores; 834 topo->thread_id = index % ms->smp.threads; 835 } 836 837 static unsigned int topo_align_up(unsigned int count) 838 { 839 g_assert(count >= 1); 840 count -= 1; 841 return BIT(count ? 32 - clz32(count) : 0); 842 } 843 844 /* 845 * LoongArch Reference Manual Vol1, Chapter 7.4.12 CPU Identity 846 * For CPU architecture, bit0 .. bit8 is valid for CPU id, max cpuid is 512 847 * However for IPI/Eiointc interrupt controller, max supported cpu id for 848 * irq routingis 256 849 * 850 * Here max cpu id is 256 for virt machine 851 */ 852 static int virt_get_arch_id_from_topo(MachineState *ms, LoongArchCPUTopo *topo) 853 { 854 int arch_id, threads, cores, sockets; 855 856 threads = topo_align_up(ms->smp.threads); 857 cores = topo_align_up(ms->smp.cores); 858 sockets = topo_align_up(ms->smp.sockets); 859 if ((threads * cores * sockets) > 256) { 860 error_report("Exceeding max cpuid 256 with sockets[%d] cores[%d]" 861 " threads[%d]", ms->smp.sockets, ms->smp.cores, 862 ms->smp.threads); 863 exit(1); 864 } 865 866 arch_id = topo->thread_id + topo->core_id * threads; 867 arch_id += topo->socket_id * threads * cores; 868 return arch_id; 869 } 870 871 /* Find cpu slot in machine->possible_cpus by arch_id */ 872 static CPUArchId *virt_find_cpu_slot(MachineState *ms, int arch_id) 873 { 874 int n; 875 for (n = 0; n < ms->possible_cpus->len; n++) { 876 if (ms->possible_cpus->cpus[n].arch_id == arch_id) { 877 return &ms->possible_cpus->cpus[n]; 878 } 879 } 880 881 return NULL; 882 } 883 884 /* Find cpu slot for cold-plut CPU object where cpu is NULL */ 885 static CPUArchId *virt_find_empty_cpu_slot(MachineState *ms) 886 { 887 int n; 888 for (n = 0; n < ms->possible_cpus->len; n++) { 889 if (ms->possible_cpus->cpus[n].cpu == NULL) { 890 return &ms->possible_cpus->cpus[n]; 891 } 892 } 893 894 return NULL; 895 } 896 897 static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, 898 DeviceState *dev, Error **errp) 899 { 900 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 901 MachineState *ms = MACHINE(OBJECT(hotplug_dev)); 902 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 903 CPUState *cs = CPU(dev); 904 CPUArchId *cpu_slot; 905 LoongArchCPUTopo topo; 906 int arch_id; 907 908 if (lvms->acpi_ged) { 909 if ((cpu->thread_id < 0) || (cpu->thread_id >= ms->smp.threads)) { 910 error_setg(errp, 911 "Invalid thread-id %u specified, must be in range 1:%u", 912 cpu->thread_id, ms->smp.threads - 1); 913 return; 914 } 915 916 if ((cpu->core_id < 0) || (cpu->core_id >= ms->smp.cores)) { 917 error_setg(errp, 918 "Invalid core-id %u specified, must be in range 1:%u", 919 cpu->core_id, ms->smp.cores - 1); 920 return; 921 } 922 923 if ((cpu->socket_id < 0) || (cpu->socket_id >= ms->smp.sockets)) { 924 error_setg(errp, 925 "Invalid socket-id %u specified, must be in range 1:%u", 926 cpu->socket_id, ms->smp.sockets - 1); 927 return; 928 } 929 930 topo.socket_id = cpu->socket_id; 931 topo.core_id = cpu->core_id; 932 topo.thread_id = cpu->thread_id; 933 arch_id = virt_get_arch_id_from_topo(ms, &topo); 934 cpu_slot = virt_find_cpu_slot(ms, arch_id); 935 if (CPU(cpu_slot->cpu)) { 936 error_setg(errp, 937 "cpu(id%d=%d:%d:%d) with arch-id %" PRIu64 " exists", 938 cs->cpu_index, cpu->socket_id, cpu->core_id, 939 cpu->thread_id, cpu_slot->arch_id); 940 return; 941 } 942 } else { 943 /* For cold-add cpu, find empty cpu slot */ 944 cpu_slot = virt_find_empty_cpu_slot(ms); 945 topo.socket_id = cpu_slot->props.socket_id; 946 topo.core_id = cpu_slot->props.core_id; 947 topo.thread_id = cpu_slot->props.thread_id; 948 object_property_set_int(OBJECT(dev), "socket-id", topo.socket_id, NULL); 949 object_property_set_int(OBJECT(dev), "core-id", topo.core_id, NULL); 950 object_property_set_int(OBJECT(dev), "thread-id", topo.thread_id, NULL); 951 } 952 953 cpu->env.address_space_iocsr = &lvms->as_iocsr; 954 cpu->phy_id = cpu_slot->arch_id; 955 cs->cpu_index = cpu_slot - ms->possible_cpus->cpus; 956 numa_cpu_pre_plug(cpu_slot, dev, errp); 957 } 958 959 static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev, 960 DeviceState *dev, Error **errp) 961 { 962 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 963 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 964 CPUState *cs = CPU(dev); 965 966 if (cs->cpu_index == 0) { 967 error_setg(errp, "hot-unplug of boot cpu(id%d=%d:%d:%d) not supported", 968 cs->cpu_index, cpu->socket_id, 969 cpu->core_id, cpu->thread_id); 970 return; 971 } 972 973 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 974 } 975 976 static void virt_cpu_unplug(HotplugHandler *hotplug_dev, 977 DeviceState *dev, Error **errp) 978 { 979 CPUArchId *cpu_slot; 980 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 981 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 982 983 /* Notify ipi and extioi irqchip to remove interrupt routing to CPU */ 984 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->ipi), dev, &error_abort); 985 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->extioi), dev, &error_abort); 986 987 /* Notify acpi ged CPU removed */ 988 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &error_abort); 989 990 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 991 cpu_slot->cpu = NULL; 992 } 993 994 static void virt_cpu_plug(HotplugHandler *hotplug_dev, 995 DeviceState *dev, Error **errp) 996 { 997 CPUArchId *cpu_slot; 998 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 999 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1000 1001 if (lvms->ipi) { 1002 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), dev, &error_abort); 1003 } 1004 1005 if (lvms->extioi) { 1006 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), dev, &error_abort); 1007 } 1008 1009 if (lvms->acpi_ged) { 1010 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, 1011 &error_abort); 1012 } 1013 1014 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 1015 cpu_slot->cpu = CPU(dev); 1016 } 1017 1018 static bool memhp_type_supported(DeviceState *dev) 1019 { 1020 /* we only support pc dimm now */ 1021 return object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) && 1022 !object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); 1023 } 1024 1025 static void virt_mem_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 1026 Error **errp) 1027 { 1028 pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), errp); 1029 } 1030 1031 static void virt_device_pre_plug(HotplugHandler *hotplug_dev, 1032 DeviceState *dev, Error **errp) 1033 { 1034 if (memhp_type_supported(dev)) { 1035 virt_mem_pre_plug(hotplug_dev, dev, errp); 1036 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1037 virt_cpu_pre_plug(hotplug_dev, dev, errp); 1038 } 1039 } 1040 1041 static void virt_mem_unplug_request(HotplugHandler *hotplug_dev, 1042 DeviceState *dev, Error **errp) 1043 { 1044 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1045 1046 /* the acpi ged is always exist */ 1047 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, 1048 errp); 1049 } 1050 1051 static void virt_device_unplug_request(HotplugHandler *hotplug_dev, 1052 DeviceState *dev, Error **errp) 1053 { 1054 if (memhp_type_supported(dev)) { 1055 virt_mem_unplug_request(hotplug_dev, dev, errp); 1056 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1057 virt_cpu_unplug_request(hotplug_dev, dev, errp); 1058 } 1059 } 1060 1061 static void virt_mem_unplug(HotplugHandler *hotplug_dev, 1062 DeviceState *dev, Error **errp) 1063 { 1064 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1065 1066 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 1067 pc_dimm_unplug(PC_DIMM(dev), MACHINE(lvms)); 1068 qdev_unrealize(dev); 1069 } 1070 1071 static void virt_device_unplug(HotplugHandler *hotplug_dev, 1072 DeviceState *dev, Error **errp) 1073 { 1074 if (memhp_type_supported(dev)) { 1075 virt_mem_unplug(hotplug_dev, dev, errp); 1076 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1077 virt_cpu_unplug(hotplug_dev, dev, errp); 1078 } 1079 } 1080 1081 static void virt_mem_plug(HotplugHandler *hotplug_dev, 1082 DeviceState *dev, Error **errp) 1083 { 1084 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1085 1086 pc_dimm_plug(PC_DIMM(dev), MACHINE(lvms)); 1087 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), 1088 dev, &error_abort); 1089 } 1090 1091 static void virt_device_plug_cb(HotplugHandler *hotplug_dev, 1092 DeviceState *dev, Error **errp) 1093 { 1094 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1095 MachineClass *mc = MACHINE_GET_CLASS(lvms); 1096 PlatformBusDevice *pbus; 1097 1098 if (device_is_dynamic_sysbus(mc, dev)) { 1099 if (lvms->platform_bus_dev) { 1100 pbus = PLATFORM_BUS_DEVICE(lvms->platform_bus_dev); 1101 platform_bus_link_device(pbus, SYS_BUS_DEVICE(dev)); 1102 } 1103 } else if (memhp_type_supported(dev)) { 1104 virt_mem_plug(hotplug_dev, dev, errp); 1105 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1106 virt_cpu_plug(hotplug_dev, dev, errp); 1107 } 1108 } 1109 1110 static HotplugHandler *virt_get_hotplug_handler(MachineState *machine, 1111 DeviceState *dev) 1112 { 1113 MachineClass *mc = MACHINE_GET_CLASS(machine); 1114 1115 if (device_is_dynamic_sysbus(mc, dev) || 1116 object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU) || 1117 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || 1118 memhp_type_supported(dev)) { 1119 return HOTPLUG_HANDLER(machine); 1120 } 1121 return NULL; 1122 } 1123 1124 static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) 1125 { 1126 int n, arch_id; 1127 unsigned int max_cpus = ms->smp.max_cpus; 1128 LoongArchCPUTopo topo; 1129 1130 if (ms->possible_cpus) { 1131 assert(ms->possible_cpus->len == max_cpus); 1132 return ms->possible_cpus; 1133 } 1134 1135 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + 1136 sizeof(CPUArchId) * max_cpus); 1137 ms->possible_cpus->len = max_cpus; 1138 for (n = 0; n < ms->possible_cpus->len; n++) { 1139 virt_get_topo_from_index(ms, &topo, n); 1140 arch_id = virt_get_arch_id_from_topo(ms, &topo); 1141 ms->possible_cpus->cpus[n].type = ms->cpu_type; 1142 ms->possible_cpus->cpus[n].arch_id = arch_id; 1143 ms->possible_cpus->cpus[n].vcpus_count = 1; 1144 ms->possible_cpus->cpus[n].props.has_socket_id = true; 1145 ms->possible_cpus->cpus[n].props.socket_id = topo.socket_id; 1146 ms->possible_cpus->cpus[n].props.has_core_id = true; 1147 ms->possible_cpus->cpus[n].props.core_id = topo.core_id; 1148 ms->possible_cpus->cpus[n].props.has_thread_id = true; 1149 ms->possible_cpus->cpus[n].props.thread_id = topo.thread_id; 1150 } 1151 return ms->possible_cpus; 1152 } 1153 1154 static CpuInstanceProperties virt_cpu_index_to_props(MachineState *ms, 1155 unsigned cpu_index) 1156 { 1157 MachineClass *mc = MACHINE_GET_CLASS(ms); 1158 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1159 1160 assert(cpu_index < possible_cpus->len); 1161 return possible_cpus->cpus[cpu_index].props; 1162 } 1163 1164 static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx) 1165 { 1166 int64_t socket_id; 1167 1168 if (ms->numa_state->num_nodes) { 1169 socket_id = ms->possible_cpus->cpus[idx].props.socket_id; 1170 return socket_id % ms->numa_state->num_nodes; 1171 } else { 1172 return 0; 1173 } 1174 } 1175 1176 static void virt_class_init(ObjectClass *oc, const void *data) 1177 { 1178 MachineClass *mc = MACHINE_CLASS(oc); 1179 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); 1180 1181 mc->init = virt_init; 1182 mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464"); 1183 mc->default_ram_id = "loongarch.ram"; 1184 mc->desc = "QEMU LoongArch Virtual Machine"; 1185 mc->max_cpus = LOONGARCH_MAX_CPUS; 1186 mc->is_default = 1; 1187 mc->default_kernel_irqchip_split = false; 1188 mc->block_default_type = IF_VIRTIO; 1189 mc->default_boot_order = "c"; 1190 mc->no_cdrom = 1; 1191 mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids; 1192 mc->cpu_index_to_instance_props = virt_cpu_index_to_props; 1193 mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; 1194 mc->numa_mem_supported = true; 1195 mc->auto_enable_numa_with_memhp = true; 1196 mc->auto_enable_numa_with_memdev = true; 1197 mc->has_hotpluggable_cpus = true; 1198 mc->get_hotplug_handler = virt_get_hotplug_handler; 1199 mc->default_nic = "virtio-net-pci"; 1200 hc->plug = virt_device_plug_cb; 1201 hc->pre_plug = virt_device_pre_plug; 1202 hc->unplug_request = virt_device_unplug_request; 1203 hc->unplug = virt_device_unplug; 1204 1205 object_class_property_add(oc, "acpi", "OnOffAuto", 1206 virt_get_acpi, virt_set_acpi, 1207 NULL, NULL); 1208 object_class_property_set_description(oc, "acpi", 1209 "Enable ACPI"); 1210 object_class_property_add(oc, "v-eiointc", "OnOffAuto", 1211 virt_get_veiointc, virt_set_veiointc, 1212 NULL, NULL); 1213 object_class_property_set_description(oc, "v-eiointc", 1214 "Enable Virt Extend I/O Interrupt Controller."); 1215 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); 1216 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_UEFI_VARS_SYSBUS); 1217 #ifdef CONFIG_TPM 1218 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); 1219 #endif 1220 object_class_property_add_str(oc, "x-oem-id", 1221 virt_get_oem_id, 1222 virt_set_oem_id); 1223 object_class_property_set_description(oc, "x-oem-id", 1224 "Override the default value of field OEMID " 1225 "in ACPI table header." 1226 "The string may be up to 6 bytes in size"); 1227 1228 1229 object_class_property_add_str(oc, "x-oem-table-id", 1230 virt_get_oem_table_id, 1231 virt_set_oem_table_id); 1232 object_class_property_set_description(oc, "x-oem-table-id", 1233 "Override the default value of field OEM Table ID " 1234 "in ACPI table header." 1235 "The string may be up to 8 bytes in size"); 1236 } 1237 1238 static const TypeInfo virt_machine_types[] = { 1239 { 1240 .name = TYPE_LOONGARCH_VIRT_MACHINE, 1241 .parent = TYPE_MACHINE, 1242 .instance_size = sizeof(LoongArchVirtMachineState), 1243 .class_init = virt_class_init, 1244 .instance_init = virt_initfn, 1245 .interfaces = (const InterfaceInfo[]) { 1246 { TYPE_HOTPLUG_HANDLER }, 1247 { } 1248 }, 1249 } 1250 }; 1251 1252 DEFINE_TYPES(virt_machine_types) 1253