1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * QEMU loongson 3a5000 develop board emulation 4 * 5 * Copyright (c) 2021 Loongson Technology Corporation Limited 6 */ 7 #include "qemu/osdep.h" 8 #include "qemu/units.h" 9 #include "qemu/datadir.h" 10 #include "qapi/error.h" 11 #include "hw/boards.h" 12 #include "hw/char/serial-mm.h" 13 #include "system/kvm.h" 14 #include "system/tcg.h" 15 #include "system/system.h" 16 #include "system/qtest.h" 17 #include "system/runstate.h" 18 #include "system/reset.h" 19 #include "system/rtc.h" 20 #include "hw/loongarch/virt.h" 21 #include "exec/address-spaces.h" 22 #include "hw/irq.h" 23 #include "net/net.h" 24 #include "hw/loader.h" 25 #include "elf.h" 26 #include "hw/intc/loongarch_ipi.h" 27 #include "hw/intc/loongarch_extioi.h" 28 #include "hw/intc/loongarch_pch_pic.h" 29 #include "hw/intc/loongarch_pch_msi.h" 30 #include "hw/pci-host/ls7a.h" 31 #include "hw/pci-host/gpex.h" 32 #include "hw/misc/unimp.h" 33 #include "hw/loongarch/fw_cfg.h" 34 #include "target/loongarch/cpu.h" 35 #include "hw/firmware/smbios.h" 36 #include "qapi/qapi-visit-common.h" 37 #include "hw/acpi/generic_event_device.h" 38 #include "hw/mem/nvdimm.h" 39 #include "hw/platform-bus.h" 40 #include "hw/display/ramfb.h" 41 #include "hw/uefi/var-service-api.h" 42 #include "hw/mem/pc-dimm.h" 43 #include "system/tpm.h" 44 #include "system/block-backend.h" 45 #include "hw/block/flash.h" 46 #include "hw/virtio/virtio-iommu.h" 47 #include "qemu/error-report.h" 48 49 static void virt_get_veiointc(Object *obj, Visitor *v, const char *name, 50 void *opaque, Error **errp) 51 { 52 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 53 OnOffAuto veiointc = lvms->veiointc; 54 55 visit_type_OnOffAuto(v, name, &veiointc, errp); 56 } 57 58 static void virt_set_veiointc(Object *obj, Visitor *v, const char *name, 59 void *opaque, Error **errp) 60 { 61 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 62 63 visit_type_OnOffAuto(v, name, &lvms->veiointc, errp); 64 } 65 66 static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, 67 const char *name, 68 const char *alias_prop_name) 69 { 70 DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); 71 72 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); 73 qdev_prop_set_uint8(dev, "width", 4); 74 qdev_prop_set_uint8(dev, "device-width", 2); 75 qdev_prop_set_bit(dev, "big-endian", false); 76 qdev_prop_set_uint16(dev, "id0", 0x89); 77 qdev_prop_set_uint16(dev, "id1", 0x18); 78 qdev_prop_set_uint16(dev, "id2", 0x00); 79 qdev_prop_set_uint16(dev, "id3", 0x00); 80 qdev_prop_set_string(dev, "name", name); 81 object_property_add_child(OBJECT(lvms), name, OBJECT(dev)); 82 object_property_add_alias(OBJECT(lvms), alias_prop_name, 83 OBJECT(dev), "drive"); 84 return PFLASH_CFI01(dev); 85 } 86 87 static void virt_flash_create(LoongArchVirtMachineState *lvms) 88 { 89 lvms->flash[0] = virt_flash_create1(lvms, "virt.flash0", "pflash0"); 90 lvms->flash[1] = virt_flash_create1(lvms, "virt.flash1", "pflash1"); 91 } 92 93 static void virt_flash_map1(PFlashCFI01 *flash, 94 hwaddr base, hwaddr size, 95 MemoryRegion *sysmem) 96 { 97 DeviceState *dev = DEVICE(flash); 98 BlockBackend *blk; 99 hwaddr real_size = size; 100 101 blk = pflash_cfi01_get_blk(flash); 102 if (blk) { 103 real_size = blk_getlength(blk); 104 assert(real_size && real_size <= size); 105 } 106 107 assert(QEMU_IS_ALIGNED(real_size, VIRT_FLASH_SECTOR_SIZE)); 108 assert(real_size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX); 109 110 qdev_prop_set_uint32(dev, "num-blocks", real_size / VIRT_FLASH_SECTOR_SIZE); 111 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 112 memory_region_add_subregion(sysmem, base, 113 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); 114 } 115 116 static void virt_flash_map(LoongArchVirtMachineState *lvms, 117 MemoryRegion *sysmem) 118 { 119 PFlashCFI01 *flash0 = lvms->flash[0]; 120 PFlashCFI01 *flash1 = lvms->flash[1]; 121 122 virt_flash_map1(flash0, VIRT_FLASH0_BASE, VIRT_FLASH0_SIZE, sysmem); 123 virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem); 124 } 125 126 static void virt_build_smbios(LoongArchVirtMachineState *lvms) 127 { 128 MachineState *ms = MACHINE(lvms); 129 MachineClass *mc = MACHINE_GET_CLASS(lvms); 130 uint8_t *smbios_tables, *smbios_anchor; 131 size_t smbios_tables_len, smbios_anchor_len; 132 const char *product = "QEMU Virtual Machine"; 133 134 if (!lvms->fw_cfg) { 135 return; 136 } 137 138 smbios_set_defaults("QEMU", product, mc->name); 139 140 smbios_get_tables(ms, SMBIOS_ENTRY_POINT_TYPE_64, 141 NULL, 0, 142 &smbios_tables, &smbios_tables_len, 143 &smbios_anchor, &smbios_anchor_len, &error_fatal); 144 145 if (smbios_anchor) { 146 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-tables", 147 smbios_tables, smbios_tables_len); 148 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-anchor", 149 smbios_anchor, smbios_anchor_len); 150 } 151 } 152 153 static void virt_done(Notifier *notifier, void *data) 154 { 155 LoongArchVirtMachineState *lvms = container_of(notifier, 156 LoongArchVirtMachineState, machine_done); 157 virt_build_smbios(lvms); 158 virt_acpi_setup(lvms); 159 virt_fdt_setup(lvms); 160 } 161 162 static void virt_powerdown_req(Notifier *notifier, void *opaque) 163 { 164 LoongArchVirtMachineState *s; 165 166 s = container_of(notifier, LoongArchVirtMachineState, powerdown_notifier); 167 acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS); 168 } 169 170 static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type) 171 { 172 /* Ensure there are no duplicate entries. */ 173 for (unsigned i = 0; i < memmap_entries; i++) { 174 assert(memmap_table[i].address != address); 175 } 176 177 memmap_table = g_renew(struct memmap_entry, memmap_table, 178 memmap_entries + 1); 179 memmap_table[memmap_entries].address = cpu_to_le64(address); 180 memmap_table[memmap_entries].length = cpu_to_le64(length); 181 memmap_table[memmap_entries].type = cpu_to_le32(type); 182 memmap_table[memmap_entries].reserved = 0; 183 memmap_entries++; 184 } 185 186 static DeviceState *create_acpi_ged(DeviceState *pch_pic, 187 LoongArchVirtMachineState *lvms) 188 { 189 DeviceState *dev; 190 MachineState *ms = MACHINE(lvms); 191 MachineClass *mc = MACHINE_GET_CLASS(lvms); 192 uint32_t event = ACPI_GED_PWR_DOWN_EVT; 193 194 if (ms->ram_slots) { 195 event |= ACPI_GED_MEM_HOTPLUG_EVT; 196 } 197 198 if (mc->has_hotpluggable_cpus) { 199 event |= ACPI_GED_CPU_HOTPLUG_EVT; 200 } 201 202 dev = qdev_new(TYPE_ACPI_GED); 203 qdev_prop_set_uint32(dev, "ged-event", event); 204 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 205 206 /* ged event */ 207 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VIRT_GED_EVT_ADDR); 208 /* memory hotplug */ 209 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, VIRT_GED_MEM_ADDR); 210 /* ged regs used for reset and power down */ 211 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR); 212 213 if (mc->has_hotpluggable_cpus) { 214 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 3, VIRT_GED_CPUHP_ADDR); 215 } 216 217 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 218 qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE)); 219 return dev; 220 } 221 222 static DeviceState *create_platform_bus(DeviceState *pch_pic) 223 { 224 DeviceState *dev; 225 SysBusDevice *sysbus; 226 int i, irq; 227 MemoryRegion *sysmem = get_system_memory(); 228 229 dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); 230 dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); 231 qdev_prop_set_uint32(dev, "num_irqs", VIRT_PLATFORM_BUS_NUM_IRQS); 232 qdev_prop_set_uint32(dev, "mmio_size", VIRT_PLATFORM_BUS_SIZE); 233 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 234 235 sysbus = SYS_BUS_DEVICE(dev); 236 for (i = 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) { 237 irq = VIRT_PLATFORM_BUS_IRQ - VIRT_GSI_BASE + i; 238 sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(pch_pic, irq)); 239 } 240 241 memory_region_add_subregion(sysmem, 242 VIRT_PLATFORM_BUS_BASEADDRESS, 243 sysbus_mmio_get_region(sysbus, 0)); 244 return dev; 245 } 246 247 static void virt_devices_init(DeviceState *pch_pic, 248 LoongArchVirtMachineState *lvms) 249 { 250 MachineClass *mc = MACHINE_GET_CLASS(lvms); 251 DeviceState *gpex_dev; 252 SysBusDevice *d; 253 PCIBus *pci_bus; 254 MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg; 255 MemoryRegion *mmio_alias, *mmio_reg; 256 int i; 257 258 gpex_dev = qdev_new(TYPE_GPEX_HOST); 259 d = SYS_BUS_DEVICE(gpex_dev); 260 sysbus_realize_and_unref(d, &error_fatal); 261 pci_bus = PCI_HOST_BRIDGE(gpex_dev)->bus; 262 lvms->pci_bus = pci_bus; 263 264 /* Map only part size_ecam bytes of ECAM space */ 265 ecam_alias = g_new0(MemoryRegion, 1); 266 ecam_reg = sysbus_mmio_get_region(d, 0); 267 memory_region_init_alias(ecam_alias, OBJECT(gpex_dev), "pcie-ecam", 268 ecam_reg, 0, VIRT_PCI_CFG_SIZE); 269 memory_region_add_subregion(get_system_memory(), VIRT_PCI_CFG_BASE, 270 ecam_alias); 271 272 /* Map PCI mem space */ 273 mmio_alias = g_new0(MemoryRegion, 1); 274 mmio_reg = sysbus_mmio_get_region(d, 1); 275 memory_region_init_alias(mmio_alias, OBJECT(gpex_dev), "pcie-mmio", 276 mmio_reg, VIRT_PCI_MEM_BASE, VIRT_PCI_MEM_SIZE); 277 memory_region_add_subregion(get_system_memory(), VIRT_PCI_MEM_BASE, 278 mmio_alias); 279 280 /* Map PCI IO port space. */ 281 pio_alias = g_new0(MemoryRegion, 1); 282 pio_reg = sysbus_mmio_get_region(d, 2); 283 memory_region_init_alias(pio_alias, OBJECT(gpex_dev), "pcie-io", pio_reg, 284 VIRT_PCI_IO_OFFSET, VIRT_PCI_IO_SIZE); 285 memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE, 286 pio_alias); 287 288 for (i = 0; i < PCI_NUM_PINS; i++) { 289 sysbus_connect_irq(d, i, 290 qdev_get_gpio_in(pch_pic, 16 + i)); 291 gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); 292 } 293 294 /* 295 * Create uart fdt node in reverse order so that they appear 296 * in the finished device tree lowest address first 297 */ 298 for (i = VIRT_UART_COUNT; i-- > 0;) { 299 hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; 300 int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE; 301 serial_mm_init(get_system_memory(), base, 0, 302 qdev_get_gpio_in(pch_pic, irq), 303 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); 304 } 305 306 /* Network init */ 307 pci_init_nic_devices(pci_bus, mc->default_nic); 308 309 /* 310 * There are some invalid guest memory access. 311 * Create some unimplemented devices to emulate this. 312 */ 313 create_unimplemented_device("pci-dma-cfg", 0x1001041c, 0x4); 314 sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, 315 qdev_get_gpio_in(pch_pic, 316 VIRT_RTC_IRQ - VIRT_GSI_BASE)); 317 318 /* acpi ged */ 319 lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); 320 /* platform bus */ 321 lvms->platform_bus_dev = create_platform_bus(pch_pic); 322 } 323 324 static void virt_cpu_irq_init(LoongArchVirtMachineState *lvms) 325 { 326 int num; 327 MachineState *ms = MACHINE(lvms); 328 MachineClass *mc = MACHINE_GET_CLASS(ms); 329 const CPUArchIdList *possible_cpus; 330 CPUState *cs; 331 332 /* cpu nodes */ 333 possible_cpus = mc->possible_cpu_arch_ids(ms); 334 for (num = 0; num < possible_cpus->len; num++) { 335 cs = possible_cpus->cpus[num].cpu; 336 if (cs == NULL) { 337 continue; 338 } 339 340 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), DEVICE(cs), 341 &error_abort); 342 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), DEVICE(cs), 343 &error_abort); 344 } 345 } 346 347 static void virt_irq_init(LoongArchVirtMachineState *lvms) 348 { 349 DeviceState *pch_pic, *pch_msi; 350 DeviceState *ipi, *extioi; 351 SysBusDevice *d; 352 int i, start, num; 353 354 /* 355 * Extended IRQ model. 356 * | 357 * +-----------+ +-------------|--------+ +-----------+ 358 * | IPI/Timer | --> | CPUINTC(0-3)|(4-255) | <-- | IPI/Timer | 359 * +-----------+ +-------------|--------+ +-----------+ 360 * ^ | 361 * | 362 * +---------+ 363 * | EIOINTC | 364 * +---------+ 365 * ^ ^ 366 * | | 367 * +---------+ +---------+ 368 * | PCH-PIC | | PCH-MSI | 369 * +---------+ +---------+ 370 * ^ ^ ^ 371 * | | | 372 * +--------+ +---------+ +---------+ 373 * | UARTs | | Devices | | Devices | 374 * +--------+ +---------+ +---------+ 375 * 376 * Virt extended IRQ model. 377 * 378 * +-----+ +---------------+ +-------+ 379 * | IPI |--> | CPUINTC(0-255)| <-- | Timer | 380 * +-----+ +---------------+ +-------+ 381 * ^ 382 * | 383 * +-----------+ 384 * | V-EIOINTC | 385 * +-----------+ 386 * ^ ^ 387 * | | 388 * +---------+ +---------+ 389 * | PCH-PIC | | PCH-MSI | 390 * +---------+ +---------+ 391 * ^ ^ ^ 392 * | | | 393 * +--------+ +---------+ +---------+ 394 * | UARTs | | Devices | | Devices | 395 * +--------+ +---------+ +---------+ 396 */ 397 398 /* Create IPI device */ 399 ipi = qdev_new(TYPE_LOONGARCH_IPI); 400 lvms->ipi = ipi; 401 sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); 402 403 /* IPI iocsr memory region */ 404 memory_region_add_subregion(&lvms->system_iocsr, SMP_IPI_MAILBOX, 405 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0)); 406 memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, 407 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); 408 409 /* Create EXTIOI device */ 410 extioi = qdev_new(TYPE_LOONGARCH_EXTIOI); 411 lvms->extioi = extioi; 412 if (virt_is_veiointc_enabled(lvms)) { 413 qdev_prop_set_bit(extioi, "has-virtualization-extension", true); 414 } 415 sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal); 416 memory_region_add_subregion(&lvms->system_iocsr, APIC_BASE, 417 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); 418 if (virt_is_veiointc_enabled(lvms)) { 419 memory_region_add_subregion(&lvms->system_iocsr, EXTIOI_VIRT_BASE, 420 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 1)); 421 } 422 423 virt_cpu_irq_init(lvms); 424 pch_pic = qdev_new(TYPE_LOONGARCH_PIC); 425 num = VIRT_PCH_PIC_IRQ_NUM; 426 qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); 427 d = SYS_BUS_DEVICE(pch_pic); 428 sysbus_realize_and_unref(d, &error_fatal); 429 memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE, 430 sysbus_mmio_get_region(d, 0)); 431 memory_region_add_subregion(get_system_memory(), 432 VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY_OFFSET, 433 sysbus_mmio_get_region(d, 1)); 434 memory_region_add_subregion(get_system_memory(), 435 VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS_LO, 436 sysbus_mmio_get_region(d, 2)); 437 438 /* Connect pch_pic irqs to extioi */ 439 for (i = 0; i < num; i++) { 440 qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); 441 } 442 443 pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); 444 start = num; 445 num = EXTIOI_IRQS - start; 446 qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); 447 qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); 448 d = SYS_BUS_DEVICE(pch_msi); 449 sysbus_realize_and_unref(d, &error_fatal); 450 sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW); 451 for (i = 0; i < num; i++) { 452 /* Connect pch_msi irqs to extioi */ 453 qdev_connect_gpio_out(DEVICE(d), i, 454 qdev_get_gpio_in(extioi, i + start)); 455 } 456 457 virt_devices_init(pch_pic, lvms); 458 } 459 460 static void virt_firmware_init(LoongArchVirtMachineState *lvms) 461 { 462 char *filename = MACHINE(lvms)->firmware; 463 char *bios_name = NULL; 464 int bios_size, i; 465 BlockBackend *pflash_blk0; 466 MemoryRegion *mr; 467 468 lvms->bios_loaded = false; 469 470 /* Map legacy -drive if=pflash to machine properties */ 471 for (i = 0; i < ARRAY_SIZE(lvms->flash); i++) { 472 pflash_cfi01_legacy_drive(lvms->flash[i], 473 drive_get(IF_PFLASH, 0, i)); 474 } 475 476 virt_flash_map(lvms, get_system_memory()); 477 478 pflash_blk0 = pflash_cfi01_get_blk(lvms->flash[0]); 479 480 if (pflash_blk0) { 481 if (filename) { 482 error_report("cannot use both '-bios' and '-drive if=pflash'" 483 "options at once"); 484 exit(1); 485 } 486 lvms->bios_loaded = true; 487 return; 488 } 489 490 if (filename) { 491 bios_name = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename); 492 if (!bios_name) { 493 error_report("Could not find ROM image '%s'", filename); 494 exit(1); 495 } 496 497 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(lvms->flash[0]), 0); 498 bios_size = load_image_mr(bios_name, mr); 499 if (bios_size < 0) { 500 error_report("Could not load ROM image '%s'", bios_name); 501 exit(1); 502 } 503 g_free(bios_name); 504 lvms->bios_loaded = true; 505 } 506 } 507 508 static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, 509 uint64_t val, unsigned size, 510 MemTxAttrs attrs) 511 { 512 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 513 uint64_t features; 514 515 switch (addr) { 516 case MISC_FUNC_REG: 517 if (!virt_is_veiointc_enabled(lvms)) { 518 return MEMTX_OK; 519 } 520 521 features = address_space_ldl(&lvms->as_iocsr, 522 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 523 attrs, NULL); 524 if (val & BIT_ULL(IOCSRM_EXTIOI_EN)) { 525 features |= BIT(EXTIOI_ENABLE); 526 } 527 if (val & BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE)) { 528 features |= BIT(EXTIOI_ENABLE_INT_ENCODE); 529 } 530 531 address_space_stl(&lvms->as_iocsr, 532 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 533 features, attrs, NULL); 534 break; 535 default: 536 g_assert_not_reached(); 537 } 538 539 return MEMTX_OK; 540 } 541 542 static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, 543 uint64_t *data, 544 unsigned size, MemTxAttrs attrs) 545 { 546 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 547 uint64_t ret = 0; 548 int features; 549 550 switch (addr) { 551 case VERSION_REG: 552 ret = 0x11ULL; 553 break; 554 case FEATURE_REG: 555 ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI); 556 if (kvm_enabled()) { 557 ret |= BIT(IOCSRF_VM); 558 } 559 break; 560 case VENDOR_REG: 561 ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */ 562 break; 563 case CPUNAME_REG: 564 ret = 0x303030354133ULL; /* "3A5000" */ 565 break; 566 case MISC_FUNC_REG: 567 if (!virt_is_veiointc_enabled(lvms)) { 568 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 569 break; 570 } 571 572 features = address_space_ldl(&lvms->as_iocsr, 573 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 574 attrs, NULL); 575 if (features & BIT(EXTIOI_ENABLE)) { 576 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 577 } 578 if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) { 579 ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE); 580 } 581 break; 582 default: 583 g_assert_not_reached(); 584 } 585 586 *data = ret; 587 return MEMTX_OK; 588 } 589 590 static const MemoryRegionOps virt_iocsr_misc_ops = { 591 .read_with_attrs = virt_iocsr_misc_read, 592 .write_with_attrs = virt_iocsr_misc_write, 593 .endianness = DEVICE_LITTLE_ENDIAN, 594 .valid = { 595 .min_access_size = 4, 596 .max_access_size = 8, 597 }, 598 .impl = { 599 .min_access_size = 8, 600 .max_access_size = 8, 601 }, 602 }; 603 604 static void fw_cfg_add_memory(MachineState *ms) 605 { 606 hwaddr base, size, ram_size, gap; 607 int nb_numa_nodes, nodes; 608 NodeInfo *numa_info; 609 610 ram_size = ms->ram_size; 611 base = VIRT_LOWMEM_BASE; 612 gap = VIRT_LOWMEM_SIZE; 613 nodes = nb_numa_nodes = ms->numa_state->num_nodes; 614 numa_info = ms->numa_state->nodes; 615 if (!nodes) { 616 nodes = 1; 617 } 618 619 /* add fw_cfg memory map of node0 */ 620 if (nb_numa_nodes) { 621 size = numa_info[0].node_mem; 622 } else { 623 size = ram_size; 624 } 625 626 if (size >= gap) { 627 memmap_add_entry(base, gap, 1); 628 size -= gap; 629 base = VIRT_HIGHMEM_BASE; 630 } 631 632 if (size) { 633 memmap_add_entry(base, size, 1); 634 base += size; 635 } 636 637 if (nodes < 2) { 638 return; 639 } 640 641 /* add fw_cfg memory map of other nodes */ 642 if (numa_info[0].node_mem < gap && ram_size > gap) { 643 /* 644 * memory map for the maining nodes splited into two part 645 * lowram: [base, +(gap - numa_info[0].node_mem)) 646 * highram: [VIRT_HIGHMEM_BASE, +(ram_size - gap)) 647 */ 648 memmap_add_entry(base, gap - numa_info[0].node_mem, 1); 649 size = ram_size - gap; 650 base = VIRT_HIGHMEM_BASE; 651 } else { 652 size = ram_size - numa_info[0].node_mem; 653 } 654 655 if (size) { 656 memmap_add_entry(base, size, 1); 657 } 658 } 659 660 static void virt_init(MachineState *machine) 661 { 662 const char *cpu_model = machine->cpu_type; 663 MemoryRegion *address_space_mem = get_system_memory(); 664 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine); 665 int i; 666 hwaddr base, size, ram_size = machine->ram_size; 667 MachineClass *mc = MACHINE_GET_CLASS(machine); 668 Object *cpuobj; 669 670 if (!cpu_model) { 671 cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); 672 } 673 674 /* Create IOCSR space */ 675 memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, 676 machine, "iocsr", UINT64_MAX); 677 address_space_init(&lvms->as_iocsr, &lvms->system_iocsr, "IOCSR"); 678 memory_region_init_io(&lvms->iocsr_mem, OBJECT(machine), 679 &virt_iocsr_misc_ops, 680 machine, "iocsr_misc", 0x428); 681 memory_region_add_subregion(&lvms->system_iocsr, 0, &lvms->iocsr_mem); 682 683 /* Init CPUs */ 684 mc->possible_cpu_arch_ids(machine); 685 for (i = 0; i < machine->smp.cpus; i++) { 686 cpuobj = object_new(machine->cpu_type); 687 if (cpuobj == NULL) { 688 error_report("Fail to create object with type %s ", 689 machine->cpu_type); 690 exit(EXIT_FAILURE); 691 } 692 qdev_realize_and_unref(DEVICE(cpuobj), NULL, &error_fatal); 693 } 694 fw_cfg_add_memory(machine); 695 696 /* Node0 memory */ 697 size = ram_size; 698 base = VIRT_LOWMEM_BASE; 699 if (size > VIRT_LOWMEM_SIZE) { 700 size = VIRT_LOWMEM_SIZE; 701 } 702 703 memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram", 704 machine->ram, base, size); 705 memory_region_add_subregion(address_space_mem, base, &lvms->lowmem); 706 base += size; 707 if (ram_size - size) { 708 base = VIRT_HIGHMEM_BASE; 709 memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram", 710 machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size); 711 memory_region_add_subregion(address_space_mem, base, &lvms->highmem); 712 base += ram_size - size; 713 } 714 715 /* initialize device memory address space */ 716 if (machine->ram_size < machine->maxram_size) { 717 ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; 718 719 if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { 720 error_report("unsupported amount of memory slots: %"PRIu64, 721 machine->ram_slots); 722 exit(EXIT_FAILURE); 723 } 724 725 if (QEMU_ALIGN_UP(machine->maxram_size, 726 TARGET_PAGE_SIZE) != machine->maxram_size) { 727 error_report("maximum memory size must by aligned to multiple of " 728 "%d bytes", TARGET_PAGE_SIZE); 729 exit(EXIT_FAILURE); 730 } 731 machine_memory_devices_init(machine, base, device_mem_size); 732 } 733 734 /* load the BIOS image. */ 735 virt_firmware_init(lvms); 736 737 /* fw_cfg init */ 738 lvms->fw_cfg = virt_fw_cfg_init(ram_size, machine); 739 rom_set_fw(lvms->fw_cfg); 740 if (lvms->fw_cfg != NULL) { 741 fw_cfg_add_file(lvms->fw_cfg, "etc/memmap", 742 memmap_table, 743 sizeof(struct memmap_entry) * (memmap_entries)); 744 } 745 746 /* Initialize the IO interrupt subsystem */ 747 virt_irq_init(lvms); 748 lvms->machine_done.notify = virt_done; 749 qemu_add_machine_init_done_notifier(&lvms->machine_done); 750 /* connect powerdown request */ 751 lvms->powerdown_notifier.notify = virt_powerdown_req; 752 qemu_register_powerdown_notifier(&lvms->powerdown_notifier); 753 754 lvms->bootinfo.ram_size = ram_size; 755 loongarch_load_kernel(machine, &lvms->bootinfo); 756 } 757 758 static void virt_get_acpi(Object *obj, Visitor *v, const char *name, 759 void *opaque, Error **errp) 760 { 761 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 762 OnOffAuto acpi = lvms->acpi; 763 764 visit_type_OnOffAuto(v, name, &acpi, errp); 765 } 766 767 static void virt_set_acpi(Object *obj, Visitor *v, const char *name, 768 void *opaque, Error **errp) 769 { 770 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 771 772 visit_type_OnOffAuto(v, name, &lvms->acpi, errp); 773 } 774 775 static void virt_initfn(Object *obj) 776 { 777 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 778 779 if (tcg_enabled()) { 780 lvms->veiointc = ON_OFF_AUTO_OFF; 781 } 782 lvms->acpi = ON_OFF_AUTO_AUTO; 783 lvms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); 784 lvms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); 785 virt_flash_create(lvms); 786 } 787 788 static void virt_get_topo_from_index(MachineState *ms, 789 LoongArchCPUTopo *topo, int index) 790 { 791 topo->socket_id = index / (ms->smp.cores * ms->smp.threads); 792 topo->core_id = index / ms->smp.threads % ms->smp.cores; 793 topo->thread_id = index % ms->smp.threads; 794 } 795 796 static unsigned int topo_align_up(unsigned int count) 797 { 798 g_assert(count >= 1); 799 count -= 1; 800 return BIT(count ? 32 - clz32(count) : 0); 801 } 802 803 /* 804 * LoongArch Reference Manual Vol1, Chapter 7.4.12 CPU Identity 805 * For CPU architecture, bit0 .. bit8 is valid for CPU id, max cpuid is 512 806 * However for IPI/Eiointc interrupt controller, max supported cpu id for 807 * irq routingis 256 808 * 809 * Here max cpu id is 256 for virt machine 810 */ 811 static int virt_get_arch_id_from_topo(MachineState *ms, LoongArchCPUTopo *topo) 812 { 813 int arch_id, threads, cores, sockets; 814 815 threads = topo_align_up(ms->smp.threads); 816 cores = topo_align_up(ms->smp.cores); 817 sockets = topo_align_up(ms->smp.sockets); 818 if ((threads * cores * sockets) > 256) { 819 error_report("Exceeding max cpuid 256 with sockets[%d] cores[%d]" 820 " threads[%d]", ms->smp.sockets, ms->smp.cores, 821 ms->smp.threads); 822 exit(1); 823 } 824 825 arch_id = topo->thread_id + topo->core_id * threads; 826 arch_id += topo->socket_id * threads * cores; 827 return arch_id; 828 } 829 830 /* Find cpu slot in machine->possible_cpus by arch_id */ 831 static CPUArchId *virt_find_cpu_slot(MachineState *ms, int arch_id) 832 { 833 int n; 834 for (n = 0; n < ms->possible_cpus->len; n++) { 835 if (ms->possible_cpus->cpus[n].arch_id == arch_id) { 836 return &ms->possible_cpus->cpus[n]; 837 } 838 } 839 840 return NULL; 841 } 842 843 /* Find cpu slot for cold-plut CPU object where cpu is NULL */ 844 static CPUArchId *virt_find_empty_cpu_slot(MachineState *ms) 845 { 846 int n; 847 for (n = 0; n < ms->possible_cpus->len; n++) { 848 if (ms->possible_cpus->cpus[n].cpu == NULL) { 849 return &ms->possible_cpus->cpus[n]; 850 } 851 } 852 853 return NULL; 854 } 855 856 static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, 857 DeviceState *dev, Error **errp) 858 { 859 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 860 MachineState *ms = MACHINE(OBJECT(hotplug_dev)); 861 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 862 CPUState *cs = CPU(dev); 863 CPUArchId *cpu_slot; 864 LoongArchCPUTopo topo; 865 int arch_id; 866 867 if (lvms->acpi_ged) { 868 if ((cpu->thread_id < 0) || (cpu->thread_id >= ms->smp.threads)) { 869 error_setg(errp, 870 "Invalid thread-id %u specified, must be in range 1:%u", 871 cpu->thread_id, ms->smp.threads - 1); 872 return; 873 } 874 875 if ((cpu->core_id < 0) || (cpu->core_id >= ms->smp.cores)) { 876 error_setg(errp, 877 "Invalid core-id %u specified, must be in range 1:%u", 878 cpu->core_id, ms->smp.cores - 1); 879 return; 880 } 881 882 if ((cpu->socket_id < 0) || (cpu->socket_id >= ms->smp.sockets)) { 883 error_setg(errp, 884 "Invalid socket-id %u specified, must be in range 1:%u", 885 cpu->socket_id, ms->smp.sockets - 1); 886 return; 887 } 888 889 topo.socket_id = cpu->socket_id; 890 topo.core_id = cpu->core_id; 891 topo.thread_id = cpu->thread_id; 892 arch_id = virt_get_arch_id_from_topo(ms, &topo); 893 cpu_slot = virt_find_cpu_slot(ms, arch_id); 894 if (CPU(cpu_slot->cpu)) { 895 error_setg(errp, 896 "cpu(id%d=%d:%d:%d) with arch-id %" PRIu64 " exists", 897 cs->cpu_index, cpu->socket_id, cpu->core_id, 898 cpu->thread_id, cpu_slot->arch_id); 899 return; 900 } 901 } else { 902 /* For cold-add cpu, find empty cpu slot */ 903 cpu_slot = virt_find_empty_cpu_slot(ms); 904 topo.socket_id = cpu_slot->props.socket_id; 905 topo.core_id = cpu_slot->props.core_id; 906 topo.thread_id = cpu_slot->props.thread_id; 907 object_property_set_int(OBJECT(dev), "socket-id", topo.socket_id, NULL); 908 object_property_set_int(OBJECT(dev), "core-id", topo.core_id, NULL); 909 object_property_set_int(OBJECT(dev), "thread-id", topo.thread_id, NULL); 910 } 911 912 cpu->env.address_space_iocsr = &lvms->as_iocsr; 913 cpu->phy_id = cpu_slot->arch_id; 914 cs->cpu_index = cpu_slot - ms->possible_cpus->cpus; 915 numa_cpu_pre_plug(cpu_slot, dev, errp); 916 } 917 918 static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev, 919 DeviceState *dev, Error **errp) 920 { 921 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 922 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 923 CPUState *cs = CPU(dev); 924 925 if (cs->cpu_index == 0) { 926 error_setg(errp, "hot-unplug of boot cpu(id%d=%d:%d:%d) not supported", 927 cs->cpu_index, cpu->socket_id, 928 cpu->core_id, cpu->thread_id); 929 return; 930 } 931 932 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 933 } 934 935 static void virt_cpu_unplug(HotplugHandler *hotplug_dev, 936 DeviceState *dev, Error **errp) 937 { 938 CPUArchId *cpu_slot; 939 Error *err = NULL; 940 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 941 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 942 943 /* Notify ipi and extioi irqchip to remove interrupt routing to CPU */ 944 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->ipi), dev, &err); 945 if (err) { 946 error_propagate(errp, err); 947 return; 948 } 949 950 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->extioi), dev, &err); 951 if (err) { 952 error_propagate(errp, err); 953 return; 954 } 955 956 /* Notify acpi ged CPU removed */ 957 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &err); 958 if (err) { 959 error_propagate(errp, err); 960 return; 961 } 962 963 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 964 cpu_slot->cpu = NULL; 965 return; 966 } 967 968 static void virt_cpu_plug(HotplugHandler *hotplug_dev, 969 DeviceState *dev, Error **errp) 970 { 971 CPUArchId *cpu_slot; 972 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 973 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 974 Error *err = NULL; 975 976 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 977 cpu_slot->cpu = CPU(dev); 978 if (lvms->ipi) { 979 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), dev, &err); 980 if (err) { 981 error_propagate(errp, err); 982 return; 983 } 984 } 985 986 if (lvms->extioi) { 987 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), dev, &err); 988 if (err) { 989 error_propagate(errp, err); 990 return; 991 } 992 } 993 994 if (lvms->acpi_ged) { 995 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &err); 996 if (err) { 997 error_propagate(errp, err); 998 } 999 } 1000 1001 return; 1002 } 1003 1004 static bool memhp_type_supported(DeviceState *dev) 1005 { 1006 /* we only support pc dimm now */ 1007 return object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) && 1008 !object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); 1009 } 1010 1011 static void virt_mem_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 1012 Error **errp) 1013 { 1014 pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), errp); 1015 } 1016 1017 static void virt_device_pre_plug(HotplugHandler *hotplug_dev, 1018 DeviceState *dev, Error **errp) 1019 { 1020 if (memhp_type_supported(dev)) { 1021 virt_mem_pre_plug(hotplug_dev, dev, errp); 1022 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1023 virt_cpu_pre_plug(hotplug_dev, dev, errp); 1024 } 1025 } 1026 1027 static void virt_mem_unplug_request(HotplugHandler *hotplug_dev, 1028 DeviceState *dev, Error **errp) 1029 { 1030 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1031 1032 /* the acpi ged is always exist */ 1033 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, 1034 errp); 1035 } 1036 1037 static void virt_device_unplug_request(HotplugHandler *hotplug_dev, 1038 DeviceState *dev, Error **errp) 1039 { 1040 if (memhp_type_supported(dev)) { 1041 virt_mem_unplug_request(hotplug_dev, dev, errp); 1042 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1043 virt_cpu_unplug_request(hotplug_dev, dev, errp); 1044 } 1045 } 1046 1047 static void virt_mem_unplug(HotplugHandler *hotplug_dev, 1048 DeviceState *dev, Error **errp) 1049 { 1050 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1051 1052 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 1053 pc_dimm_unplug(PC_DIMM(dev), MACHINE(lvms)); 1054 qdev_unrealize(dev); 1055 } 1056 1057 static void virt_device_unplug(HotplugHandler *hotplug_dev, 1058 DeviceState *dev, Error **errp) 1059 { 1060 if (memhp_type_supported(dev)) { 1061 virt_mem_unplug(hotplug_dev, dev, errp); 1062 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1063 virt_cpu_unplug(hotplug_dev, dev, errp); 1064 } 1065 } 1066 1067 static void virt_mem_plug(HotplugHandler *hotplug_dev, 1068 DeviceState *dev, Error **errp) 1069 { 1070 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1071 1072 pc_dimm_plug(PC_DIMM(dev), MACHINE(lvms)); 1073 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), 1074 dev, &error_abort); 1075 } 1076 1077 static void virt_device_plug_cb(HotplugHandler *hotplug_dev, 1078 DeviceState *dev, Error **errp) 1079 { 1080 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1081 MachineClass *mc = MACHINE_GET_CLASS(lvms); 1082 PlatformBusDevice *pbus; 1083 1084 if (device_is_dynamic_sysbus(mc, dev)) { 1085 if (lvms->platform_bus_dev) { 1086 pbus = PLATFORM_BUS_DEVICE(lvms->platform_bus_dev); 1087 platform_bus_link_device(pbus, SYS_BUS_DEVICE(dev)); 1088 } 1089 } else if (memhp_type_supported(dev)) { 1090 virt_mem_plug(hotplug_dev, dev, errp); 1091 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1092 virt_cpu_plug(hotplug_dev, dev, errp); 1093 } 1094 } 1095 1096 static HotplugHandler *virt_get_hotplug_handler(MachineState *machine, 1097 DeviceState *dev) 1098 { 1099 MachineClass *mc = MACHINE_GET_CLASS(machine); 1100 1101 if (device_is_dynamic_sysbus(mc, dev) || 1102 object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU) || 1103 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || 1104 memhp_type_supported(dev)) { 1105 return HOTPLUG_HANDLER(machine); 1106 } 1107 return NULL; 1108 } 1109 1110 static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) 1111 { 1112 int n, arch_id; 1113 unsigned int max_cpus = ms->smp.max_cpus; 1114 LoongArchCPUTopo topo; 1115 1116 if (ms->possible_cpus) { 1117 assert(ms->possible_cpus->len == max_cpus); 1118 return ms->possible_cpus; 1119 } 1120 1121 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + 1122 sizeof(CPUArchId) * max_cpus); 1123 ms->possible_cpus->len = max_cpus; 1124 for (n = 0; n < ms->possible_cpus->len; n++) { 1125 virt_get_topo_from_index(ms, &topo, n); 1126 arch_id = virt_get_arch_id_from_topo(ms, &topo); 1127 ms->possible_cpus->cpus[n].type = ms->cpu_type; 1128 ms->possible_cpus->cpus[n].arch_id = arch_id; 1129 ms->possible_cpus->cpus[n].vcpus_count = 1; 1130 ms->possible_cpus->cpus[n].props.has_socket_id = true; 1131 ms->possible_cpus->cpus[n].props.socket_id = topo.socket_id; 1132 ms->possible_cpus->cpus[n].props.has_core_id = true; 1133 ms->possible_cpus->cpus[n].props.core_id = topo.core_id; 1134 ms->possible_cpus->cpus[n].props.has_thread_id = true; 1135 ms->possible_cpus->cpus[n].props.thread_id = topo.thread_id; 1136 } 1137 return ms->possible_cpus; 1138 } 1139 1140 static CpuInstanceProperties virt_cpu_index_to_props(MachineState *ms, 1141 unsigned cpu_index) 1142 { 1143 MachineClass *mc = MACHINE_GET_CLASS(ms); 1144 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1145 1146 assert(cpu_index < possible_cpus->len); 1147 return possible_cpus->cpus[cpu_index].props; 1148 } 1149 1150 static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx) 1151 { 1152 int64_t socket_id; 1153 1154 if (ms->numa_state->num_nodes) { 1155 socket_id = ms->possible_cpus->cpus[idx].props.socket_id; 1156 return socket_id % ms->numa_state->num_nodes; 1157 } else { 1158 return 0; 1159 } 1160 } 1161 1162 static void virt_class_init(ObjectClass *oc, void *data) 1163 { 1164 MachineClass *mc = MACHINE_CLASS(oc); 1165 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); 1166 1167 mc->init = virt_init; 1168 mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464"); 1169 mc->default_ram_id = "loongarch.ram"; 1170 mc->desc = "QEMU LoongArch Virtual Machine"; 1171 mc->max_cpus = LOONGARCH_MAX_CPUS; 1172 mc->is_default = 1; 1173 mc->default_kernel_irqchip_split = false; 1174 mc->block_default_type = IF_VIRTIO; 1175 mc->default_boot_order = "c"; 1176 mc->no_cdrom = 1; 1177 mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids; 1178 mc->cpu_index_to_instance_props = virt_cpu_index_to_props; 1179 mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; 1180 mc->numa_mem_supported = true; 1181 mc->auto_enable_numa_with_memhp = true; 1182 mc->auto_enable_numa_with_memdev = true; 1183 mc->has_hotpluggable_cpus = true; 1184 mc->get_hotplug_handler = virt_get_hotplug_handler; 1185 mc->default_nic = "virtio-net-pci"; 1186 hc->plug = virt_device_plug_cb; 1187 hc->pre_plug = virt_device_pre_plug; 1188 hc->unplug_request = virt_device_unplug_request; 1189 hc->unplug = virt_device_unplug; 1190 1191 object_class_property_add(oc, "acpi", "OnOffAuto", 1192 virt_get_acpi, virt_set_acpi, 1193 NULL, NULL); 1194 object_class_property_set_description(oc, "acpi", 1195 "Enable ACPI"); 1196 object_class_property_add(oc, "v-eiointc", "OnOffAuto", 1197 virt_get_veiointc, virt_set_veiointc, 1198 NULL, NULL); 1199 object_class_property_set_description(oc, "v-eiointc", 1200 "Enable Virt Extend I/O Interrupt Controller."); 1201 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); 1202 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_UEFI_VARS_SYSBUS); 1203 #ifdef CONFIG_TPM 1204 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); 1205 #endif 1206 } 1207 1208 static const TypeInfo virt_machine_types[] = { 1209 { 1210 .name = TYPE_LOONGARCH_VIRT_MACHINE, 1211 .parent = TYPE_MACHINE, 1212 .instance_size = sizeof(LoongArchVirtMachineState), 1213 .class_init = virt_class_init, 1214 .instance_init = virt_initfn, 1215 .interfaces = (InterfaceInfo[]) { 1216 { TYPE_HOTPLUG_HANDLER }, 1217 { } 1218 }, 1219 } 1220 }; 1221 1222 DEFINE_TYPES(virt_machine_types) 1223