1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * QEMU loongson 3a5000 develop board emulation 4 * 5 * Copyright (c) 2021 Loongson Technology Corporation Limited 6 */ 7 #include "qemu/osdep.h" 8 #include "qemu/units.h" 9 #include "qemu/datadir.h" 10 #include "qapi/error.h" 11 #include "hw/boards.h" 12 #include "hw/char/serial-mm.h" 13 #include "system/kvm.h" 14 #include "system/tcg.h" 15 #include "system/system.h" 16 #include "system/qtest.h" 17 #include "system/runstate.h" 18 #include "system/reset.h" 19 #include "system/rtc.h" 20 #include "hw/loongarch/virt.h" 21 #include "exec/address-spaces.h" 22 #include "hw/irq.h" 23 #include "net/net.h" 24 #include "hw/loader.h" 25 #include "elf.h" 26 #include "hw/intc/loongarch_ipi.h" 27 #include "hw/intc/loongarch_extioi.h" 28 #include "hw/intc/loongarch_pch_pic.h" 29 #include "hw/intc/loongarch_pch_msi.h" 30 #include "hw/pci-host/ls7a.h" 31 #include "hw/pci-host/gpex.h" 32 #include "hw/misc/unimp.h" 33 #include "hw/loongarch/fw_cfg.h" 34 #include "target/loongarch/cpu.h" 35 #include "hw/firmware/smbios.h" 36 #include "qapi/qapi-visit-common.h" 37 #include "hw/acpi/generic_event_device.h" 38 #include "hw/mem/nvdimm.h" 39 #include "hw/platform-bus.h" 40 #include "hw/display/ramfb.h" 41 #include "hw/mem/pc-dimm.h" 42 #include "system/tpm.h" 43 #include "system/block-backend.h" 44 #include "hw/block/flash.h" 45 #include "hw/virtio/virtio-iommu.h" 46 #include "qemu/error-report.h" 47 48 static void virt_get_veiointc(Object *obj, Visitor *v, const char *name, 49 void *opaque, Error **errp) 50 { 51 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 52 OnOffAuto veiointc = lvms->veiointc; 53 54 visit_type_OnOffAuto(v, name, &veiointc, errp); 55 } 56 57 static void virt_set_veiointc(Object *obj, Visitor *v, const char *name, 58 void *opaque, Error **errp) 59 { 60 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 61 62 visit_type_OnOffAuto(v, name, &lvms->veiointc, errp); 63 } 64 65 static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, 66 const char *name, 67 const char *alias_prop_name) 68 { 69 DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); 70 71 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); 72 qdev_prop_set_uint8(dev, "width", 4); 73 qdev_prop_set_uint8(dev, "device-width", 2); 74 qdev_prop_set_bit(dev, "big-endian", false); 75 qdev_prop_set_uint16(dev, "id0", 0x89); 76 qdev_prop_set_uint16(dev, "id1", 0x18); 77 qdev_prop_set_uint16(dev, "id2", 0x00); 78 qdev_prop_set_uint16(dev, "id3", 0x00); 79 qdev_prop_set_string(dev, "name", name); 80 object_property_add_child(OBJECT(lvms), name, OBJECT(dev)); 81 object_property_add_alias(OBJECT(lvms), alias_prop_name, 82 OBJECT(dev), "drive"); 83 return PFLASH_CFI01(dev); 84 } 85 86 static void virt_flash_create(LoongArchVirtMachineState *lvms) 87 { 88 lvms->flash[0] = virt_flash_create1(lvms, "virt.flash0", "pflash0"); 89 lvms->flash[1] = virt_flash_create1(lvms, "virt.flash1", "pflash1"); 90 } 91 92 static void virt_flash_map1(PFlashCFI01 *flash, 93 hwaddr base, hwaddr size, 94 MemoryRegion *sysmem) 95 { 96 DeviceState *dev = DEVICE(flash); 97 BlockBackend *blk; 98 hwaddr real_size = size; 99 100 blk = pflash_cfi01_get_blk(flash); 101 if (blk) { 102 real_size = blk_getlength(blk); 103 assert(real_size && real_size <= size); 104 } 105 106 assert(QEMU_IS_ALIGNED(real_size, VIRT_FLASH_SECTOR_SIZE)); 107 assert(real_size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX); 108 109 qdev_prop_set_uint32(dev, "num-blocks", real_size / VIRT_FLASH_SECTOR_SIZE); 110 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 111 memory_region_add_subregion(sysmem, base, 112 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); 113 } 114 115 static void virt_flash_map(LoongArchVirtMachineState *lvms, 116 MemoryRegion *sysmem) 117 { 118 PFlashCFI01 *flash0 = lvms->flash[0]; 119 PFlashCFI01 *flash1 = lvms->flash[1]; 120 121 virt_flash_map1(flash0, VIRT_FLASH0_BASE, VIRT_FLASH0_SIZE, sysmem); 122 virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem); 123 } 124 125 static void virt_build_smbios(LoongArchVirtMachineState *lvms) 126 { 127 MachineState *ms = MACHINE(lvms); 128 MachineClass *mc = MACHINE_GET_CLASS(lvms); 129 uint8_t *smbios_tables, *smbios_anchor; 130 size_t smbios_tables_len, smbios_anchor_len; 131 const char *product = "QEMU Virtual Machine"; 132 133 if (!lvms->fw_cfg) { 134 return; 135 } 136 137 smbios_set_defaults("QEMU", product, mc->name); 138 139 smbios_get_tables(ms, SMBIOS_ENTRY_POINT_TYPE_64, 140 NULL, 0, 141 &smbios_tables, &smbios_tables_len, 142 &smbios_anchor, &smbios_anchor_len, &error_fatal); 143 144 if (smbios_anchor) { 145 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-tables", 146 smbios_tables, smbios_tables_len); 147 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-anchor", 148 smbios_anchor, smbios_anchor_len); 149 } 150 } 151 152 static void virt_done(Notifier *notifier, void *data) 153 { 154 LoongArchVirtMachineState *lvms = container_of(notifier, 155 LoongArchVirtMachineState, machine_done); 156 virt_build_smbios(lvms); 157 virt_acpi_setup(lvms); 158 virt_fdt_setup(lvms); 159 } 160 161 static void virt_powerdown_req(Notifier *notifier, void *opaque) 162 { 163 LoongArchVirtMachineState *s; 164 165 s = container_of(notifier, LoongArchVirtMachineState, powerdown_notifier); 166 acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS); 167 } 168 169 static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type) 170 { 171 /* Ensure there are no duplicate entries. */ 172 for (unsigned i = 0; i < memmap_entries; i++) { 173 assert(memmap_table[i].address != address); 174 } 175 176 memmap_table = g_renew(struct memmap_entry, memmap_table, 177 memmap_entries + 1); 178 memmap_table[memmap_entries].address = cpu_to_le64(address); 179 memmap_table[memmap_entries].length = cpu_to_le64(length); 180 memmap_table[memmap_entries].type = cpu_to_le32(type); 181 memmap_table[memmap_entries].reserved = 0; 182 memmap_entries++; 183 } 184 185 static DeviceState *create_acpi_ged(DeviceState *pch_pic, 186 LoongArchVirtMachineState *lvms) 187 { 188 DeviceState *dev; 189 MachineState *ms = MACHINE(lvms); 190 MachineClass *mc = MACHINE_GET_CLASS(lvms); 191 uint32_t event = ACPI_GED_PWR_DOWN_EVT; 192 193 if (ms->ram_slots) { 194 event |= ACPI_GED_MEM_HOTPLUG_EVT; 195 } 196 197 if (mc->has_hotpluggable_cpus) { 198 event |= ACPI_GED_CPU_HOTPLUG_EVT; 199 } 200 201 dev = qdev_new(TYPE_ACPI_GED); 202 qdev_prop_set_uint32(dev, "ged-event", event); 203 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 204 205 /* ged event */ 206 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VIRT_GED_EVT_ADDR); 207 /* memory hotplug */ 208 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, VIRT_GED_MEM_ADDR); 209 /* ged regs used for reset and power down */ 210 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR); 211 212 if (mc->has_hotpluggable_cpus) { 213 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 3, VIRT_GED_CPUHP_ADDR); 214 } 215 216 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 217 qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE)); 218 return dev; 219 } 220 221 static DeviceState *create_platform_bus(DeviceState *pch_pic) 222 { 223 DeviceState *dev; 224 SysBusDevice *sysbus; 225 int i, irq; 226 MemoryRegion *sysmem = get_system_memory(); 227 228 dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); 229 dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); 230 qdev_prop_set_uint32(dev, "num_irqs", VIRT_PLATFORM_BUS_NUM_IRQS); 231 qdev_prop_set_uint32(dev, "mmio_size", VIRT_PLATFORM_BUS_SIZE); 232 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 233 234 sysbus = SYS_BUS_DEVICE(dev); 235 for (i = 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) { 236 irq = VIRT_PLATFORM_BUS_IRQ - VIRT_GSI_BASE + i; 237 sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(pch_pic, irq)); 238 } 239 240 memory_region_add_subregion(sysmem, 241 VIRT_PLATFORM_BUS_BASEADDRESS, 242 sysbus_mmio_get_region(sysbus, 0)); 243 return dev; 244 } 245 246 static void virt_devices_init(DeviceState *pch_pic, 247 LoongArchVirtMachineState *lvms) 248 { 249 MachineClass *mc = MACHINE_GET_CLASS(lvms); 250 DeviceState *gpex_dev; 251 SysBusDevice *d; 252 PCIBus *pci_bus; 253 MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg; 254 MemoryRegion *mmio_alias, *mmio_reg; 255 int i; 256 257 gpex_dev = qdev_new(TYPE_GPEX_HOST); 258 d = SYS_BUS_DEVICE(gpex_dev); 259 sysbus_realize_and_unref(d, &error_fatal); 260 pci_bus = PCI_HOST_BRIDGE(gpex_dev)->bus; 261 lvms->pci_bus = pci_bus; 262 263 /* Map only part size_ecam bytes of ECAM space */ 264 ecam_alias = g_new0(MemoryRegion, 1); 265 ecam_reg = sysbus_mmio_get_region(d, 0); 266 memory_region_init_alias(ecam_alias, OBJECT(gpex_dev), "pcie-ecam", 267 ecam_reg, 0, VIRT_PCI_CFG_SIZE); 268 memory_region_add_subregion(get_system_memory(), VIRT_PCI_CFG_BASE, 269 ecam_alias); 270 271 /* Map PCI mem space */ 272 mmio_alias = g_new0(MemoryRegion, 1); 273 mmio_reg = sysbus_mmio_get_region(d, 1); 274 memory_region_init_alias(mmio_alias, OBJECT(gpex_dev), "pcie-mmio", 275 mmio_reg, VIRT_PCI_MEM_BASE, VIRT_PCI_MEM_SIZE); 276 memory_region_add_subregion(get_system_memory(), VIRT_PCI_MEM_BASE, 277 mmio_alias); 278 279 /* Map PCI IO port space. */ 280 pio_alias = g_new0(MemoryRegion, 1); 281 pio_reg = sysbus_mmio_get_region(d, 2); 282 memory_region_init_alias(pio_alias, OBJECT(gpex_dev), "pcie-io", pio_reg, 283 VIRT_PCI_IO_OFFSET, VIRT_PCI_IO_SIZE); 284 memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE, 285 pio_alias); 286 287 for (i = 0; i < PCI_NUM_PINS; i++) { 288 sysbus_connect_irq(d, i, 289 qdev_get_gpio_in(pch_pic, 16 + i)); 290 gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); 291 } 292 293 /* 294 * Create uart fdt node in reverse order so that they appear 295 * in the finished device tree lowest address first 296 */ 297 for (i = VIRT_UART_COUNT; i-- > 0;) { 298 hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; 299 int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE; 300 serial_mm_init(get_system_memory(), base, 0, 301 qdev_get_gpio_in(pch_pic, irq), 302 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); 303 } 304 305 /* Network init */ 306 pci_init_nic_devices(pci_bus, mc->default_nic); 307 308 /* 309 * There are some invalid guest memory access. 310 * Create some unimplemented devices to emulate this. 311 */ 312 create_unimplemented_device("pci-dma-cfg", 0x1001041c, 0x4); 313 sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, 314 qdev_get_gpio_in(pch_pic, 315 VIRT_RTC_IRQ - VIRT_GSI_BASE)); 316 317 /* acpi ged */ 318 lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); 319 /* platform bus */ 320 lvms->platform_bus_dev = create_platform_bus(pch_pic); 321 } 322 323 static void virt_cpu_irq_init(LoongArchVirtMachineState *lvms) 324 { 325 int num; 326 MachineState *ms = MACHINE(lvms); 327 MachineClass *mc = MACHINE_GET_CLASS(ms); 328 const CPUArchIdList *possible_cpus; 329 CPUState *cs; 330 Error *err = NULL; 331 332 /* cpu nodes */ 333 possible_cpus = mc->possible_cpu_arch_ids(ms); 334 for (num = 0; num < possible_cpus->len; num++) { 335 cs = possible_cpus->cpus[num].cpu; 336 if (cs == NULL) { 337 continue; 338 } 339 340 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), DEVICE(cs), &err); 341 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), DEVICE(cs), &err); 342 } 343 } 344 345 static void virt_irq_init(LoongArchVirtMachineState *lvms) 346 { 347 DeviceState *pch_pic, *pch_msi; 348 DeviceState *ipi, *extioi; 349 SysBusDevice *d; 350 int i, start, num; 351 352 /* 353 * Extended IRQ model. 354 * | 355 * +-----------+ +-------------|--------+ +-----------+ 356 * | IPI/Timer | --> | CPUINTC(0-3)|(4-255) | <-- | IPI/Timer | 357 * +-----------+ +-------------|--------+ +-----------+ 358 * ^ | 359 * | 360 * +---------+ 361 * | EIOINTC | 362 * +---------+ 363 * ^ ^ 364 * | | 365 * +---------+ +---------+ 366 * | PCH-PIC | | PCH-MSI | 367 * +---------+ +---------+ 368 * ^ ^ ^ 369 * | | | 370 * +--------+ +---------+ +---------+ 371 * | UARTs | | Devices | | Devices | 372 * +--------+ +---------+ +---------+ 373 * 374 * Virt extended IRQ model. 375 * 376 * +-----+ +---------------+ +-------+ 377 * | IPI |--> | CPUINTC(0-255)| <-- | Timer | 378 * +-----+ +---------------+ +-------+ 379 * ^ 380 * | 381 * +-----------+ 382 * | V-EIOINTC | 383 * +-----------+ 384 * ^ ^ 385 * | | 386 * +---------+ +---------+ 387 * | PCH-PIC | | PCH-MSI | 388 * +---------+ +---------+ 389 * ^ ^ ^ 390 * | | | 391 * +--------+ +---------+ +---------+ 392 * | UARTs | | Devices | | Devices | 393 * +--------+ +---------+ +---------+ 394 */ 395 396 /* Create IPI device */ 397 ipi = qdev_new(TYPE_LOONGARCH_IPI); 398 lvms->ipi = ipi; 399 sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); 400 401 /* IPI iocsr memory region */ 402 memory_region_add_subregion(&lvms->system_iocsr, SMP_IPI_MAILBOX, 403 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0)); 404 memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, 405 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); 406 407 /* Create EXTIOI device */ 408 extioi = qdev_new(TYPE_LOONGARCH_EXTIOI); 409 lvms->extioi = extioi; 410 if (virt_is_veiointc_enabled(lvms)) { 411 qdev_prop_set_bit(extioi, "has-virtualization-extension", true); 412 } 413 sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal); 414 memory_region_add_subregion(&lvms->system_iocsr, APIC_BASE, 415 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); 416 if (virt_is_veiointc_enabled(lvms)) { 417 memory_region_add_subregion(&lvms->system_iocsr, EXTIOI_VIRT_BASE, 418 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 1)); 419 } 420 421 virt_cpu_irq_init(lvms); 422 pch_pic = qdev_new(TYPE_LOONGARCH_PIC); 423 num = VIRT_PCH_PIC_IRQ_NUM; 424 qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); 425 d = SYS_BUS_DEVICE(pch_pic); 426 sysbus_realize_and_unref(d, &error_fatal); 427 memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE, 428 sysbus_mmio_get_region(d, 0)); 429 memory_region_add_subregion(get_system_memory(), 430 VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY_OFFSET, 431 sysbus_mmio_get_region(d, 1)); 432 memory_region_add_subregion(get_system_memory(), 433 VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS_LO, 434 sysbus_mmio_get_region(d, 2)); 435 436 /* Connect pch_pic irqs to extioi */ 437 for (i = 0; i < num; i++) { 438 qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); 439 } 440 441 pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); 442 start = num; 443 num = EXTIOI_IRQS - start; 444 qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); 445 qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); 446 d = SYS_BUS_DEVICE(pch_msi); 447 sysbus_realize_and_unref(d, &error_fatal); 448 sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW); 449 for (i = 0; i < num; i++) { 450 /* Connect pch_msi irqs to extioi */ 451 qdev_connect_gpio_out(DEVICE(d), i, 452 qdev_get_gpio_in(extioi, i + start)); 453 } 454 455 virt_devices_init(pch_pic, lvms); 456 } 457 458 static void virt_firmware_init(LoongArchVirtMachineState *lvms) 459 { 460 char *filename = MACHINE(lvms)->firmware; 461 char *bios_name = NULL; 462 int bios_size, i; 463 BlockBackend *pflash_blk0; 464 MemoryRegion *mr; 465 466 lvms->bios_loaded = false; 467 468 /* Map legacy -drive if=pflash to machine properties */ 469 for (i = 0; i < ARRAY_SIZE(lvms->flash); i++) { 470 pflash_cfi01_legacy_drive(lvms->flash[i], 471 drive_get(IF_PFLASH, 0, i)); 472 } 473 474 virt_flash_map(lvms, get_system_memory()); 475 476 pflash_blk0 = pflash_cfi01_get_blk(lvms->flash[0]); 477 478 if (pflash_blk0) { 479 if (filename) { 480 error_report("cannot use both '-bios' and '-drive if=pflash'" 481 "options at once"); 482 exit(1); 483 } 484 lvms->bios_loaded = true; 485 return; 486 } 487 488 if (filename) { 489 bios_name = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename); 490 if (!bios_name) { 491 error_report("Could not find ROM image '%s'", filename); 492 exit(1); 493 } 494 495 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(lvms->flash[0]), 0); 496 bios_size = load_image_mr(bios_name, mr); 497 if (bios_size < 0) { 498 error_report("Could not load ROM image '%s'", bios_name); 499 exit(1); 500 } 501 g_free(bios_name); 502 lvms->bios_loaded = true; 503 } 504 } 505 506 static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, 507 uint64_t val, unsigned size, 508 MemTxAttrs attrs) 509 { 510 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 511 uint64_t features; 512 513 switch (addr) { 514 case MISC_FUNC_REG: 515 if (!virt_is_veiointc_enabled(lvms)) { 516 return MEMTX_OK; 517 } 518 519 features = address_space_ldl(&lvms->as_iocsr, 520 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 521 attrs, NULL); 522 if (val & BIT_ULL(IOCSRM_EXTIOI_EN)) { 523 features |= BIT(EXTIOI_ENABLE); 524 } 525 if (val & BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE)) { 526 features |= BIT(EXTIOI_ENABLE_INT_ENCODE); 527 } 528 529 address_space_stl(&lvms->as_iocsr, 530 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 531 features, attrs, NULL); 532 break; 533 default: 534 g_assert_not_reached(); 535 } 536 537 return MEMTX_OK; 538 } 539 540 static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, 541 uint64_t *data, 542 unsigned size, MemTxAttrs attrs) 543 { 544 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 545 uint64_t ret = 0; 546 int features; 547 548 switch (addr) { 549 case VERSION_REG: 550 ret = 0x11ULL; 551 break; 552 case FEATURE_REG: 553 ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI); 554 if (kvm_enabled()) { 555 ret |= BIT(IOCSRF_VM); 556 } 557 break; 558 case VENDOR_REG: 559 ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */ 560 break; 561 case CPUNAME_REG: 562 ret = 0x303030354133ULL; /* "3A5000" */ 563 break; 564 case MISC_FUNC_REG: 565 if (!virt_is_veiointc_enabled(lvms)) { 566 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 567 break; 568 } 569 570 features = address_space_ldl(&lvms->as_iocsr, 571 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 572 attrs, NULL); 573 if (features & BIT(EXTIOI_ENABLE)) { 574 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 575 } 576 if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) { 577 ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE); 578 } 579 break; 580 default: 581 g_assert_not_reached(); 582 } 583 584 *data = ret; 585 return MEMTX_OK; 586 } 587 588 static const MemoryRegionOps virt_iocsr_misc_ops = { 589 .read_with_attrs = virt_iocsr_misc_read, 590 .write_with_attrs = virt_iocsr_misc_write, 591 .endianness = DEVICE_LITTLE_ENDIAN, 592 .valid = { 593 .min_access_size = 4, 594 .max_access_size = 8, 595 }, 596 .impl = { 597 .min_access_size = 8, 598 .max_access_size = 8, 599 }, 600 }; 601 602 static void fw_cfg_add_memory(MachineState *ms) 603 { 604 hwaddr base, size, ram_size, gap; 605 int nb_numa_nodes, nodes; 606 NodeInfo *numa_info; 607 608 ram_size = ms->ram_size; 609 base = VIRT_LOWMEM_BASE; 610 gap = VIRT_LOWMEM_SIZE; 611 nodes = nb_numa_nodes = ms->numa_state->num_nodes; 612 numa_info = ms->numa_state->nodes; 613 if (!nodes) { 614 nodes = 1; 615 } 616 617 /* add fw_cfg memory map of node0 */ 618 if (nb_numa_nodes) { 619 size = numa_info[0].node_mem; 620 } else { 621 size = ram_size; 622 } 623 624 if (size >= gap) { 625 memmap_add_entry(base, gap, 1); 626 size -= gap; 627 base = VIRT_HIGHMEM_BASE; 628 } 629 630 if (size) { 631 memmap_add_entry(base, size, 1); 632 base += size; 633 } 634 635 if (nodes < 2) { 636 return; 637 } 638 639 /* add fw_cfg memory map of other nodes */ 640 if (numa_info[0].node_mem < gap && ram_size > gap) { 641 /* 642 * memory map for the maining nodes splited into two part 643 * lowram: [base, +(gap - numa_info[0].node_mem)) 644 * highram: [VIRT_HIGHMEM_BASE, +(ram_size - gap)) 645 */ 646 memmap_add_entry(base, gap - numa_info[0].node_mem, 1); 647 size = ram_size - gap; 648 base = VIRT_HIGHMEM_BASE; 649 } else { 650 size = ram_size - numa_info[0].node_mem; 651 } 652 653 if (size) { 654 memmap_add_entry(base, size, 1); 655 } 656 } 657 658 static void virt_init(MachineState *machine) 659 { 660 const char *cpu_model = machine->cpu_type; 661 MemoryRegion *address_space_mem = get_system_memory(); 662 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine); 663 int i; 664 hwaddr base, size, ram_size = machine->ram_size; 665 MachineClass *mc = MACHINE_GET_CLASS(machine); 666 Object *cpuobj; 667 668 if (!cpu_model) { 669 cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); 670 } 671 672 /* Create IOCSR space */ 673 memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, 674 machine, "iocsr", UINT64_MAX); 675 address_space_init(&lvms->as_iocsr, &lvms->system_iocsr, "IOCSR"); 676 memory_region_init_io(&lvms->iocsr_mem, OBJECT(machine), 677 &virt_iocsr_misc_ops, 678 machine, "iocsr_misc", 0x428); 679 memory_region_add_subregion(&lvms->system_iocsr, 0, &lvms->iocsr_mem); 680 681 /* Init CPUs */ 682 mc->possible_cpu_arch_ids(machine); 683 for (i = 0; i < machine->smp.cpus; i++) { 684 cpuobj = object_new(machine->cpu_type); 685 if (cpuobj == NULL) { 686 error_report("Fail to create object with type %s ", 687 machine->cpu_type); 688 exit(EXIT_FAILURE); 689 } 690 qdev_realize_and_unref(DEVICE(cpuobj), NULL, &error_fatal); 691 } 692 fw_cfg_add_memory(machine); 693 694 /* Node0 memory */ 695 size = ram_size; 696 base = VIRT_LOWMEM_BASE; 697 if (size > VIRT_LOWMEM_SIZE) { 698 size = VIRT_LOWMEM_SIZE; 699 } 700 701 memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram", 702 machine->ram, base, size); 703 memory_region_add_subregion(address_space_mem, base, &lvms->lowmem); 704 base += size; 705 if (ram_size - size) { 706 base = VIRT_HIGHMEM_BASE; 707 memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram", 708 machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size); 709 memory_region_add_subregion(address_space_mem, base, &lvms->highmem); 710 base += ram_size - size; 711 } 712 713 /* initialize device memory address space */ 714 if (machine->ram_size < machine->maxram_size) { 715 ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; 716 717 if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { 718 error_report("unsupported amount of memory slots: %"PRIu64, 719 machine->ram_slots); 720 exit(EXIT_FAILURE); 721 } 722 723 if (QEMU_ALIGN_UP(machine->maxram_size, 724 TARGET_PAGE_SIZE) != machine->maxram_size) { 725 error_report("maximum memory size must by aligned to multiple of " 726 "%d bytes", TARGET_PAGE_SIZE); 727 exit(EXIT_FAILURE); 728 } 729 machine_memory_devices_init(machine, base, device_mem_size); 730 } 731 732 /* load the BIOS image. */ 733 virt_firmware_init(lvms); 734 735 /* fw_cfg init */ 736 lvms->fw_cfg = virt_fw_cfg_init(ram_size, machine); 737 rom_set_fw(lvms->fw_cfg); 738 if (lvms->fw_cfg != NULL) { 739 fw_cfg_add_file(lvms->fw_cfg, "etc/memmap", 740 memmap_table, 741 sizeof(struct memmap_entry) * (memmap_entries)); 742 } 743 744 /* Initialize the IO interrupt subsystem */ 745 virt_irq_init(lvms); 746 lvms->machine_done.notify = virt_done; 747 qemu_add_machine_init_done_notifier(&lvms->machine_done); 748 /* connect powerdown request */ 749 lvms->powerdown_notifier.notify = virt_powerdown_req; 750 qemu_register_powerdown_notifier(&lvms->powerdown_notifier); 751 752 lvms->bootinfo.ram_size = ram_size; 753 loongarch_load_kernel(machine, &lvms->bootinfo); 754 } 755 756 static void virt_get_acpi(Object *obj, Visitor *v, const char *name, 757 void *opaque, Error **errp) 758 { 759 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 760 OnOffAuto acpi = lvms->acpi; 761 762 visit_type_OnOffAuto(v, name, &acpi, errp); 763 } 764 765 static void virt_set_acpi(Object *obj, Visitor *v, const char *name, 766 void *opaque, Error **errp) 767 { 768 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 769 770 visit_type_OnOffAuto(v, name, &lvms->acpi, errp); 771 } 772 773 static void virt_initfn(Object *obj) 774 { 775 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 776 777 if (tcg_enabled()) { 778 lvms->veiointc = ON_OFF_AUTO_OFF; 779 } 780 lvms->acpi = ON_OFF_AUTO_AUTO; 781 lvms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); 782 lvms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); 783 virt_flash_create(lvms); 784 } 785 786 static void virt_get_topo_from_index(MachineState *ms, 787 LoongArchCPUTopo *topo, int index) 788 { 789 topo->socket_id = index / (ms->smp.cores * ms->smp.threads); 790 topo->core_id = index / ms->smp.threads % ms->smp.cores; 791 topo->thread_id = index % ms->smp.threads; 792 } 793 794 static unsigned int topo_align_up(unsigned int count) 795 { 796 g_assert(count >= 1); 797 count -= 1; 798 return BIT(count ? 32 - clz32(count) : 0); 799 } 800 801 /* 802 * LoongArch Reference Manual Vol1, Chapter 7.4.12 CPU Identity 803 * For CPU architecture, bit0 .. bit8 is valid for CPU id, max cpuid is 512 804 * However for IPI/Eiointc interrupt controller, max supported cpu id for 805 * irq routingis 256 806 * 807 * Here max cpu id is 256 for virt machine 808 */ 809 static int virt_get_arch_id_from_topo(MachineState *ms, LoongArchCPUTopo *topo) 810 { 811 int arch_id, threads, cores, sockets; 812 813 threads = topo_align_up(ms->smp.threads); 814 cores = topo_align_up(ms->smp.cores); 815 sockets = topo_align_up(ms->smp.sockets); 816 if ((threads * cores * sockets) > 256) { 817 error_report("Exceeding max cpuid 256 with sockets[%d] cores[%d]" 818 " threads[%d]", ms->smp.sockets, ms->smp.cores, 819 ms->smp.threads); 820 exit(1); 821 } 822 823 arch_id = topo->thread_id + topo->core_id * threads; 824 arch_id += topo->socket_id * threads * cores; 825 return arch_id; 826 } 827 828 /* Find cpu slot in machine->possible_cpus by arch_id */ 829 static CPUArchId *virt_find_cpu_slot(MachineState *ms, int arch_id) 830 { 831 int n; 832 for (n = 0; n < ms->possible_cpus->len; n++) { 833 if (ms->possible_cpus->cpus[n].arch_id == arch_id) { 834 return &ms->possible_cpus->cpus[n]; 835 } 836 } 837 838 return NULL; 839 } 840 841 /* Find cpu slot for cold-plut CPU object where cpu is NULL */ 842 static CPUArchId *virt_find_empty_cpu_slot(MachineState *ms) 843 { 844 int n; 845 for (n = 0; n < ms->possible_cpus->len; n++) { 846 if (ms->possible_cpus->cpus[n].cpu == NULL) { 847 return &ms->possible_cpus->cpus[n]; 848 } 849 } 850 851 return NULL; 852 } 853 854 static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, 855 DeviceState *dev, Error **errp) 856 { 857 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 858 MachineState *ms = MACHINE(OBJECT(hotplug_dev)); 859 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 860 CPUState *cs = CPU(dev); 861 CPUArchId *cpu_slot; 862 Error *err = NULL; 863 LoongArchCPUTopo topo; 864 int arch_id; 865 866 if (lvms->acpi_ged) { 867 if ((cpu->thread_id < 0) || (cpu->thread_id >= ms->smp.threads)) { 868 error_setg(&err, 869 "Invalid thread-id %u specified, must be in range 1:%u", 870 cpu->thread_id, ms->smp.threads - 1); 871 goto out; 872 } 873 874 if ((cpu->core_id < 0) || (cpu->core_id >= ms->smp.cores)) { 875 error_setg(&err, 876 "Invalid core-id %u specified, must be in range 1:%u", 877 cpu->core_id, ms->smp.cores - 1); 878 goto out; 879 } 880 881 if ((cpu->socket_id < 0) || (cpu->socket_id >= ms->smp.sockets)) { 882 error_setg(&err, 883 "Invalid socket-id %u specified, must be in range 1:%u", 884 cpu->socket_id, ms->smp.sockets - 1); 885 goto out; 886 } 887 888 topo.socket_id = cpu->socket_id; 889 topo.core_id = cpu->core_id; 890 topo.thread_id = cpu->thread_id; 891 arch_id = virt_get_arch_id_from_topo(ms, &topo); 892 cpu_slot = virt_find_cpu_slot(ms, arch_id); 893 if (CPU(cpu_slot->cpu)) { 894 error_setg(&err, 895 "cpu(id%d=%d:%d:%d) with arch-id %" PRIu64 " exists", 896 cs->cpu_index, cpu->socket_id, cpu->core_id, 897 cpu->thread_id, cpu_slot->arch_id); 898 goto out; 899 } 900 } else { 901 /* For cold-add cpu, find empty cpu slot */ 902 cpu_slot = virt_find_empty_cpu_slot(ms); 903 topo.socket_id = cpu_slot->props.socket_id; 904 topo.core_id = cpu_slot->props.core_id; 905 topo.thread_id = cpu_slot->props.thread_id; 906 object_property_set_int(OBJECT(dev), "socket-id", topo.socket_id, NULL); 907 object_property_set_int(OBJECT(dev), "core-id", topo.core_id, NULL); 908 object_property_set_int(OBJECT(dev), "thread-id", topo.thread_id, NULL); 909 } 910 911 cpu->env.address_space_iocsr = &lvms->as_iocsr; 912 cpu->phy_id = cpu_slot->arch_id; 913 cs->cpu_index = cpu_slot - ms->possible_cpus->cpus; 914 numa_cpu_pre_plug(cpu_slot, dev, &err); 915 out: 916 if (err) { 917 error_propagate(errp, err); 918 } 919 } 920 921 static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev, 922 DeviceState *dev, Error **errp) 923 { 924 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 925 Error *err = NULL; 926 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 927 CPUState *cs = CPU(dev); 928 929 if (cs->cpu_index == 0) { 930 error_setg(&err, "hot-unplug of boot cpu(id%d=%d:%d:%d) not supported", 931 cs->cpu_index, cpu->socket_id, 932 cpu->core_id, cpu->thread_id); 933 error_propagate(errp, err); 934 return; 935 } 936 937 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &err); 938 if (err) { 939 error_propagate(errp, err); 940 } 941 } 942 943 static void virt_cpu_unplug(HotplugHandler *hotplug_dev, 944 DeviceState *dev, Error **errp) 945 { 946 CPUArchId *cpu_slot; 947 Error *err = NULL; 948 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 949 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 950 951 /* Notify ipi and extioi irqchip to remove interrupt routing to CPU */ 952 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->ipi), dev, &err); 953 if (err) { 954 error_propagate(errp, err); 955 return; 956 } 957 958 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->extioi), dev, &err); 959 if (err) { 960 error_propagate(errp, err); 961 return; 962 } 963 964 /* Notify acpi ged CPU removed */ 965 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &err); 966 if (err) { 967 error_propagate(errp, err); 968 return; 969 } 970 971 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 972 cpu_slot->cpu = NULL; 973 return; 974 } 975 976 static void virt_cpu_plug(HotplugHandler *hotplug_dev, 977 DeviceState *dev, Error **errp) 978 { 979 CPUArchId *cpu_slot; 980 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 981 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 982 Error *err = NULL; 983 984 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 985 cpu_slot->cpu = CPU(dev); 986 if (lvms->ipi) { 987 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), dev, &err); 988 if (err) { 989 error_propagate(errp, err); 990 return; 991 } 992 } 993 994 if (lvms->extioi) { 995 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), dev, &err); 996 if (err) { 997 error_propagate(errp, err); 998 return; 999 } 1000 } 1001 1002 if (lvms->acpi_ged) { 1003 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &err); 1004 if (err) { 1005 error_propagate(errp, err); 1006 } 1007 } 1008 1009 return; 1010 } 1011 1012 static bool memhp_type_supported(DeviceState *dev) 1013 { 1014 /* we only support pc dimm now */ 1015 return object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) && 1016 !object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); 1017 } 1018 1019 static void virt_mem_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 1020 Error **errp) 1021 { 1022 pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), errp); 1023 } 1024 1025 static void virt_device_pre_plug(HotplugHandler *hotplug_dev, 1026 DeviceState *dev, Error **errp) 1027 { 1028 if (memhp_type_supported(dev)) { 1029 virt_mem_pre_plug(hotplug_dev, dev, errp); 1030 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1031 virt_cpu_pre_plug(hotplug_dev, dev, errp); 1032 } 1033 } 1034 1035 static void virt_mem_unplug_request(HotplugHandler *hotplug_dev, 1036 DeviceState *dev, Error **errp) 1037 { 1038 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1039 1040 /* the acpi ged is always exist */ 1041 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, 1042 errp); 1043 } 1044 1045 static void virt_device_unplug_request(HotplugHandler *hotplug_dev, 1046 DeviceState *dev, Error **errp) 1047 { 1048 if (memhp_type_supported(dev)) { 1049 virt_mem_unplug_request(hotplug_dev, dev, errp); 1050 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1051 virt_cpu_unplug_request(hotplug_dev, dev, errp); 1052 } 1053 } 1054 1055 static void virt_mem_unplug(HotplugHandler *hotplug_dev, 1056 DeviceState *dev, Error **errp) 1057 { 1058 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1059 1060 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 1061 pc_dimm_unplug(PC_DIMM(dev), MACHINE(lvms)); 1062 qdev_unrealize(dev); 1063 } 1064 1065 static void virt_device_unplug(HotplugHandler *hotplug_dev, 1066 DeviceState *dev, Error **errp) 1067 { 1068 if (memhp_type_supported(dev)) { 1069 virt_mem_unplug(hotplug_dev, dev, errp); 1070 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1071 virt_cpu_unplug(hotplug_dev, dev, errp); 1072 } 1073 } 1074 1075 static void virt_mem_plug(HotplugHandler *hotplug_dev, 1076 DeviceState *dev, Error **errp) 1077 { 1078 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1079 1080 pc_dimm_plug(PC_DIMM(dev), MACHINE(lvms)); 1081 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), 1082 dev, &error_abort); 1083 } 1084 1085 static void virt_device_plug_cb(HotplugHandler *hotplug_dev, 1086 DeviceState *dev, Error **errp) 1087 { 1088 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1089 MachineClass *mc = MACHINE_GET_CLASS(lvms); 1090 PlatformBusDevice *pbus; 1091 1092 if (device_is_dynamic_sysbus(mc, dev)) { 1093 if (lvms->platform_bus_dev) { 1094 pbus = PLATFORM_BUS_DEVICE(lvms->platform_bus_dev); 1095 platform_bus_link_device(pbus, SYS_BUS_DEVICE(dev)); 1096 } 1097 } else if (memhp_type_supported(dev)) { 1098 virt_mem_plug(hotplug_dev, dev, errp); 1099 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1100 virt_cpu_plug(hotplug_dev, dev, errp); 1101 } 1102 } 1103 1104 static HotplugHandler *virt_get_hotplug_handler(MachineState *machine, 1105 DeviceState *dev) 1106 { 1107 MachineClass *mc = MACHINE_GET_CLASS(machine); 1108 1109 if (device_is_dynamic_sysbus(mc, dev) || 1110 object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU) || 1111 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || 1112 memhp_type_supported(dev)) { 1113 return HOTPLUG_HANDLER(machine); 1114 } 1115 return NULL; 1116 } 1117 1118 static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) 1119 { 1120 int n, arch_id; 1121 unsigned int max_cpus = ms->smp.max_cpus; 1122 LoongArchCPUTopo topo; 1123 1124 if (ms->possible_cpus) { 1125 assert(ms->possible_cpus->len == max_cpus); 1126 return ms->possible_cpus; 1127 } 1128 1129 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + 1130 sizeof(CPUArchId) * max_cpus); 1131 ms->possible_cpus->len = max_cpus; 1132 for (n = 0; n < ms->possible_cpus->len; n++) { 1133 virt_get_topo_from_index(ms, &topo, n); 1134 arch_id = virt_get_arch_id_from_topo(ms, &topo); 1135 ms->possible_cpus->cpus[n].type = ms->cpu_type; 1136 ms->possible_cpus->cpus[n].arch_id = arch_id; 1137 ms->possible_cpus->cpus[n].vcpus_count = 1; 1138 ms->possible_cpus->cpus[n].props.has_socket_id = true; 1139 ms->possible_cpus->cpus[n].props.socket_id = topo.socket_id; 1140 ms->possible_cpus->cpus[n].props.has_core_id = true; 1141 ms->possible_cpus->cpus[n].props.core_id = topo.core_id; 1142 ms->possible_cpus->cpus[n].props.has_thread_id = true; 1143 ms->possible_cpus->cpus[n].props.thread_id = topo.thread_id; 1144 } 1145 return ms->possible_cpus; 1146 } 1147 1148 static CpuInstanceProperties virt_cpu_index_to_props(MachineState *ms, 1149 unsigned cpu_index) 1150 { 1151 MachineClass *mc = MACHINE_GET_CLASS(ms); 1152 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1153 1154 assert(cpu_index < possible_cpus->len); 1155 return possible_cpus->cpus[cpu_index].props; 1156 } 1157 1158 static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx) 1159 { 1160 int64_t socket_id; 1161 1162 if (ms->numa_state->num_nodes) { 1163 socket_id = ms->possible_cpus->cpus[idx].props.socket_id; 1164 return socket_id % ms->numa_state->num_nodes; 1165 } else { 1166 return 0; 1167 } 1168 } 1169 1170 static void virt_class_init(ObjectClass *oc, void *data) 1171 { 1172 MachineClass *mc = MACHINE_CLASS(oc); 1173 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); 1174 1175 mc->init = virt_init; 1176 mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464"); 1177 mc->default_ram_id = "loongarch.ram"; 1178 mc->desc = "QEMU LoongArch Virtual Machine"; 1179 mc->max_cpus = LOONGARCH_MAX_CPUS; 1180 mc->is_default = 1; 1181 mc->default_kernel_irqchip_split = false; 1182 mc->block_default_type = IF_VIRTIO; 1183 mc->default_boot_order = "c"; 1184 mc->no_cdrom = 1; 1185 mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids; 1186 mc->cpu_index_to_instance_props = virt_cpu_index_to_props; 1187 mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; 1188 mc->numa_mem_supported = true; 1189 mc->auto_enable_numa_with_memhp = true; 1190 mc->auto_enable_numa_with_memdev = true; 1191 mc->has_hotpluggable_cpus = true; 1192 mc->get_hotplug_handler = virt_get_hotplug_handler; 1193 mc->default_nic = "virtio-net-pci"; 1194 hc->plug = virt_device_plug_cb; 1195 hc->pre_plug = virt_device_pre_plug; 1196 hc->unplug_request = virt_device_unplug_request; 1197 hc->unplug = virt_device_unplug; 1198 1199 object_class_property_add(oc, "acpi", "OnOffAuto", 1200 virt_get_acpi, virt_set_acpi, 1201 NULL, NULL); 1202 object_class_property_set_description(oc, "acpi", 1203 "Enable ACPI"); 1204 object_class_property_add(oc, "v-eiointc", "OnOffAuto", 1205 virt_get_veiointc, virt_set_veiointc, 1206 NULL, NULL); 1207 object_class_property_set_description(oc, "v-eiointc", 1208 "Enable Virt Extend I/O Interrupt Controller."); 1209 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); 1210 #ifdef CONFIG_TPM 1211 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); 1212 #endif 1213 } 1214 1215 static const TypeInfo virt_machine_types[] = { 1216 { 1217 .name = TYPE_LOONGARCH_VIRT_MACHINE, 1218 .parent = TYPE_MACHINE, 1219 .instance_size = sizeof(LoongArchVirtMachineState), 1220 .class_init = virt_class_init, 1221 .instance_init = virt_initfn, 1222 .interfaces = (InterfaceInfo[]) { 1223 { TYPE_HOTPLUG_HANDLER }, 1224 { } 1225 }, 1226 } 1227 }; 1228 1229 DEFINE_TYPES(virt_machine_types) 1230