1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * QEMU loongson 3a5000 develop board emulation 4 * 5 * Copyright (c) 2021 Loongson Technology Corporation Limited 6 */ 7 #include "qemu/osdep.h" 8 #include "qemu/units.h" 9 #include "qemu/datadir.h" 10 #include "qapi/error.h" 11 #include "exec/target_page.h" 12 #include "hw/boards.h" 13 #include "hw/char/serial-mm.h" 14 #include "system/kvm.h" 15 #include "system/tcg.h" 16 #include "system/system.h" 17 #include "system/qtest.h" 18 #include "system/runstate.h" 19 #include "system/reset.h" 20 #include "system/rtc.h" 21 #include "hw/loongarch/virt.h" 22 #include "system/address-spaces.h" 23 #include "hw/irq.h" 24 #include "net/net.h" 25 #include "hw/loader.h" 26 #include "elf.h" 27 #include "hw/intc/loongarch_ipi.h" 28 #include "hw/intc/loongarch_extioi.h" 29 #include "hw/intc/loongarch_pch_pic.h" 30 #include "hw/intc/loongarch_pch_msi.h" 31 #include "hw/pci-host/ls7a.h" 32 #include "hw/pci-host/gpex.h" 33 #include "hw/misc/unimp.h" 34 #include "hw/loongarch/fw_cfg.h" 35 #include "target/loongarch/cpu.h" 36 #include "hw/firmware/smbios.h" 37 #include "qapi/qapi-visit-common.h" 38 #include "hw/acpi/generic_event_device.h" 39 #include "hw/mem/nvdimm.h" 40 #include "hw/platform-bus.h" 41 #include "hw/display/ramfb.h" 42 #include "hw/uefi/var-service-api.h" 43 #include "hw/mem/pc-dimm.h" 44 #include "system/tpm.h" 45 #include "system/block-backend.h" 46 #include "hw/block/flash.h" 47 #include "hw/virtio/virtio-iommu.h" 48 #include "qemu/error-report.h" 49 50 static void virt_get_veiointc(Object *obj, Visitor *v, const char *name, 51 void *opaque, Error **errp) 52 { 53 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 54 OnOffAuto veiointc = lvms->veiointc; 55 56 visit_type_OnOffAuto(v, name, &veiointc, errp); 57 } 58 59 static void virt_set_veiointc(Object *obj, Visitor *v, const char *name, 60 void *opaque, Error **errp) 61 { 62 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 63 64 visit_type_OnOffAuto(v, name, &lvms->veiointc, errp); 65 } 66 67 static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, 68 const char *name, 69 const char *alias_prop_name) 70 { 71 DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); 72 73 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); 74 qdev_prop_set_uint8(dev, "width", 4); 75 qdev_prop_set_uint8(dev, "device-width", 2); 76 qdev_prop_set_bit(dev, "big-endian", false); 77 qdev_prop_set_uint16(dev, "id0", 0x89); 78 qdev_prop_set_uint16(dev, "id1", 0x18); 79 qdev_prop_set_uint16(dev, "id2", 0x00); 80 qdev_prop_set_uint16(dev, "id3", 0x00); 81 qdev_prop_set_string(dev, "name", name); 82 object_property_add_child(OBJECT(lvms), name, OBJECT(dev)); 83 object_property_add_alias(OBJECT(lvms), alias_prop_name, 84 OBJECT(dev), "drive"); 85 return PFLASH_CFI01(dev); 86 } 87 88 static void virt_flash_create(LoongArchVirtMachineState *lvms) 89 { 90 lvms->flash[0] = virt_flash_create1(lvms, "virt.flash0", "pflash0"); 91 lvms->flash[1] = virt_flash_create1(lvms, "virt.flash1", "pflash1"); 92 } 93 94 static void virt_flash_map1(PFlashCFI01 *flash, 95 hwaddr base, hwaddr size, 96 MemoryRegion *sysmem) 97 { 98 DeviceState *dev = DEVICE(flash); 99 BlockBackend *blk; 100 hwaddr real_size = size; 101 102 blk = pflash_cfi01_get_blk(flash); 103 if (blk) { 104 real_size = blk_getlength(blk); 105 assert(real_size && real_size <= size); 106 } 107 108 assert(QEMU_IS_ALIGNED(real_size, VIRT_FLASH_SECTOR_SIZE)); 109 assert(real_size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX); 110 111 qdev_prop_set_uint32(dev, "num-blocks", real_size / VIRT_FLASH_SECTOR_SIZE); 112 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 113 memory_region_add_subregion(sysmem, base, 114 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); 115 } 116 117 static void virt_flash_map(LoongArchVirtMachineState *lvms, 118 MemoryRegion *sysmem) 119 { 120 PFlashCFI01 *flash0 = lvms->flash[0]; 121 PFlashCFI01 *flash1 = lvms->flash[1]; 122 123 virt_flash_map1(flash0, VIRT_FLASH0_BASE, VIRT_FLASH0_SIZE, sysmem); 124 virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem); 125 } 126 127 static void virt_build_smbios(LoongArchVirtMachineState *lvms) 128 { 129 MachineState *ms = MACHINE(lvms); 130 MachineClass *mc = MACHINE_GET_CLASS(lvms); 131 uint8_t *smbios_tables, *smbios_anchor; 132 size_t smbios_tables_len, smbios_anchor_len; 133 const char *product = "QEMU Virtual Machine"; 134 135 if (!lvms->fw_cfg) { 136 return; 137 } 138 139 smbios_set_defaults("QEMU", product, mc->name); 140 141 smbios_get_tables(ms, SMBIOS_ENTRY_POINT_TYPE_64, 142 NULL, 0, 143 &smbios_tables, &smbios_tables_len, 144 &smbios_anchor, &smbios_anchor_len, &error_fatal); 145 146 if (smbios_anchor) { 147 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-tables", 148 smbios_tables, smbios_tables_len); 149 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-anchor", 150 smbios_anchor, smbios_anchor_len); 151 } 152 } 153 154 static void virt_done(Notifier *notifier, void *data) 155 { 156 LoongArchVirtMachineState *lvms = container_of(notifier, 157 LoongArchVirtMachineState, machine_done); 158 virt_build_smbios(lvms); 159 virt_acpi_setup(lvms); 160 virt_fdt_setup(lvms); 161 } 162 163 static void virt_powerdown_req(Notifier *notifier, void *opaque) 164 { 165 LoongArchVirtMachineState *s; 166 167 s = container_of(notifier, LoongArchVirtMachineState, powerdown_notifier); 168 acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS); 169 } 170 171 static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type) 172 { 173 /* Ensure there are no duplicate entries. */ 174 for (unsigned i = 0; i < memmap_entries; i++) { 175 assert(memmap_table[i].address != address); 176 } 177 178 memmap_table = g_renew(struct memmap_entry, memmap_table, 179 memmap_entries + 1); 180 memmap_table[memmap_entries].address = cpu_to_le64(address); 181 memmap_table[memmap_entries].length = cpu_to_le64(length); 182 memmap_table[memmap_entries].type = cpu_to_le32(type); 183 memmap_table[memmap_entries].reserved = 0; 184 memmap_entries++; 185 } 186 187 static DeviceState *create_acpi_ged(DeviceState *pch_pic, 188 LoongArchVirtMachineState *lvms) 189 { 190 DeviceState *dev; 191 MachineState *ms = MACHINE(lvms); 192 MachineClass *mc = MACHINE_GET_CLASS(lvms); 193 uint32_t event = ACPI_GED_PWR_DOWN_EVT; 194 195 if (ms->ram_slots) { 196 event |= ACPI_GED_MEM_HOTPLUG_EVT; 197 } 198 199 if (mc->has_hotpluggable_cpus) { 200 event |= ACPI_GED_CPU_HOTPLUG_EVT; 201 } 202 203 dev = qdev_new(TYPE_ACPI_GED); 204 qdev_prop_set_uint32(dev, "ged-event", event); 205 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 206 207 /* ged event */ 208 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VIRT_GED_EVT_ADDR); 209 /* memory hotplug */ 210 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, VIRT_GED_MEM_ADDR); 211 /* ged regs used for reset and power down */ 212 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR); 213 214 if (mc->has_hotpluggable_cpus) { 215 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 3, VIRT_GED_CPUHP_ADDR); 216 } 217 218 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 219 qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE)); 220 return dev; 221 } 222 223 static DeviceState *create_platform_bus(DeviceState *pch_pic) 224 { 225 DeviceState *dev; 226 SysBusDevice *sysbus; 227 int i, irq; 228 MemoryRegion *sysmem = get_system_memory(); 229 230 dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); 231 dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); 232 qdev_prop_set_uint32(dev, "num_irqs", VIRT_PLATFORM_BUS_NUM_IRQS); 233 qdev_prop_set_uint32(dev, "mmio_size", VIRT_PLATFORM_BUS_SIZE); 234 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 235 236 sysbus = SYS_BUS_DEVICE(dev); 237 for (i = 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) { 238 irq = VIRT_PLATFORM_BUS_IRQ - VIRT_GSI_BASE + i; 239 sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(pch_pic, irq)); 240 } 241 242 memory_region_add_subregion(sysmem, 243 VIRT_PLATFORM_BUS_BASEADDRESS, 244 sysbus_mmio_get_region(sysbus, 0)); 245 return dev; 246 } 247 248 static void virt_devices_init(DeviceState *pch_pic, 249 LoongArchVirtMachineState *lvms) 250 { 251 MachineClass *mc = MACHINE_GET_CLASS(lvms); 252 DeviceState *gpex_dev; 253 SysBusDevice *d; 254 PCIBus *pci_bus; 255 MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg; 256 MemoryRegion *mmio_alias, *mmio_reg; 257 int i; 258 259 gpex_dev = qdev_new(TYPE_GPEX_HOST); 260 d = SYS_BUS_DEVICE(gpex_dev); 261 sysbus_realize_and_unref(d, &error_fatal); 262 pci_bus = PCI_HOST_BRIDGE(gpex_dev)->bus; 263 lvms->pci_bus = pci_bus; 264 265 /* Map only part size_ecam bytes of ECAM space */ 266 ecam_alias = g_new0(MemoryRegion, 1); 267 ecam_reg = sysbus_mmio_get_region(d, 0); 268 memory_region_init_alias(ecam_alias, OBJECT(gpex_dev), "pcie-ecam", 269 ecam_reg, 0, VIRT_PCI_CFG_SIZE); 270 memory_region_add_subregion(get_system_memory(), VIRT_PCI_CFG_BASE, 271 ecam_alias); 272 273 /* Map PCI mem space */ 274 mmio_alias = g_new0(MemoryRegion, 1); 275 mmio_reg = sysbus_mmio_get_region(d, 1); 276 memory_region_init_alias(mmio_alias, OBJECT(gpex_dev), "pcie-mmio", 277 mmio_reg, VIRT_PCI_MEM_BASE, VIRT_PCI_MEM_SIZE); 278 memory_region_add_subregion(get_system_memory(), VIRT_PCI_MEM_BASE, 279 mmio_alias); 280 281 /* Map PCI IO port space. */ 282 pio_alias = g_new0(MemoryRegion, 1); 283 pio_reg = sysbus_mmio_get_region(d, 2); 284 memory_region_init_alias(pio_alias, OBJECT(gpex_dev), "pcie-io", pio_reg, 285 VIRT_PCI_IO_OFFSET, VIRT_PCI_IO_SIZE); 286 memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE, 287 pio_alias); 288 289 for (i = 0; i < PCI_NUM_PINS; i++) { 290 sysbus_connect_irq(d, i, 291 qdev_get_gpio_in(pch_pic, 16 + i)); 292 gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); 293 } 294 295 /* 296 * Create uart fdt node in reverse order so that they appear 297 * in the finished device tree lowest address first 298 */ 299 for (i = VIRT_UART_COUNT; i-- > 0;) { 300 hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; 301 int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE; 302 serial_mm_init(get_system_memory(), base, 0, 303 qdev_get_gpio_in(pch_pic, irq), 304 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); 305 } 306 307 /* Network init */ 308 pci_init_nic_devices(pci_bus, mc->default_nic); 309 310 /* 311 * There are some invalid guest memory access. 312 * Create some unimplemented devices to emulate this. 313 */ 314 create_unimplemented_device("pci-dma-cfg", 0x1001041c, 0x4); 315 sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, 316 qdev_get_gpio_in(pch_pic, 317 VIRT_RTC_IRQ - VIRT_GSI_BASE)); 318 319 /* acpi ged */ 320 lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); 321 /* platform bus */ 322 lvms->platform_bus_dev = create_platform_bus(pch_pic); 323 } 324 325 static void virt_cpu_irq_init(LoongArchVirtMachineState *lvms) 326 { 327 int num; 328 MachineState *ms = MACHINE(lvms); 329 MachineClass *mc = MACHINE_GET_CLASS(ms); 330 const CPUArchIdList *possible_cpus; 331 CPUState *cs; 332 333 /* cpu nodes */ 334 possible_cpus = mc->possible_cpu_arch_ids(ms); 335 for (num = 0; num < possible_cpus->len; num++) { 336 cs = possible_cpus->cpus[num].cpu; 337 if (cs == NULL) { 338 continue; 339 } 340 341 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), DEVICE(cs), 342 &error_abort); 343 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), DEVICE(cs), 344 &error_abort); 345 } 346 } 347 348 static void virt_irq_init(LoongArchVirtMachineState *lvms) 349 { 350 DeviceState *pch_pic, *pch_msi; 351 DeviceState *ipi, *extioi; 352 SysBusDevice *d; 353 int i, start, num; 354 355 /* 356 * Extended IRQ model. 357 * | 358 * +-----------+ +-------------|--------+ +-----------+ 359 * | IPI/Timer | --> | CPUINTC(0-3)|(4-255) | <-- | IPI/Timer | 360 * +-----------+ +-------------|--------+ +-----------+ 361 * ^ | 362 * | 363 * +---------+ 364 * | EIOINTC | 365 * +---------+ 366 * ^ ^ 367 * | | 368 * +---------+ +---------+ 369 * | PCH-PIC | | PCH-MSI | 370 * +---------+ +---------+ 371 * ^ ^ ^ 372 * | | | 373 * +--------+ +---------+ +---------+ 374 * | UARTs | | Devices | | Devices | 375 * +--------+ +---------+ +---------+ 376 * 377 * Virt extended IRQ model. 378 * 379 * +-----+ +---------------+ +-------+ 380 * | IPI |--> | CPUINTC(0-255)| <-- | Timer | 381 * +-----+ +---------------+ +-------+ 382 * ^ 383 * | 384 * +-----------+ 385 * | V-EIOINTC | 386 * +-----------+ 387 * ^ ^ 388 * | | 389 * +---------+ +---------+ 390 * | PCH-PIC | | PCH-MSI | 391 * +---------+ +---------+ 392 * ^ ^ ^ 393 * | | | 394 * +--------+ +---------+ +---------+ 395 * | UARTs | | Devices | | Devices | 396 * +--------+ +---------+ +---------+ 397 */ 398 399 /* Create IPI device */ 400 ipi = qdev_new(TYPE_LOONGARCH_IPI); 401 lvms->ipi = ipi; 402 sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); 403 404 /* IPI iocsr memory region */ 405 memory_region_add_subregion(&lvms->system_iocsr, SMP_IPI_MAILBOX, 406 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0)); 407 memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, 408 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); 409 410 /* Create EXTIOI device */ 411 extioi = qdev_new(TYPE_LOONGARCH_EXTIOI); 412 lvms->extioi = extioi; 413 if (virt_is_veiointc_enabled(lvms)) { 414 qdev_prop_set_bit(extioi, "has-virtualization-extension", true); 415 } 416 sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal); 417 memory_region_add_subregion(&lvms->system_iocsr, APIC_BASE, 418 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); 419 if (virt_is_veiointc_enabled(lvms)) { 420 memory_region_add_subregion(&lvms->system_iocsr, EXTIOI_VIRT_BASE, 421 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 1)); 422 } 423 424 virt_cpu_irq_init(lvms); 425 pch_pic = qdev_new(TYPE_LOONGARCH_PIC); 426 num = VIRT_PCH_PIC_IRQ_NUM; 427 qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); 428 d = SYS_BUS_DEVICE(pch_pic); 429 sysbus_realize_and_unref(d, &error_fatal); 430 memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE, 431 sysbus_mmio_get_region(d, 0)); 432 memory_region_add_subregion(get_system_memory(), 433 VIRT_IOAPIC_REG_BASE + PCH_PIC_ROUTE_ENTRY_OFFSET, 434 sysbus_mmio_get_region(d, 1)); 435 memory_region_add_subregion(get_system_memory(), 436 VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS_LO, 437 sysbus_mmio_get_region(d, 2)); 438 439 /* Connect pch_pic irqs to extioi */ 440 for (i = 0; i < num; i++) { 441 qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); 442 } 443 444 pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); 445 start = num; 446 num = EXTIOI_IRQS - start; 447 qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); 448 qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); 449 d = SYS_BUS_DEVICE(pch_msi); 450 sysbus_realize_and_unref(d, &error_fatal); 451 sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW); 452 for (i = 0; i < num; i++) { 453 /* Connect pch_msi irqs to extioi */ 454 qdev_connect_gpio_out(DEVICE(d), i, 455 qdev_get_gpio_in(extioi, i + start)); 456 } 457 458 virt_devices_init(pch_pic, lvms); 459 } 460 461 static void virt_firmware_init(LoongArchVirtMachineState *lvms) 462 { 463 char *filename = MACHINE(lvms)->firmware; 464 char *bios_name = NULL; 465 int bios_size, i; 466 BlockBackend *pflash_blk0; 467 MemoryRegion *mr; 468 469 lvms->bios_loaded = false; 470 471 /* Map legacy -drive if=pflash to machine properties */ 472 for (i = 0; i < ARRAY_SIZE(lvms->flash); i++) { 473 pflash_cfi01_legacy_drive(lvms->flash[i], 474 drive_get(IF_PFLASH, 0, i)); 475 } 476 477 virt_flash_map(lvms, get_system_memory()); 478 479 pflash_blk0 = pflash_cfi01_get_blk(lvms->flash[0]); 480 481 if (pflash_blk0) { 482 if (filename) { 483 error_report("cannot use both '-bios' and '-drive if=pflash'" 484 "options at once"); 485 exit(1); 486 } 487 lvms->bios_loaded = true; 488 return; 489 } 490 491 if (filename) { 492 bios_name = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename); 493 if (!bios_name) { 494 error_report("Could not find ROM image '%s'", filename); 495 exit(1); 496 } 497 498 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(lvms->flash[0]), 0); 499 bios_size = load_image_mr(bios_name, mr); 500 if (bios_size < 0) { 501 error_report("Could not load ROM image '%s'", bios_name); 502 exit(1); 503 } 504 g_free(bios_name); 505 lvms->bios_loaded = true; 506 } 507 } 508 509 static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, 510 uint64_t val, unsigned size, 511 MemTxAttrs attrs) 512 { 513 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 514 uint64_t features; 515 516 switch (addr) { 517 case MISC_FUNC_REG: 518 if (!virt_is_veiointc_enabled(lvms)) { 519 return MEMTX_OK; 520 } 521 522 features = address_space_ldl(&lvms->as_iocsr, 523 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 524 attrs, NULL); 525 if (val & BIT_ULL(IOCSRM_EXTIOI_EN)) { 526 features |= BIT(EXTIOI_ENABLE); 527 } 528 if (val & BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE)) { 529 features |= BIT(EXTIOI_ENABLE_INT_ENCODE); 530 } 531 532 address_space_stl(&lvms->as_iocsr, 533 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 534 features, attrs, NULL); 535 break; 536 default: 537 g_assert_not_reached(); 538 } 539 540 return MEMTX_OK; 541 } 542 543 static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, 544 uint64_t *data, 545 unsigned size, MemTxAttrs attrs) 546 { 547 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); 548 uint64_t ret = 0; 549 int features; 550 551 switch (addr) { 552 case VERSION_REG: 553 ret = 0x11ULL; 554 break; 555 case FEATURE_REG: 556 ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI); 557 if (kvm_enabled()) { 558 ret |= BIT(IOCSRF_VM); 559 } 560 break; 561 case VENDOR_REG: 562 ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */ 563 break; 564 case CPUNAME_REG: 565 ret = 0x303030354133ULL; /* "3A5000" */ 566 break; 567 case MISC_FUNC_REG: 568 if (!virt_is_veiointc_enabled(lvms)) { 569 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 570 break; 571 } 572 573 features = address_space_ldl(&lvms->as_iocsr, 574 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, 575 attrs, NULL); 576 if (features & BIT(EXTIOI_ENABLE)) { 577 ret |= BIT_ULL(IOCSRM_EXTIOI_EN); 578 } 579 if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) { 580 ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE); 581 } 582 break; 583 default: 584 g_assert_not_reached(); 585 } 586 587 *data = ret; 588 return MEMTX_OK; 589 } 590 591 static const MemoryRegionOps virt_iocsr_misc_ops = { 592 .read_with_attrs = virt_iocsr_misc_read, 593 .write_with_attrs = virt_iocsr_misc_write, 594 .endianness = DEVICE_LITTLE_ENDIAN, 595 .valid = { 596 .min_access_size = 4, 597 .max_access_size = 8, 598 }, 599 .impl = { 600 .min_access_size = 8, 601 .max_access_size = 8, 602 }, 603 }; 604 605 static void fw_cfg_add_memory(MachineState *ms) 606 { 607 hwaddr base, size, ram_size, gap; 608 int nb_numa_nodes, nodes; 609 NodeInfo *numa_info; 610 611 ram_size = ms->ram_size; 612 base = VIRT_LOWMEM_BASE; 613 gap = VIRT_LOWMEM_SIZE; 614 nodes = nb_numa_nodes = ms->numa_state->num_nodes; 615 numa_info = ms->numa_state->nodes; 616 if (!nodes) { 617 nodes = 1; 618 } 619 620 /* add fw_cfg memory map of node0 */ 621 if (nb_numa_nodes) { 622 size = numa_info[0].node_mem; 623 } else { 624 size = ram_size; 625 } 626 627 if (size >= gap) { 628 memmap_add_entry(base, gap, 1); 629 size -= gap; 630 base = VIRT_HIGHMEM_BASE; 631 } 632 633 if (size) { 634 memmap_add_entry(base, size, 1); 635 base += size; 636 } 637 638 if (nodes < 2) { 639 return; 640 } 641 642 /* add fw_cfg memory map of other nodes */ 643 if (numa_info[0].node_mem < gap && ram_size > gap) { 644 /* 645 * memory map for the maining nodes splited into two part 646 * lowram: [base, +(gap - numa_info[0].node_mem)) 647 * highram: [VIRT_HIGHMEM_BASE, +(ram_size - gap)) 648 */ 649 memmap_add_entry(base, gap - numa_info[0].node_mem, 1); 650 size = ram_size - gap; 651 base = VIRT_HIGHMEM_BASE; 652 } else { 653 size = ram_size - numa_info[0].node_mem; 654 } 655 656 if (size) { 657 memmap_add_entry(base, size, 1); 658 } 659 } 660 661 static void virt_init(MachineState *machine) 662 { 663 const char *cpu_model = machine->cpu_type; 664 MemoryRegion *address_space_mem = get_system_memory(); 665 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine); 666 int i; 667 hwaddr base, size, ram_size = machine->ram_size; 668 MachineClass *mc = MACHINE_GET_CLASS(machine); 669 Object *cpuobj; 670 671 if (!cpu_model) { 672 cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); 673 } 674 675 /* Create IOCSR space */ 676 memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, 677 machine, "iocsr", UINT64_MAX); 678 address_space_init(&lvms->as_iocsr, &lvms->system_iocsr, "IOCSR"); 679 memory_region_init_io(&lvms->iocsr_mem, OBJECT(machine), 680 &virt_iocsr_misc_ops, 681 machine, "iocsr_misc", 0x428); 682 memory_region_add_subregion(&lvms->system_iocsr, 0, &lvms->iocsr_mem); 683 684 /* Init CPUs */ 685 mc->possible_cpu_arch_ids(machine); 686 for (i = 0; i < machine->smp.cpus; i++) { 687 cpuobj = object_new(machine->cpu_type); 688 if (cpuobj == NULL) { 689 error_report("Fail to create object with type %s ", 690 machine->cpu_type); 691 exit(EXIT_FAILURE); 692 } 693 qdev_realize_and_unref(DEVICE(cpuobj), NULL, &error_fatal); 694 } 695 fw_cfg_add_memory(machine); 696 697 /* Node0 memory */ 698 size = ram_size; 699 base = VIRT_LOWMEM_BASE; 700 if (size > VIRT_LOWMEM_SIZE) { 701 size = VIRT_LOWMEM_SIZE; 702 } 703 704 memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram", 705 machine->ram, base, size); 706 memory_region_add_subregion(address_space_mem, base, &lvms->lowmem); 707 base += size; 708 if (ram_size - size) { 709 base = VIRT_HIGHMEM_BASE; 710 memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram", 711 machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size); 712 memory_region_add_subregion(address_space_mem, base, &lvms->highmem); 713 base += ram_size - size; 714 } 715 716 /* initialize device memory address space */ 717 if (machine->ram_size < machine->maxram_size) { 718 ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; 719 720 if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { 721 error_report("unsupported amount of memory slots: %"PRIu64, 722 machine->ram_slots); 723 exit(EXIT_FAILURE); 724 } 725 726 if (QEMU_ALIGN_UP(machine->maxram_size, 727 TARGET_PAGE_SIZE) != machine->maxram_size) { 728 error_report("maximum memory size must by aligned to multiple of " 729 "%d bytes", TARGET_PAGE_SIZE); 730 exit(EXIT_FAILURE); 731 } 732 machine_memory_devices_init(machine, base, device_mem_size); 733 } 734 735 /* load the BIOS image. */ 736 virt_firmware_init(lvms); 737 738 /* fw_cfg init */ 739 lvms->fw_cfg = virt_fw_cfg_init(ram_size, machine); 740 rom_set_fw(lvms->fw_cfg); 741 if (lvms->fw_cfg != NULL) { 742 fw_cfg_add_file(lvms->fw_cfg, "etc/memmap", 743 memmap_table, 744 sizeof(struct memmap_entry) * (memmap_entries)); 745 } 746 747 /* Initialize the IO interrupt subsystem */ 748 virt_irq_init(lvms); 749 lvms->machine_done.notify = virt_done; 750 qemu_add_machine_init_done_notifier(&lvms->machine_done); 751 /* connect powerdown request */ 752 lvms->powerdown_notifier.notify = virt_powerdown_req; 753 qemu_register_powerdown_notifier(&lvms->powerdown_notifier); 754 755 lvms->bootinfo.ram_size = ram_size; 756 loongarch_load_kernel(machine, &lvms->bootinfo); 757 } 758 759 static void virt_get_acpi(Object *obj, Visitor *v, const char *name, 760 void *opaque, Error **errp) 761 { 762 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 763 OnOffAuto acpi = lvms->acpi; 764 765 visit_type_OnOffAuto(v, name, &acpi, errp); 766 } 767 768 static void virt_set_acpi(Object *obj, Visitor *v, const char *name, 769 void *opaque, Error **errp) 770 { 771 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 772 773 visit_type_OnOffAuto(v, name, &lvms->acpi, errp); 774 } 775 776 static void virt_initfn(Object *obj) 777 { 778 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); 779 780 if (tcg_enabled()) { 781 lvms->veiointc = ON_OFF_AUTO_OFF; 782 } 783 lvms->acpi = ON_OFF_AUTO_AUTO; 784 lvms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); 785 lvms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); 786 virt_flash_create(lvms); 787 } 788 789 static void virt_get_topo_from_index(MachineState *ms, 790 LoongArchCPUTopo *topo, int index) 791 { 792 topo->socket_id = index / (ms->smp.cores * ms->smp.threads); 793 topo->core_id = index / ms->smp.threads % ms->smp.cores; 794 topo->thread_id = index % ms->smp.threads; 795 } 796 797 static unsigned int topo_align_up(unsigned int count) 798 { 799 g_assert(count >= 1); 800 count -= 1; 801 return BIT(count ? 32 - clz32(count) : 0); 802 } 803 804 /* 805 * LoongArch Reference Manual Vol1, Chapter 7.4.12 CPU Identity 806 * For CPU architecture, bit0 .. bit8 is valid for CPU id, max cpuid is 512 807 * However for IPI/Eiointc interrupt controller, max supported cpu id for 808 * irq routingis 256 809 * 810 * Here max cpu id is 256 for virt machine 811 */ 812 static int virt_get_arch_id_from_topo(MachineState *ms, LoongArchCPUTopo *topo) 813 { 814 int arch_id, threads, cores, sockets; 815 816 threads = topo_align_up(ms->smp.threads); 817 cores = topo_align_up(ms->smp.cores); 818 sockets = topo_align_up(ms->smp.sockets); 819 if ((threads * cores * sockets) > 256) { 820 error_report("Exceeding max cpuid 256 with sockets[%d] cores[%d]" 821 " threads[%d]", ms->smp.sockets, ms->smp.cores, 822 ms->smp.threads); 823 exit(1); 824 } 825 826 arch_id = topo->thread_id + topo->core_id * threads; 827 arch_id += topo->socket_id * threads * cores; 828 return arch_id; 829 } 830 831 /* Find cpu slot in machine->possible_cpus by arch_id */ 832 static CPUArchId *virt_find_cpu_slot(MachineState *ms, int arch_id) 833 { 834 int n; 835 for (n = 0; n < ms->possible_cpus->len; n++) { 836 if (ms->possible_cpus->cpus[n].arch_id == arch_id) { 837 return &ms->possible_cpus->cpus[n]; 838 } 839 } 840 841 return NULL; 842 } 843 844 /* Find cpu slot for cold-plut CPU object where cpu is NULL */ 845 static CPUArchId *virt_find_empty_cpu_slot(MachineState *ms) 846 { 847 int n; 848 for (n = 0; n < ms->possible_cpus->len; n++) { 849 if (ms->possible_cpus->cpus[n].cpu == NULL) { 850 return &ms->possible_cpus->cpus[n]; 851 } 852 } 853 854 return NULL; 855 } 856 857 static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, 858 DeviceState *dev, Error **errp) 859 { 860 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 861 MachineState *ms = MACHINE(OBJECT(hotplug_dev)); 862 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 863 CPUState *cs = CPU(dev); 864 CPUArchId *cpu_slot; 865 LoongArchCPUTopo topo; 866 int arch_id; 867 868 if (lvms->acpi_ged) { 869 if ((cpu->thread_id < 0) || (cpu->thread_id >= ms->smp.threads)) { 870 error_setg(errp, 871 "Invalid thread-id %u specified, must be in range 1:%u", 872 cpu->thread_id, ms->smp.threads - 1); 873 return; 874 } 875 876 if ((cpu->core_id < 0) || (cpu->core_id >= ms->smp.cores)) { 877 error_setg(errp, 878 "Invalid core-id %u specified, must be in range 1:%u", 879 cpu->core_id, ms->smp.cores - 1); 880 return; 881 } 882 883 if ((cpu->socket_id < 0) || (cpu->socket_id >= ms->smp.sockets)) { 884 error_setg(errp, 885 "Invalid socket-id %u specified, must be in range 1:%u", 886 cpu->socket_id, ms->smp.sockets - 1); 887 return; 888 } 889 890 topo.socket_id = cpu->socket_id; 891 topo.core_id = cpu->core_id; 892 topo.thread_id = cpu->thread_id; 893 arch_id = virt_get_arch_id_from_topo(ms, &topo); 894 cpu_slot = virt_find_cpu_slot(ms, arch_id); 895 if (CPU(cpu_slot->cpu)) { 896 error_setg(errp, 897 "cpu(id%d=%d:%d:%d) with arch-id %" PRIu64 " exists", 898 cs->cpu_index, cpu->socket_id, cpu->core_id, 899 cpu->thread_id, cpu_slot->arch_id); 900 return; 901 } 902 } else { 903 /* For cold-add cpu, find empty cpu slot */ 904 cpu_slot = virt_find_empty_cpu_slot(ms); 905 topo.socket_id = cpu_slot->props.socket_id; 906 topo.core_id = cpu_slot->props.core_id; 907 topo.thread_id = cpu_slot->props.thread_id; 908 object_property_set_int(OBJECT(dev), "socket-id", topo.socket_id, NULL); 909 object_property_set_int(OBJECT(dev), "core-id", topo.core_id, NULL); 910 object_property_set_int(OBJECT(dev), "thread-id", topo.thread_id, NULL); 911 } 912 913 cpu->env.address_space_iocsr = &lvms->as_iocsr; 914 cpu->phy_id = cpu_slot->arch_id; 915 cs->cpu_index = cpu_slot - ms->possible_cpus->cpus; 916 numa_cpu_pre_plug(cpu_slot, dev, errp); 917 } 918 919 static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev, 920 DeviceState *dev, Error **errp) 921 { 922 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 923 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 924 CPUState *cs = CPU(dev); 925 926 if (cs->cpu_index == 0) { 927 error_setg(errp, "hot-unplug of boot cpu(id%d=%d:%d:%d) not supported", 928 cs->cpu_index, cpu->socket_id, 929 cpu->core_id, cpu->thread_id); 930 return; 931 } 932 933 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 934 } 935 936 static void virt_cpu_unplug(HotplugHandler *hotplug_dev, 937 DeviceState *dev, Error **errp) 938 { 939 CPUArchId *cpu_slot; 940 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 941 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 942 943 /* Notify ipi and extioi irqchip to remove interrupt routing to CPU */ 944 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->ipi), dev, &error_abort); 945 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->extioi), dev, &error_abort); 946 947 /* Notify acpi ged CPU removed */ 948 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &error_abort); 949 950 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 951 cpu_slot->cpu = NULL; 952 } 953 954 static void virt_cpu_plug(HotplugHandler *hotplug_dev, 955 DeviceState *dev, Error **errp) 956 { 957 CPUArchId *cpu_slot; 958 LoongArchCPU *cpu = LOONGARCH_CPU(dev); 959 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 960 961 if (lvms->ipi) { 962 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), dev, &error_abort); 963 } 964 965 if (lvms->extioi) { 966 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), dev, &error_abort); 967 } 968 969 if (lvms->acpi_ged) { 970 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, 971 &error_abort); 972 } 973 974 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id); 975 cpu_slot->cpu = CPU(dev); 976 } 977 978 static bool memhp_type_supported(DeviceState *dev) 979 { 980 /* we only support pc dimm now */ 981 return object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) && 982 !object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); 983 } 984 985 static void virt_mem_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 986 Error **errp) 987 { 988 pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), errp); 989 } 990 991 static void virt_device_pre_plug(HotplugHandler *hotplug_dev, 992 DeviceState *dev, Error **errp) 993 { 994 if (memhp_type_supported(dev)) { 995 virt_mem_pre_plug(hotplug_dev, dev, errp); 996 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 997 virt_cpu_pre_plug(hotplug_dev, dev, errp); 998 } 999 } 1000 1001 static void virt_mem_unplug_request(HotplugHandler *hotplug_dev, 1002 DeviceState *dev, Error **errp) 1003 { 1004 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1005 1006 /* the acpi ged is always exist */ 1007 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, 1008 errp); 1009 } 1010 1011 static void virt_device_unplug_request(HotplugHandler *hotplug_dev, 1012 DeviceState *dev, Error **errp) 1013 { 1014 if (memhp_type_supported(dev)) { 1015 virt_mem_unplug_request(hotplug_dev, dev, errp); 1016 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1017 virt_cpu_unplug_request(hotplug_dev, dev, errp); 1018 } 1019 } 1020 1021 static void virt_mem_unplug(HotplugHandler *hotplug_dev, 1022 DeviceState *dev, Error **errp) 1023 { 1024 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1025 1026 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); 1027 pc_dimm_unplug(PC_DIMM(dev), MACHINE(lvms)); 1028 qdev_unrealize(dev); 1029 } 1030 1031 static void virt_device_unplug(HotplugHandler *hotplug_dev, 1032 DeviceState *dev, Error **errp) 1033 { 1034 if (memhp_type_supported(dev)) { 1035 virt_mem_unplug(hotplug_dev, dev, errp); 1036 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1037 virt_cpu_unplug(hotplug_dev, dev, errp); 1038 } 1039 } 1040 1041 static void virt_mem_plug(HotplugHandler *hotplug_dev, 1042 DeviceState *dev, Error **errp) 1043 { 1044 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1045 1046 pc_dimm_plug(PC_DIMM(dev), MACHINE(lvms)); 1047 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), 1048 dev, &error_abort); 1049 } 1050 1051 static void virt_device_plug_cb(HotplugHandler *hotplug_dev, 1052 DeviceState *dev, Error **errp) 1053 { 1054 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); 1055 MachineClass *mc = MACHINE_GET_CLASS(lvms); 1056 PlatformBusDevice *pbus; 1057 1058 if (device_is_dynamic_sysbus(mc, dev)) { 1059 if (lvms->platform_bus_dev) { 1060 pbus = PLATFORM_BUS_DEVICE(lvms->platform_bus_dev); 1061 platform_bus_link_device(pbus, SYS_BUS_DEVICE(dev)); 1062 } 1063 } else if (memhp_type_supported(dev)) { 1064 virt_mem_plug(hotplug_dev, dev, errp); 1065 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) { 1066 virt_cpu_plug(hotplug_dev, dev, errp); 1067 } 1068 } 1069 1070 static HotplugHandler *virt_get_hotplug_handler(MachineState *machine, 1071 DeviceState *dev) 1072 { 1073 MachineClass *mc = MACHINE_GET_CLASS(machine); 1074 1075 if (device_is_dynamic_sysbus(mc, dev) || 1076 object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU) || 1077 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || 1078 memhp_type_supported(dev)) { 1079 return HOTPLUG_HANDLER(machine); 1080 } 1081 return NULL; 1082 } 1083 1084 static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) 1085 { 1086 int n, arch_id; 1087 unsigned int max_cpus = ms->smp.max_cpus; 1088 LoongArchCPUTopo topo; 1089 1090 if (ms->possible_cpus) { 1091 assert(ms->possible_cpus->len == max_cpus); 1092 return ms->possible_cpus; 1093 } 1094 1095 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + 1096 sizeof(CPUArchId) * max_cpus); 1097 ms->possible_cpus->len = max_cpus; 1098 for (n = 0; n < ms->possible_cpus->len; n++) { 1099 virt_get_topo_from_index(ms, &topo, n); 1100 arch_id = virt_get_arch_id_from_topo(ms, &topo); 1101 ms->possible_cpus->cpus[n].type = ms->cpu_type; 1102 ms->possible_cpus->cpus[n].arch_id = arch_id; 1103 ms->possible_cpus->cpus[n].vcpus_count = 1; 1104 ms->possible_cpus->cpus[n].props.has_socket_id = true; 1105 ms->possible_cpus->cpus[n].props.socket_id = topo.socket_id; 1106 ms->possible_cpus->cpus[n].props.has_core_id = true; 1107 ms->possible_cpus->cpus[n].props.core_id = topo.core_id; 1108 ms->possible_cpus->cpus[n].props.has_thread_id = true; 1109 ms->possible_cpus->cpus[n].props.thread_id = topo.thread_id; 1110 } 1111 return ms->possible_cpus; 1112 } 1113 1114 static CpuInstanceProperties virt_cpu_index_to_props(MachineState *ms, 1115 unsigned cpu_index) 1116 { 1117 MachineClass *mc = MACHINE_GET_CLASS(ms); 1118 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1119 1120 assert(cpu_index < possible_cpus->len); 1121 return possible_cpus->cpus[cpu_index].props; 1122 } 1123 1124 static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx) 1125 { 1126 int64_t socket_id; 1127 1128 if (ms->numa_state->num_nodes) { 1129 socket_id = ms->possible_cpus->cpus[idx].props.socket_id; 1130 return socket_id % ms->numa_state->num_nodes; 1131 } else { 1132 return 0; 1133 } 1134 } 1135 1136 static void virt_class_init(ObjectClass *oc, const void *data) 1137 { 1138 MachineClass *mc = MACHINE_CLASS(oc); 1139 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); 1140 1141 mc->init = virt_init; 1142 mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464"); 1143 mc->default_ram_id = "loongarch.ram"; 1144 mc->desc = "QEMU LoongArch Virtual Machine"; 1145 mc->max_cpus = LOONGARCH_MAX_CPUS; 1146 mc->is_default = 1; 1147 mc->default_kernel_irqchip_split = false; 1148 mc->block_default_type = IF_VIRTIO; 1149 mc->default_boot_order = "c"; 1150 mc->no_cdrom = 1; 1151 mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids; 1152 mc->cpu_index_to_instance_props = virt_cpu_index_to_props; 1153 mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; 1154 mc->numa_mem_supported = true; 1155 mc->auto_enable_numa_with_memhp = true; 1156 mc->auto_enable_numa_with_memdev = true; 1157 mc->has_hotpluggable_cpus = true; 1158 mc->get_hotplug_handler = virt_get_hotplug_handler; 1159 mc->default_nic = "virtio-net-pci"; 1160 hc->plug = virt_device_plug_cb; 1161 hc->pre_plug = virt_device_pre_plug; 1162 hc->unplug_request = virt_device_unplug_request; 1163 hc->unplug = virt_device_unplug; 1164 1165 object_class_property_add(oc, "acpi", "OnOffAuto", 1166 virt_get_acpi, virt_set_acpi, 1167 NULL, NULL); 1168 object_class_property_set_description(oc, "acpi", 1169 "Enable ACPI"); 1170 object_class_property_add(oc, "v-eiointc", "OnOffAuto", 1171 virt_get_veiointc, virt_set_veiointc, 1172 NULL, NULL); 1173 object_class_property_set_description(oc, "v-eiointc", 1174 "Enable Virt Extend I/O Interrupt Controller."); 1175 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); 1176 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_UEFI_VARS_SYSBUS); 1177 #ifdef CONFIG_TPM 1178 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); 1179 #endif 1180 } 1181 1182 static const TypeInfo virt_machine_types[] = { 1183 { 1184 .name = TYPE_LOONGARCH_VIRT_MACHINE, 1185 .parent = TYPE_MACHINE, 1186 .instance_size = sizeof(LoongArchVirtMachineState), 1187 .class_init = virt_class_init, 1188 .instance_init = virt_initfn, 1189 .interfaces = (const InterfaceInfo[]) { 1190 { TYPE_HOTPLUG_HANDLER }, 1191 { } 1192 }, 1193 } 1194 }; 1195 1196 DEFINE_TYPES(virt_machine_types) 1197