xref: /qemu/hw/intc/xlnx-zynqmp-ipi.c (revision 64552b6be4758d3a774f7787b294543ccebd5358)
1b350735eSAlistair Francis /*
2b350735eSAlistair Francis  * QEMU model of the IPI Inter Processor Interrupt block
3b350735eSAlistair Francis  *
4b350735eSAlistair Francis  * Copyright (c) 2014 Xilinx Inc.
5b350735eSAlistair Francis  *
6b350735eSAlistair Francis  * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
7b350735eSAlistair Francis  * Written by Alistair Francis <alistair.francis@xilinx.com>
8b350735eSAlistair Francis  *
9b350735eSAlistair Francis  * Permission is hereby granted, free of charge, to any person obtaining a copy
10b350735eSAlistair Francis  * of this software and associated documentation files (the "Software"), to deal
11b350735eSAlistair Francis  * in the Software without restriction, including without limitation the rights
12b350735eSAlistair Francis  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13b350735eSAlistair Francis  * copies of the Software, and to permit persons to whom the Software is
14b350735eSAlistair Francis  * furnished to do so, subject to the following conditions:
15b350735eSAlistair Francis  *
16b350735eSAlistair Francis  * The above copyright notice and this permission notice shall be included in
17b350735eSAlistair Francis  * all copies or substantial portions of the Software.
18b350735eSAlistair Francis  *
19b350735eSAlistair Francis  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20b350735eSAlistair Francis  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21b350735eSAlistair Francis  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22b350735eSAlistair Francis  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23b350735eSAlistair Francis  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24b350735eSAlistair Francis  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25b350735eSAlistair Francis  * THE SOFTWARE.
26b350735eSAlistair Francis  */
27b350735eSAlistair Francis 
28b350735eSAlistair Francis #include "qemu/osdep.h"
29b350735eSAlistair Francis #include "hw/sysbus.h"
30b350735eSAlistair Francis #include "hw/register.h"
31b350735eSAlistair Francis #include "qemu/bitops.h"
32b350735eSAlistair Francis #include "qemu/log.h"
330b8fa32fSMarkus Armbruster #include "qemu/module.h"
34b350735eSAlistair Francis #include "hw/intc/xlnx-zynqmp-ipi.h"
35*64552b6bSMarkus Armbruster #include "hw/irq.h"
36b350735eSAlistair Francis 
37b350735eSAlistair Francis #ifndef XLNX_ZYNQMP_IPI_ERR_DEBUG
38b350735eSAlistair Francis #define XLNX_ZYNQMP_IPI_ERR_DEBUG 0
39b350735eSAlistair Francis #endif
40b350735eSAlistair Francis 
41b350735eSAlistair Francis #define DB_PRINT_L(lvl, fmt, args...) do {\
42b350735eSAlistair Francis     if (XLNX_ZYNQMP_IPI_ERR_DEBUG >= lvl) {\
43b350735eSAlistair Francis         qemu_log(TYPE_XLNX_ZYNQMP_IPI ": %s:" fmt, __func__, ## args);\
44b350735eSAlistair Francis     } \
45b350735eSAlistair Francis } while (0)
46b350735eSAlistair Francis 
47b350735eSAlistair Francis #define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
48b350735eSAlistair Francis 
49b350735eSAlistair Francis REG32(IPI_TRIG, 0x0)
50b350735eSAlistair Francis     FIELD(IPI_TRIG, PL_3, 27, 1)
51b350735eSAlistair Francis     FIELD(IPI_TRIG, PL_2, 26, 1)
52b350735eSAlistair Francis     FIELD(IPI_TRIG, PL_1, 25, 1)
53b350735eSAlistair Francis     FIELD(IPI_TRIG, PL_0, 24, 1)
54b350735eSAlistair Francis     FIELD(IPI_TRIG, PMU_3, 19, 1)
55b350735eSAlistair Francis     FIELD(IPI_TRIG, PMU_2, 18, 1)
56b350735eSAlistair Francis     FIELD(IPI_TRIG, PMU_1, 17, 1)
57b350735eSAlistair Francis     FIELD(IPI_TRIG, PMU_0, 16, 1)
58b350735eSAlistair Francis     FIELD(IPI_TRIG, RPU_1, 9, 1)
59b350735eSAlistair Francis     FIELD(IPI_TRIG, RPU_0, 8, 1)
60b350735eSAlistair Francis     FIELD(IPI_TRIG, APU, 0, 1)
61b350735eSAlistair Francis REG32(IPI_OBS, 0x4)
62b350735eSAlistair Francis     FIELD(IPI_OBS, PL_3, 27, 1)
63b350735eSAlistair Francis     FIELD(IPI_OBS, PL_2, 26, 1)
64b350735eSAlistair Francis     FIELD(IPI_OBS, PL_1, 25, 1)
65b350735eSAlistair Francis     FIELD(IPI_OBS, PL_0, 24, 1)
66b350735eSAlistair Francis     FIELD(IPI_OBS, PMU_3, 19, 1)
67b350735eSAlistair Francis     FIELD(IPI_OBS, PMU_2, 18, 1)
68b350735eSAlistair Francis     FIELD(IPI_OBS, PMU_1, 17, 1)
69b350735eSAlistair Francis     FIELD(IPI_OBS, PMU_0, 16, 1)
70b350735eSAlistair Francis     FIELD(IPI_OBS, RPU_1, 9, 1)
71b350735eSAlistair Francis     FIELD(IPI_OBS, RPU_0, 8, 1)
72b350735eSAlistair Francis     FIELD(IPI_OBS, APU, 0, 1)
73b350735eSAlistair Francis REG32(IPI_ISR, 0x10)
74b350735eSAlistair Francis     FIELD(IPI_ISR, PL_3, 27, 1)
75b350735eSAlistair Francis     FIELD(IPI_ISR, PL_2, 26, 1)
76b350735eSAlistair Francis     FIELD(IPI_ISR, PL_1, 25, 1)
77b350735eSAlistair Francis     FIELD(IPI_ISR, PL_0, 24, 1)
78b350735eSAlistair Francis     FIELD(IPI_ISR, PMU_3, 19, 1)
79b350735eSAlistair Francis     FIELD(IPI_ISR, PMU_2, 18, 1)
80b350735eSAlistair Francis     FIELD(IPI_ISR, PMU_1, 17, 1)
81b350735eSAlistair Francis     FIELD(IPI_ISR, PMU_0, 16, 1)
82b350735eSAlistair Francis     FIELD(IPI_ISR, RPU_1, 9, 1)
83b350735eSAlistair Francis     FIELD(IPI_ISR, RPU_0, 8, 1)
84b350735eSAlistair Francis     FIELD(IPI_ISR, APU, 0, 1)
85b350735eSAlistair Francis REG32(IPI_IMR, 0x14)
86b350735eSAlistair Francis     FIELD(IPI_IMR, PL_3, 27, 1)
87b350735eSAlistair Francis     FIELD(IPI_IMR, PL_2, 26, 1)
88b350735eSAlistair Francis     FIELD(IPI_IMR, PL_1, 25, 1)
89b350735eSAlistair Francis     FIELD(IPI_IMR, PL_0, 24, 1)
90b350735eSAlistair Francis     FIELD(IPI_IMR, PMU_3, 19, 1)
91b350735eSAlistair Francis     FIELD(IPI_IMR, PMU_2, 18, 1)
92b350735eSAlistair Francis     FIELD(IPI_IMR, PMU_1, 17, 1)
93b350735eSAlistair Francis     FIELD(IPI_IMR, PMU_0, 16, 1)
94b350735eSAlistair Francis     FIELD(IPI_IMR, RPU_1, 9, 1)
95b350735eSAlistair Francis     FIELD(IPI_IMR, RPU_0, 8, 1)
96b350735eSAlistair Francis     FIELD(IPI_IMR, APU, 0, 1)
97b350735eSAlistair Francis REG32(IPI_IER, 0x18)
98b350735eSAlistair Francis     FIELD(IPI_IER, PL_3, 27, 1)
99b350735eSAlistair Francis     FIELD(IPI_IER, PL_2, 26, 1)
100b350735eSAlistair Francis     FIELD(IPI_IER, PL_1, 25, 1)
101b350735eSAlistair Francis     FIELD(IPI_IER, PL_0, 24, 1)
102b350735eSAlistair Francis     FIELD(IPI_IER, PMU_3, 19, 1)
103b350735eSAlistair Francis     FIELD(IPI_IER, PMU_2, 18, 1)
104b350735eSAlistair Francis     FIELD(IPI_IER, PMU_1, 17, 1)
105b350735eSAlistair Francis     FIELD(IPI_IER, PMU_0, 16, 1)
106b350735eSAlistair Francis     FIELD(IPI_IER, RPU_1, 9, 1)
107b350735eSAlistair Francis     FIELD(IPI_IER, RPU_0, 8, 1)
108b350735eSAlistair Francis     FIELD(IPI_IER, APU, 0, 1)
109b350735eSAlistair Francis REG32(IPI_IDR, 0x1c)
110b350735eSAlistair Francis     FIELD(IPI_IDR, PL_3, 27, 1)
111b350735eSAlistair Francis     FIELD(IPI_IDR, PL_2, 26, 1)
112b350735eSAlistair Francis     FIELD(IPI_IDR, PL_1, 25, 1)
113b350735eSAlistair Francis     FIELD(IPI_IDR, PL_0, 24, 1)
114b350735eSAlistair Francis     FIELD(IPI_IDR, PMU_3, 19, 1)
115b350735eSAlistair Francis     FIELD(IPI_IDR, PMU_2, 18, 1)
116b350735eSAlistair Francis     FIELD(IPI_IDR, PMU_1, 17, 1)
117b350735eSAlistair Francis     FIELD(IPI_IDR, PMU_0, 16, 1)
118b350735eSAlistair Francis     FIELD(IPI_IDR, RPU_1, 9, 1)
119b350735eSAlistair Francis     FIELD(IPI_IDR, RPU_0, 8, 1)
120b350735eSAlistair Francis     FIELD(IPI_IDR, APU, 0, 1)
121b350735eSAlistair Francis 
122b350735eSAlistair Francis /* APU
123b350735eSAlistair Francis  * RPU_0
124b350735eSAlistair Francis  * RPU_1
125b350735eSAlistair Francis  * PMU_0
126b350735eSAlistair Francis  * PMU_1
127b350735eSAlistair Francis  * PMU_2
128b350735eSAlistair Francis  * PMU_3
129b350735eSAlistair Francis  * PL_0
130b350735eSAlistair Francis  * PL_1
131b350735eSAlistair Francis  * PL_2
132b350735eSAlistair Francis  * PL_3
133b350735eSAlistair Francis  */
134b350735eSAlistair Francis int index_array[NUM_IPIS] = {0, 8, 9, 16, 17, 18, 19, 24, 25, 26, 27};
135b350735eSAlistair Francis static const char *index_array_names[NUM_IPIS] = {"APU", "RPU_0", "RPU_1",
136b350735eSAlistair Francis                                                   "PMU_0", "PMU_1", "PMU_2",
137b350735eSAlistair Francis                                                   "PMU_3", "PL_0", "PL_1",
138b350735eSAlistair Francis                                                   "PL_2", "PL_3"};
139b350735eSAlistair Francis 
140b350735eSAlistair Francis static void xlnx_zynqmp_ipi_set_trig(XlnxZynqMPIPI *s, uint32_t val)
141b350735eSAlistair Francis {
142b350735eSAlistair Francis     int i, ipi_index, ipi_mask;
143b350735eSAlistair Francis 
144b350735eSAlistair Francis     for (i = 0; i < NUM_IPIS; i++) {
145b350735eSAlistair Francis         ipi_index = index_array[i];
146b350735eSAlistair Francis         ipi_mask = (1 << ipi_index);
147b350735eSAlistair Francis         DB_PRINT("Setting %s=%d\n", index_array_names[i],
148b350735eSAlistair Francis                  !!(val & ipi_mask));
149b350735eSAlistair Francis         qemu_set_irq(s->irq_trig_out[i], !!(val & ipi_mask));
150b350735eSAlistair Francis     }
151b350735eSAlistair Francis }
152b350735eSAlistair Francis 
153b350735eSAlistair Francis static void xlnx_zynqmp_ipi_set_obs(XlnxZynqMPIPI *s, uint32_t val)
154b350735eSAlistair Francis {
155b350735eSAlistair Francis     int i, ipi_index, ipi_mask;
156b350735eSAlistair Francis 
157b350735eSAlistair Francis     for (i = 0; i < NUM_IPIS; i++) {
158b350735eSAlistair Francis         ipi_index = index_array[i];
159b350735eSAlistair Francis         ipi_mask = (1 << ipi_index);
160b350735eSAlistair Francis         DB_PRINT("Setting %s=%d\n", index_array_names[i],
161b350735eSAlistair Francis                  !!(val & ipi_mask));
162b350735eSAlistair Francis         qemu_set_irq(s->irq_obs_out[i], !!(val & ipi_mask));
163b350735eSAlistair Francis     }
164b350735eSAlistair Francis }
165b350735eSAlistair Francis 
166b350735eSAlistair Francis static void xlnx_zynqmp_ipi_update_irq(XlnxZynqMPIPI *s)
167b350735eSAlistair Francis {
168b350735eSAlistair Francis     bool pending = s->regs[R_IPI_ISR] & ~s->regs[R_IPI_IMR];
169b350735eSAlistair Francis 
170b350735eSAlistair Francis     DB_PRINT("irq=%d isr=%x mask=%x\n",
171b350735eSAlistair Francis              pending, s->regs[R_IPI_ISR], s->regs[R_IPI_IMR]);
172b350735eSAlistair Francis     qemu_set_irq(s->irq, pending);
173b350735eSAlistair Francis }
174b350735eSAlistair Francis 
175b350735eSAlistair Francis static uint64_t xlnx_zynqmp_ipi_trig_prew(RegisterInfo *reg, uint64_t val64)
176b350735eSAlistair Francis {
177b350735eSAlistair Francis     XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(reg->opaque);
178b350735eSAlistair Francis 
179b350735eSAlistair Francis     xlnx_zynqmp_ipi_set_trig(s, val64);
180b350735eSAlistair Francis 
181b350735eSAlistair Francis     return val64;
182b350735eSAlistair Francis }
183b350735eSAlistair Francis 
184b350735eSAlistair Francis static void xlnx_zynqmp_ipi_trig_postw(RegisterInfo *reg, uint64_t val64)
185b350735eSAlistair Francis {
186b350735eSAlistair Francis     XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(reg->opaque);
187b350735eSAlistair Francis 
188b350735eSAlistair Francis     /* TRIG generates a pulse on the outbound signals. We use the
189b350735eSAlistair Francis      * post-write callback to bring the signal back-down.
190b350735eSAlistair Francis      */
191b350735eSAlistair Francis     s->regs[R_IPI_TRIG] = 0;
192b350735eSAlistair Francis 
193b350735eSAlistair Francis     xlnx_zynqmp_ipi_set_trig(s, 0);
194b350735eSAlistair Francis }
195b350735eSAlistair Francis 
196b350735eSAlistair Francis static uint64_t xlnx_zynqmp_ipi_isr_prew(RegisterInfo *reg, uint64_t val64)
197b350735eSAlistair Francis {
198b350735eSAlistair Francis     XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(reg->opaque);
199b350735eSAlistair Francis 
200b350735eSAlistair Francis     xlnx_zynqmp_ipi_set_obs(s, val64);
201b350735eSAlistair Francis 
202b350735eSAlistair Francis     return val64;
203b350735eSAlistair Francis }
204b350735eSAlistair Francis 
205b350735eSAlistair Francis static void xlnx_zynqmp_ipi_isr_postw(RegisterInfo *reg, uint64_t val64)
206b350735eSAlistair Francis {
207b350735eSAlistair Francis     XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(reg->opaque);
208b350735eSAlistair Francis 
209b350735eSAlistair Francis     xlnx_zynqmp_ipi_update_irq(s);
210b350735eSAlistair Francis }
211b350735eSAlistair Francis 
212b350735eSAlistair Francis static uint64_t xlnx_zynqmp_ipi_ier_prew(RegisterInfo *reg, uint64_t val64)
213b350735eSAlistair Francis {
214b350735eSAlistair Francis     XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(reg->opaque);
215b350735eSAlistair Francis     uint32_t val = val64;
216b350735eSAlistair Francis 
217b350735eSAlistair Francis     s->regs[R_IPI_IMR] &= ~val;
218b350735eSAlistair Francis     xlnx_zynqmp_ipi_update_irq(s);
219b350735eSAlistair Francis     return 0;
220b350735eSAlistair Francis }
221b350735eSAlistair Francis 
222b350735eSAlistair Francis static uint64_t xlnx_zynqmp_ipi_idr_prew(RegisterInfo *reg, uint64_t val64)
223b350735eSAlistair Francis {
224b350735eSAlistair Francis     XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(reg->opaque);
225b350735eSAlistair Francis     uint32_t val = val64;
226b350735eSAlistair Francis 
227b350735eSAlistair Francis     s->regs[R_IPI_IMR] |= val;
228b350735eSAlistair Francis     xlnx_zynqmp_ipi_update_irq(s);
229b350735eSAlistair Francis     return 0;
230b350735eSAlistair Francis }
231b350735eSAlistair Francis 
232b350735eSAlistair Francis static const RegisterAccessInfo xlnx_zynqmp_ipi_regs_info[] = {
233b350735eSAlistair Francis     {   .name = "IPI_TRIG",  .addr = A_IPI_TRIG,
234b350735eSAlistair Francis         .rsvd = 0xf0f0fcfe,
235b350735eSAlistair Francis         .ro = 0xf0f0fcfe,
236b350735eSAlistair Francis         .pre_write = xlnx_zynqmp_ipi_trig_prew,
237b350735eSAlistair Francis         .post_write = xlnx_zynqmp_ipi_trig_postw,
238b350735eSAlistair Francis     },{ .name = "IPI_OBS",  .addr = A_IPI_OBS,
239b350735eSAlistair Francis         .rsvd = 0xf0f0fcfe,
240b350735eSAlistair Francis         .ro = 0xffffffff,
241b350735eSAlistair Francis     },{ .name = "IPI_ISR",  .addr = A_IPI_ISR,
242b350735eSAlistair Francis         .rsvd = 0xf0f0fcfe,
243b350735eSAlistair Francis         .ro = 0xf0f0fcfe,
244b350735eSAlistair Francis         .w1c = 0xf0f0301,
245b350735eSAlistair Francis         .pre_write = xlnx_zynqmp_ipi_isr_prew,
246b350735eSAlistair Francis         .post_write = xlnx_zynqmp_ipi_isr_postw,
247b350735eSAlistair Francis     },{ .name = "IPI_IMR",  .addr = A_IPI_IMR,
248b350735eSAlistair Francis         .reset = 0xf0f0301,
249b350735eSAlistair Francis         .rsvd = 0xf0f0fcfe,
250b350735eSAlistair Francis         .ro = 0xffffffff,
251b350735eSAlistair Francis     },{ .name = "IPI_IER",  .addr = A_IPI_IER,
252b350735eSAlistair Francis         .rsvd = 0xf0f0fcfe,
253b350735eSAlistair Francis         .ro = 0xf0f0fcfe,
254b350735eSAlistair Francis         .pre_write = xlnx_zynqmp_ipi_ier_prew,
255b350735eSAlistair Francis     },{ .name = "IPI_IDR",  .addr = A_IPI_IDR,
256b350735eSAlistair Francis         .rsvd = 0xf0f0fcfe,
257b350735eSAlistair Francis         .ro = 0xf0f0fcfe,
258b350735eSAlistair Francis         .pre_write = xlnx_zynqmp_ipi_idr_prew,
259b350735eSAlistair Francis     }
260b350735eSAlistair Francis };
261b350735eSAlistair Francis 
262b350735eSAlistair Francis static void xlnx_zynqmp_ipi_reset(DeviceState *dev)
263b350735eSAlistair Francis {
264b350735eSAlistair Francis     XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(dev);
265b350735eSAlistair Francis     int i;
266b350735eSAlistair Francis 
267b350735eSAlistair Francis     for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
268b350735eSAlistair Francis         register_reset(&s->regs_info[i]);
269b350735eSAlistair Francis     }
270b350735eSAlistair Francis 
271b350735eSAlistair Francis     xlnx_zynqmp_ipi_update_irq(s);
272b350735eSAlistair Francis }
273b350735eSAlistair Francis 
274b350735eSAlistair Francis static void xlnx_zynqmp_ipi_handler(void *opaque, int n, int level)
275b350735eSAlistair Francis {
276b350735eSAlistair Francis     XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(opaque);
277b350735eSAlistair Francis     uint32_t val = (!!level) << n;
278b350735eSAlistair Francis 
279b350735eSAlistair Francis     DB_PRINT("IPI input irq[%d]=%d\n", n, level);
280b350735eSAlistair Francis 
281b350735eSAlistair Francis     s->regs[R_IPI_ISR] |= val;
282b350735eSAlistair Francis     xlnx_zynqmp_ipi_set_obs(s, s->regs[R_IPI_ISR]);
283b350735eSAlistair Francis     xlnx_zynqmp_ipi_update_irq(s);
284b350735eSAlistair Francis }
285b350735eSAlistair Francis 
286b350735eSAlistair Francis static void xlnx_zynqmp_obs_handler(void *opaque, int n, int level)
287b350735eSAlistair Francis {
288b350735eSAlistair Francis     XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(opaque);
289b350735eSAlistair Francis 
290b350735eSAlistair Francis     DB_PRINT("OBS input irq[%d]=%d\n", n, level);
291b350735eSAlistair Francis 
292b350735eSAlistair Francis     s->regs[R_IPI_OBS] &= ~(1ULL << n);
293b350735eSAlistair Francis     s->regs[R_IPI_OBS] |= (level << n);
294b350735eSAlistair Francis }
295b350735eSAlistair Francis 
296b350735eSAlistair Francis static const MemoryRegionOps xlnx_zynqmp_ipi_ops = {
297b350735eSAlistair Francis     .read = register_read_memory,
298b350735eSAlistair Francis     .write = register_write_memory,
299b350735eSAlistair Francis     .endianness = DEVICE_LITTLE_ENDIAN,
300b350735eSAlistair Francis     .valid = {
301b350735eSAlistair Francis         .min_access_size = 4,
302b350735eSAlistair Francis         .max_access_size = 4,
303b350735eSAlistair Francis     },
304b350735eSAlistair Francis };
305b350735eSAlistair Francis 
306b350735eSAlistair Francis static void xlnx_zynqmp_ipi_realize(DeviceState *dev, Error **errp)
307b350735eSAlistair Francis {
308b350735eSAlistair Francis     qdev_init_gpio_in_named(dev, xlnx_zynqmp_ipi_handler, "IPI_INPUTS", 32);
309b350735eSAlistair Francis     qdev_init_gpio_in_named(dev, xlnx_zynqmp_obs_handler, "OBS_INPUTS", 32);
310b350735eSAlistair Francis }
311b350735eSAlistair Francis 
312b350735eSAlistair Francis static void xlnx_zynqmp_ipi_init(Object *obj)
313b350735eSAlistair Francis {
314b350735eSAlistair Francis     XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(obj);
315b350735eSAlistair Francis     DeviceState *dev = DEVICE(obj);
316b350735eSAlistair Francis     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
317b350735eSAlistair Francis     RegisterInfoArray *reg_array;
318b350735eSAlistair Francis     char *irq_name;
319b350735eSAlistair Francis     int i;
320b350735eSAlistair Francis 
321b350735eSAlistair Francis     memory_region_init(&s->iomem, obj, TYPE_XLNX_ZYNQMP_IPI,
322b350735eSAlistair Francis                        R_XLNX_ZYNQMP_IPI_MAX * 4);
323b350735eSAlistair Francis     reg_array =
324b350735eSAlistair Francis         register_init_block32(DEVICE(obj), xlnx_zynqmp_ipi_regs_info,
325b350735eSAlistair Francis                               ARRAY_SIZE(xlnx_zynqmp_ipi_regs_info),
326b350735eSAlistair Francis                               s->regs_info, s->regs,
327b350735eSAlistair Francis                               &xlnx_zynqmp_ipi_ops,
328b350735eSAlistair Francis                               XLNX_ZYNQMP_IPI_ERR_DEBUG,
329b350735eSAlistair Francis                               R_XLNX_ZYNQMP_IPI_MAX * 4);
330b350735eSAlistair Francis     memory_region_add_subregion(&s->iomem,
331b350735eSAlistair Francis                                 0x0,
332b350735eSAlistair Francis                                 &reg_array->mem);
333b350735eSAlistair Francis     sysbus_init_mmio(sbd, &s->iomem);
334b350735eSAlistair Francis     sysbus_init_irq(sbd, &s->irq);
335b350735eSAlistair Francis 
336b350735eSAlistair Francis     for (i = 0; i < NUM_IPIS; i++) {
337b350735eSAlistair Francis         qdev_init_gpio_out_named(dev, &s->irq_trig_out[i],
338b350735eSAlistair Francis                                  index_array_names[i], 1);
339b350735eSAlistair Francis 
340b350735eSAlistair Francis         irq_name = g_strdup_printf("OBS_%s", index_array_names[i]);
341b350735eSAlistair Francis         qdev_init_gpio_out_named(dev, &s->irq_obs_out[i],
342b350735eSAlistair Francis                                  irq_name, 1);
343b350735eSAlistair Francis         g_free(irq_name);
344b350735eSAlistair Francis     }
345b350735eSAlistair Francis }
346b350735eSAlistair Francis 
347b350735eSAlistair Francis static const VMStateDescription vmstate_zynqmp_pmu_ipi = {
348b350735eSAlistair Francis     .name = TYPE_XLNX_ZYNQMP_IPI,
349b350735eSAlistair Francis     .version_id = 1,
350b350735eSAlistair Francis     .minimum_version_id = 1,
351b350735eSAlistair Francis     .fields = (VMStateField[]) {
352b350735eSAlistair Francis         VMSTATE_UINT32_ARRAY(regs, XlnxZynqMPIPI, R_XLNX_ZYNQMP_IPI_MAX),
353b350735eSAlistair Francis         VMSTATE_END_OF_LIST(),
354b350735eSAlistair Francis     }
355b350735eSAlistair Francis };
356b350735eSAlistair Francis 
357b350735eSAlistair Francis static void xlnx_zynqmp_ipi_class_init(ObjectClass *klass, void *data)
358b350735eSAlistair Francis {
359b350735eSAlistair Francis     DeviceClass *dc = DEVICE_CLASS(klass);
360b350735eSAlistair Francis 
361b350735eSAlistair Francis     dc->reset = xlnx_zynqmp_ipi_reset;
362b350735eSAlistair Francis     dc->realize = xlnx_zynqmp_ipi_realize;
363b350735eSAlistair Francis     dc->vmsd = &vmstate_zynqmp_pmu_ipi;
364b350735eSAlistair Francis }
365b350735eSAlistair Francis 
366b350735eSAlistair Francis static const TypeInfo xlnx_zynqmp_ipi_info = {
367b350735eSAlistair Francis     .name          = TYPE_XLNX_ZYNQMP_IPI,
368b350735eSAlistair Francis     .parent        = TYPE_SYS_BUS_DEVICE,
369b350735eSAlistair Francis     .instance_size = sizeof(XlnxZynqMPIPI),
370b350735eSAlistair Francis     .class_init    = xlnx_zynqmp_ipi_class_init,
371b350735eSAlistair Francis     .instance_init = xlnx_zynqmp_ipi_init,
372b350735eSAlistair Francis };
373b350735eSAlistair Francis 
374b350735eSAlistair Francis static void xlnx_zynqmp_ipi_register_types(void)
375b350735eSAlistair Francis {
376b350735eSAlistair Francis     type_register_static(&xlnx_zynqmp_ipi_info);
377b350735eSAlistair Francis }
378b350735eSAlistair Francis 
379b350735eSAlistair Francis type_init(xlnx_zynqmp_ipi_register_types)
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