xref: /qemu/hw/intc/openpic_kvm.c (revision 166206845f7fd75e720e6feea0bb01957c8da07f)
1d85937e6SScott Wood /*
2d85937e6SScott Wood  * KVM in-kernel OpenPIC
3d85937e6SScott Wood  *
4d85937e6SScott Wood  * Copyright 2013 Freescale Semiconductor, Inc.
5d85937e6SScott Wood  *
6d85937e6SScott Wood  * Permission is hereby granted, free of charge, to any person obtaining a copy
7d85937e6SScott Wood  * of this software and associated documentation files (the "Software"), to deal
8d85937e6SScott Wood  * in the Software without restriction, including without limitation the rights
9d85937e6SScott Wood  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10d85937e6SScott Wood  * copies of the Software, and to permit persons to whom the Software is
11d85937e6SScott Wood  * furnished to do so, subject to the following conditions:
12d85937e6SScott Wood  *
13d85937e6SScott Wood  * The above copyright notice and this permission notice shall be included in
14d85937e6SScott Wood  * all copies or substantial portions of the Software.
15d85937e6SScott Wood  *
16d85937e6SScott Wood  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17d85937e6SScott Wood  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18d85937e6SScott Wood  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19d85937e6SScott Wood  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20d85937e6SScott Wood  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21d85937e6SScott Wood  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22d85937e6SScott Wood  * THE SOFTWARE.
23d85937e6SScott Wood  */
24d85937e6SScott Wood 
2590191d07SPeter Maydell #include "qemu/osdep.h"
26da34e65cSMarkus Armbruster #include "qapi/error.h"
2733c11879SPaolo Bonzini #include "qemu-common.h"
2833c11879SPaolo Bonzini #include "cpu.h"
29d85937e6SScott Wood #include <sys/ioctl.h>
30d85937e6SScott Wood #include "exec/address-spaces.h"
31d85937e6SScott Wood #include "hw/hw.h"
32d85937e6SScott Wood #include "hw/ppc/openpic.h"
33d85937e6SScott Wood #include "hw/pci/msi.h"
34d85937e6SScott Wood #include "hw/sysbus.h"
35d85937e6SScott Wood #include "sysemu/kvm.h"
36d85937e6SScott Wood #include "qemu/log.h"
37d85937e6SScott Wood 
38af354f19SAlexander Graf #define GCR_RESET        0x80000000
39af354f19SAlexander Graf 
40dd49c038SAndreas Färber #define KVM_OPENPIC(obj) \
41dd49c038SAndreas Färber     OBJECT_CHECK(KVMOpenPICState, (obj), TYPE_KVM_OPENPIC)
42dd49c038SAndreas Färber 
43d85937e6SScott Wood typedef struct KVMOpenPICState {
44dd49c038SAndreas Färber     /*< private >*/
45dd49c038SAndreas Färber     SysBusDevice parent_obj;
46dd49c038SAndreas Färber     /*< public >*/
47dd49c038SAndreas Färber 
48d85937e6SScott Wood     MemoryRegion mem;
49d85937e6SScott Wood     MemoryListener mem_listener;
50d85937e6SScott Wood     uint32_t fd;
51d85937e6SScott Wood     uint32_t model;
529ac58dc5SAlexander Graf     hwaddr mapped;
53d85937e6SScott Wood } KVMOpenPICState;
54d85937e6SScott Wood 
55d85937e6SScott Wood static void kvm_openpic_set_irq(void *opaque, int n_IRQ, int level)
56d85937e6SScott Wood {
57d85937e6SScott Wood     kvm_set_irq(kvm_state, n_IRQ, level);
58d85937e6SScott Wood }
59d85937e6SScott Wood 
60d85937e6SScott Wood static void kvm_openpic_write(void *opaque, hwaddr addr, uint64_t val,
61d85937e6SScott Wood                               unsigned size)
62d85937e6SScott Wood {
63d85937e6SScott Wood     KVMOpenPICState *opp = opaque;
64d85937e6SScott Wood     struct kvm_device_attr attr;
65d85937e6SScott Wood     uint32_t val32 = val;
66d85937e6SScott Wood     int ret;
67d85937e6SScott Wood 
68d85937e6SScott Wood     attr.group = KVM_DEV_MPIC_GRP_REGISTER;
69d85937e6SScott Wood     attr.attr = addr;
70d85937e6SScott Wood     attr.addr = (uint64_t)(unsigned long)&val32;
71d85937e6SScott Wood 
72d85937e6SScott Wood     ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr);
73d85937e6SScott Wood     if (ret < 0) {
74d85937e6SScott Wood         qemu_log_mask(LOG_UNIMP, "%s: %s %" PRIx64 "\n", __func__,
75d85937e6SScott Wood                       strerror(errno), attr.attr);
76d85937e6SScott Wood     }
77d85937e6SScott Wood }
78d85937e6SScott Wood 
79af354f19SAlexander Graf static void kvm_openpic_reset(DeviceState *d)
80af354f19SAlexander Graf {
81af354f19SAlexander Graf     KVMOpenPICState *opp = KVM_OPENPIC(d);
82af354f19SAlexander Graf 
83af354f19SAlexander Graf     /* Trigger the GCR.RESET bit to reset the PIC */
84af354f19SAlexander Graf     kvm_openpic_write(opp, 0x1020, GCR_RESET, sizeof(uint32_t));
85af354f19SAlexander Graf }
86af354f19SAlexander Graf 
87d85937e6SScott Wood static uint64_t kvm_openpic_read(void *opaque, hwaddr addr, unsigned size)
88d85937e6SScott Wood {
89d85937e6SScott Wood     KVMOpenPICState *opp = opaque;
90d85937e6SScott Wood     struct kvm_device_attr attr;
91d85937e6SScott Wood     uint32_t val = 0xdeadbeef;
92d85937e6SScott Wood     int ret;
93d85937e6SScott Wood 
94d85937e6SScott Wood     attr.group = KVM_DEV_MPIC_GRP_REGISTER;
95d85937e6SScott Wood     attr.attr = addr;
96d85937e6SScott Wood     attr.addr = (uint64_t)(unsigned long)&val;
97d85937e6SScott Wood 
98d85937e6SScott Wood     ret = ioctl(opp->fd, KVM_GET_DEVICE_ATTR, &attr);
99d85937e6SScott Wood     if (ret < 0) {
100d85937e6SScott Wood         qemu_log_mask(LOG_UNIMP, "%s: %s %" PRIx64 "\n", __func__,
101d85937e6SScott Wood                       strerror(errno), attr.attr);
102d85937e6SScott Wood         return 0;
103d85937e6SScott Wood     }
104d85937e6SScott Wood 
105d85937e6SScott Wood     return val;
106d85937e6SScott Wood }
107d85937e6SScott Wood 
108d85937e6SScott Wood static const MemoryRegionOps kvm_openpic_mem_ops = {
109d85937e6SScott Wood     .write = kvm_openpic_write,
110d85937e6SScott Wood     .read  = kvm_openpic_read,
111d85937e6SScott Wood     .endianness = DEVICE_BIG_ENDIAN,
112d85937e6SScott Wood     .impl = {
113d85937e6SScott Wood         .min_access_size = 4,
114d85937e6SScott Wood         .max_access_size = 4,
115d85937e6SScott Wood     },
116d85937e6SScott Wood };
117d85937e6SScott Wood 
118d85937e6SScott Wood static void kvm_openpic_region_add(MemoryListener *listener,
119d85937e6SScott Wood                                    MemoryRegionSection *section)
120d85937e6SScott Wood {
121d85937e6SScott Wood     KVMOpenPICState *opp = container_of(listener, KVMOpenPICState,
122d85937e6SScott Wood                                         mem_listener);
123d85937e6SScott Wood     struct kvm_device_attr attr;
124d85937e6SScott Wood     uint64_t reg_base;
125d85937e6SScott Wood     int ret;
126d85937e6SScott Wood 
127*16620684SAlexey Kardashevskiy     if (section->fv != address_space_to_flatview(&address_space_memory)) {
128d85937e6SScott Wood         abort();
129d85937e6SScott Wood     }
130d85937e6SScott Wood 
13187d8354dSAlexander Graf     /* Ignore events on regions that are not us */
13287d8354dSAlexander Graf     if (section->mr != &opp->mem) {
13387d8354dSAlexander Graf         return;
13487d8354dSAlexander Graf     }
13587d8354dSAlexander Graf 
1369ac58dc5SAlexander Graf     if (opp->mapped) {
1379ac58dc5SAlexander Graf         /*
1389ac58dc5SAlexander Graf          * We can only map the MPIC once. Since we are already mapped,
1399ac58dc5SAlexander Graf          * the best we can do is ignore new maps.
1409ac58dc5SAlexander Graf          */
1419ac58dc5SAlexander Graf         return;
1429ac58dc5SAlexander Graf     }
1439ac58dc5SAlexander Graf 
144d85937e6SScott Wood     reg_base = section->offset_within_address_space;
1459ac58dc5SAlexander Graf     opp->mapped = reg_base;
146d85937e6SScott Wood 
147d85937e6SScott Wood     attr.group = KVM_DEV_MPIC_GRP_MISC;
148d85937e6SScott Wood     attr.attr = KVM_DEV_MPIC_BASE_ADDR;
149d85937e6SScott Wood     attr.addr = (uint64_t)(unsigned long)&reg_base;
150d85937e6SScott Wood 
151d85937e6SScott Wood     ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr);
152d85937e6SScott Wood     if (ret < 0) {
153d85937e6SScott Wood         fprintf(stderr, "%s: %s %" PRIx64 "\n", __func__,
154d85937e6SScott Wood                 strerror(errno), reg_base);
155d85937e6SScott Wood     }
156d85937e6SScott Wood }
157d85937e6SScott Wood 
158d85937e6SScott Wood static void kvm_openpic_region_del(MemoryListener *listener,
159d85937e6SScott Wood                                    MemoryRegionSection *section)
160d85937e6SScott Wood {
161d85937e6SScott Wood     KVMOpenPICState *opp = container_of(listener, KVMOpenPICState,
162d85937e6SScott Wood                                         mem_listener);
163d85937e6SScott Wood     struct kvm_device_attr attr;
164d85937e6SScott Wood     uint64_t reg_base = 0;
165d85937e6SScott Wood     int ret;
166d85937e6SScott Wood 
16787d8354dSAlexander Graf     /* Ignore events on regions that are not us */
16887d8354dSAlexander Graf     if (section->mr != &opp->mem) {
16987d8354dSAlexander Graf         return;
17087d8354dSAlexander Graf     }
17187d8354dSAlexander Graf 
1729ac58dc5SAlexander Graf     if (section->offset_within_address_space != opp->mapped) {
1739ac58dc5SAlexander Graf         /*
1749ac58dc5SAlexander Graf          * We can only map the MPIC once. This mapping was a secondary
1759ac58dc5SAlexander Graf          * one that we couldn't fulfill. Ignore it.
1769ac58dc5SAlexander Graf          */
1779ac58dc5SAlexander Graf         return;
1789ac58dc5SAlexander Graf     }
1799ac58dc5SAlexander Graf     opp->mapped = 0;
1809ac58dc5SAlexander Graf 
181d85937e6SScott Wood     attr.group = KVM_DEV_MPIC_GRP_MISC;
182d85937e6SScott Wood     attr.attr = KVM_DEV_MPIC_BASE_ADDR;
183d85937e6SScott Wood     attr.addr = (uint64_t)(unsigned long)&reg_base;
184d85937e6SScott Wood 
185d85937e6SScott Wood     ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr);
186d85937e6SScott Wood     if (ret < 0) {
187d85937e6SScott Wood         fprintf(stderr, "%s: %s %" PRIx64 "\n", __func__,
188d85937e6SScott Wood                 strerror(errno), reg_base);
189d85937e6SScott Wood     }
190d85937e6SScott Wood }
191d85937e6SScott Wood 
192dd49c038SAndreas Färber static void kvm_openpic_init(Object *obj)
193d85937e6SScott Wood {
194dd49c038SAndreas Färber     KVMOpenPICState *opp = KVM_OPENPIC(obj);
195dd49c038SAndreas Färber 
1961437c94bSPaolo Bonzini     memory_region_init_io(&opp->mem, OBJECT(opp), &kvm_openpic_mem_ops, opp,
197dd49c038SAndreas Färber                           "kvm-openpic", 0x40000);
198dd49c038SAndreas Färber }
199dd49c038SAndreas Färber 
200dd49c038SAndreas Färber static void kvm_openpic_realize(DeviceState *dev, Error **errp)
201dd49c038SAndreas Färber {
202dd49c038SAndreas Färber     SysBusDevice *d = SYS_BUS_DEVICE(dev);
203dd49c038SAndreas Färber     KVMOpenPICState *opp = KVM_OPENPIC(dev);
204d85937e6SScott Wood     KVMState *s = kvm_state;
205d85937e6SScott Wood     int kvm_openpic_model;
206d85937e6SScott Wood     struct kvm_create_device cd = {0};
207d85937e6SScott Wood     int ret, i;
208d85937e6SScott Wood 
209d85937e6SScott Wood     if (!kvm_check_extension(s, KVM_CAP_DEVICE_CTRL)) {
210dd49c038SAndreas Färber         error_setg(errp, "Kernel is lacking Device Control API");
211dd49c038SAndreas Färber         return;
212d85937e6SScott Wood     }
213d85937e6SScott Wood 
214d85937e6SScott Wood     switch (opp->model) {
215d85937e6SScott Wood     case OPENPIC_MODEL_FSL_MPIC_20:
216d85937e6SScott Wood         kvm_openpic_model = KVM_DEV_TYPE_FSL_MPIC_20;
217d85937e6SScott Wood         break;
218d85937e6SScott Wood 
219d85937e6SScott Wood     case OPENPIC_MODEL_FSL_MPIC_42:
220d85937e6SScott Wood         kvm_openpic_model = KVM_DEV_TYPE_FSL_MPIC_42;
221d85937e6SScott Wood         break;
222d85937e6SScott Wood 
223d85937e6SScott Wood     default:
224dd49c038SAndreas Färber         error_setg(errp, "Unsupported OpenPIC model %" PRIu32, opp->model);
225dd49c038SAndreas Färber         return;
226d85937e6SScott Wood     }
227d85937e6SScott Wood 
228d85937e6SScott Wood     cd.type = kvm_openpic_model;
229d85937e6SScott Wood     ret = kvm_vm_ioctl(s, KVM_CREATE_DEVICE, &cd);
230d85937e6SScott Wood     if (ret < 0) {
231dd49c038SAndreas Färber         error_setg(errp, "Can't create device %d: %s",
232dd49c038SAndreas Färber                    cd.type, strerror(errno));
233dd49c038SAndreas Färber         return;
234d85937e6SScott Wood     }
235d85937e6SScott Wood     opp->fd = cd.fd;
236d85937e6SScott Wood 
237dd49c038SAndreas Färber     sysbus_init_mmio(d, &opp->mem);
238dd49c038SAndreas Färber     qdev_init_gpio_in(dev, kvm_openpic_set_irq, OPENPIC_MAX_IRQ);
239d85937e6SScott Wood 
240d85937e6SScott Wood     opp->mem_listener.region_add = kvm_openpic_region_add;
2416f1834a2SPrasad Joshi     opp->mem_listener.region_del = kvm_openpic_region_del;
242d85937e6SScott Wood     memory_listener_register(&opp->mem_listener, &address_space_memory);
243d85937e6SScott Wood 
244d85937e6SScott Wood     /* indicate pic capabilities */
245226419d6SMichael S. Tsirkin     msi_nonbroken = true;
246d85937e6SScott Wood     kvm_kernel_irqchip = true;
247d85937e6SScott Wood     kvm_async_interrupts_allowed = true;
248d85937e6SScott Wood 
249d85937e6SScott Wood     /* set up irq routing */
250d85937e6SScott Wood     kvm_init_irq_routing(kvm_state);
251d85937e6SScott Wood     for (i = 0; i < 256; ++i) {
252d85937e6SScott Wood         kvm_irqchip_add_irq_route(kvm_state, i, 0, i);
253d85937e6SScott Wood     }
254d85937e6SScott Wood 
255d85937e6SScott Wood     kvm_msi_via_irqfd_allowed = true;
256d85937e6SScott Wood     kvm_gsi_routing_allowed = true;
257d85937e6SScott Wood 
258d85937e6SScott Wood     kvm_irqchip_commit_routes(s);
259d85937e6SScott Wood }
260d85937e6SScott Wood 
261d85937e6SScott Wood int kvm_openpic_connect_vcpu(DeviceState *d, CPUState *cs)
262d85937e6SScott Wood {
263dd49c038SAndreas Färber     KVMOpenPICState *opp = KVM_OPENPIC(d);
264d85937e6SScott Wood 
26548add816SCornelia Huck     return kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_MPIC, 0, opp->fd,
26648add816SCornelia Huck                                kvm_arch_vcpu_id(cs));
267d85937e6SScott Wood }
268d85937e6SScott Wood 
269d85937e6SScott Wood static Property kvm_openpic_properties[] = {
270d85937e6SScott Wood     DEFINE_PROP_UINT32("model", KVMOpenPICState, model,
271d85937e6SScott Wood                        OPENPIC_MODEL_FSL_MPIC_20),
272d85937e6SScott Wood     DEFINE_PROP_END_OF_LIST(),
273d85937e6SScott Wood };
274d85937e6SScott Wood 
275dd49c038SAndreas Färber static void kvm_openpic_class_init(ObjectClass *oc, void *data)
276d85937e6SScott Wood {
277dd49c038SAndreas Färber     DeviceClass *dc = DEVICE_CLASS(oc);
278d85937e6SScott Wood 
279dd49c038SAndreas Färber     dc->realize = kvm_openpic_realize;
280d85937e6SScott Wood     dc->props = kvm_openpic_properties;
281d85937e6SScott Wood     dc->reset = kvm_openpic_reset;
28229f8dd66SLaurent Vivier     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
283d85937e6SScott Wood }
284d85937e6SScott Wood 
285d85937e6SScott Wood static const TypeInfo kvm_openpic_info = {
286dd49c038SAndreas Färber     .name          = TYPE_KVM_OPENPIC,
287d85937e6SScott Wood     .parent        = TYPE_SYS_BUS_DEVICE,
288d85937e6SScott Wood     .instance_size = sizeof(KVMOpenPICState),
289dd49c038SAndreas Färber     .instance_init = kvm_openpic_init,
290d85937e6SScott Wood     .class_init    = kvm_openpic_class_init,
291d85937e6SScott Wood };
292d85937e6SScott Wood 
293d85937e6SScott Wood static void kvm_openpic_register_types(void)
294d85937e6SScott Wood {
295d85937e6SScott Wood     type_register_static(&kvm_openpic_info);
296d85937e6SScott Wood }
297d85937e6SScott Wood 
298d85937e6SScott Wood type_init(kvm_openpic_register_types)
299