1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * QEMU Loongson 7A1000 I/O interrupt controller. 4 * Copyright (C) 2024 Loongson Technology Corporation Limited 5 */ 6 7 #include "qemu/osdep.h" 8 #include "qapi/error.h" 9 #include "hw/intc/loongarch_pic_common.h" 10 #include "hw/qdev-properties.h" 11 #include "migration/vmstate.h" 12 13 static int loongarch_pic_pre_save(void *opaque) 14 { 15 LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque; 16 LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s); 17 18 if (lpcc->pre_save) { 19 return lpcc->pre_save(s); 20 } 21 22 return 0; 23 } 24 25 static int loongarch_pic_post_load(void *opaque, int version_id) 26 { 27 LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque; 28 LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s); 29 30 if (lpcc->post_load) { 31 return lpcc->post_load(s, version_id); 32 } 33 34 return 0; 35 } 36 37 static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) 38 { 39 LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev); 40 41 if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { 42 error_setg(errp, "Invalid 'pic_irq_num'"); 43 return; 44 } 45 } 46 47 static const Property loongarch_pic_common_properties[] = { 48 DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), 49 }; 50 51 static const VMStateDescription vmstate_loongarch_pic_common = { 52 .name = "loongarch_pch_pic", 53 .version_id = 1, 54 .minimum_version_id = 1, 55 .pre_save = loongarch_pic_pre_save, 56 .post_load = loongarch_pic_post_load, 57 .fields = (const VMStateField[]) { 58 VMSTATE_UINT64(int_mask, LoongArchPICCommonState), 59 VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), 60 VMSTATE_UINT64(intedge, LoongArchPICCommonState), 61 VMSTATE_UINT64(intclr, LoongArchPICCommonState), 62 VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState), 63 VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState), 64 VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64), 65 VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64), 66 VMSTATE_UINT64(last_intirr, LoongArchPICCommonState), 67 VMSTATE_UINT64(intirr, LoongArchPICCommonState), 68 VMSTATE_UINT64(intisr, LoongArchPICCommonState), 69 VMSTATE_UINT64(int_polarity, LoongArchPICCommonState), 70 VMSTATE_END_OF_LIST() 71 } 72 }; 73 74 static void loongarch_pic_common_class_init(ObjectClass *klass, void *data) 75 { 76 DeviceClass *dc = DEVICE_CLASS(klass); 77 LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_CLASS(klass); 78 79 device_class_set_parent_realize(dc, loongarch_pic_common_realize, 80 &lpcc->parent_realize); 81 device_class_set_props(dc, loongarch_pic_common_properties); 82 dc->vmsd = &vmstate_loongarch_pic_common; 83 } 84 85 static const TypeInfo loongarch_pic_common_types[] = { 86 { 87 .name = TYPE_LOONGARCH_PIC_COMMON, 88 .parent = TYPE_SYS_BUS_DEVICE, 89 .instance_size = sizeof(LoongArchPICCommonState), 90 .class_size = sizeof(LoongArchPICCommonClass), 91 .class_init = loongarch_pic_common_class_init, 92 .abstract = true, 93 } 94 }; 95 96 DEFINE_TYPES(loongarch_pic_common_types) 97