xref: /qemu/hw/intc/loongarch_ipi.c (revision 5b82177addba2487c3c0e1b1974c0076a5a36342)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * LoongArch IPI interrupt support
4  *
5  * Copyright (C) 2024 Loongson Technology Corporation Limited
6  */
7 
8 #include "qemu/osdep.h"
9 #include "hw/boards.h"
10 #include "qapi/error.h"
11 #include "hw/intc/loongarch_ipi.h"
12 #include "target/loongarch/cpu.h"
13 
14 static AddressSpace *get_iocsr_as(CPUState *cpu)
15 {
16     return LOONGARCH_CPU(cpu)->env.address_space_iocsr;
17 }
18 
19 static int archid_cmp(const void *a, const void *b)
20 {
21    CPUArchId *archid_a = (CPUArchId *)a;
22    CPUArchId *archid_b = (CPUArchId *)b;
23 
24    return archid_a->arch_id - archid_b->arch_id;
25 }
26 
27 static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id)
28 {
29     CPUArchId apic_id, *found_cpu;
30 
31     apic_id.arch_id = id;
32     found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus,
33                         ms->possible_cpus->len,
34                         sizeof(*ms->possible_cpus->cpus),
35                         archid_cmp);
36 
37     return found_cpu;
38 }
39 
40 static CPUState *loongarch_cpu_by_arch_id(int64_t arch_id)
41 {
42     MachineState *machine = MACHINE(qdev_get_machine());
43     CPUArchId *archid;
44 
45     archid = find_cpu_by_archid(machine, arch_id);
46     if (archid) {
47         return CPU(archid->cpu);
48     }
49 
50     return NULL;
51 }
52 
53 static void loongarch_ipi_realize(DeviceState *dev, Error **errp)
54 {
55     LoongsonIPICommonState *lics = LOONGSON_IPI_COMMON(dev);
56     LoongarchIPIClass *lic = LOONGARCH_IPI_GET_CLASS(dev);
57     Error *local_err = NULL;
58     int i;
59 
60     lic->parent_realize(dev, &local_err);
61     if (local_err) {
62         error_propagate(errp, local_err);
63         return;
64     }
65 
66     if (lics->num_cpu == 0) {
67         error_setg(errp, "num-cpu must be at least 1");
68         return;
69     }
70 
71     lics->cpu = g_new0(IPICore, lics->num_cpu);
72     for (i = 0; i < lics->num_cpu; i++) {
73         lics->cpu[i].ipi = lics;
74         qdev_init_gpio_out(dev, &lics->cpu[i].irq, 1);
75     }
76 }
77 
78 static void loongarch_ipi_class_init(ObjectClass *klass, void *data)
79 {
80     LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass);
81     LoongarchIPIClass *lic = LOONGARCH_IPI_CLASS(klass);
82     DeviceClass *dc = DEVICE_CLASS(klass);
83 
84     device_class_set_parent_realize(dc, loongarch_ipi_realize,
85                                     &lic->parent_realize);
86     licc->get_iocsr_as = get_iocsr_as;
87     licc->cpu_by_arch_id = loongarch_cpu_by_arch_id;
88 }
89 
90 static const TypeInfo loongarch_ipi_types[] = {
91     {
92         .name               = TYPE_LOONGARCH_IPI,
93         .parent             = TYPE_LOONGSON_IPI_COMMON,
94         .instance_size      = sizeof(LoongarchIPIState),
95         .class_size         = sizeof(LoongarchIPIClass),
96         .class_init         = loongarch_ipi_class_init,
97     }
98 };
99 
100 DEFINE_TYPES(loongarch_ipi_types)
101