xref: /qemu/hw/input/lasips2.c (revision 653b388c39ffa75c2935e30d49d24cbf4a5c12e4)
12a6505b0SSven Schnelle /*
22a6505b0SSven Schnelle  * QEMU HP Lasi PS/2 interface emulation
32a6505b0SSven Schnelle  *
42a6505b0SSven Schnelle  * Copyright (c) 2019 Sven Schnelle
52a6505b0SSven Schnelle  *
62a6505b0SSven Schnelle  * Permission is hereby granted, free of charge, to any person obtaining a copy
72a6505b0SSven Schnelle  * of this software and associated documentation files (the "Software"), to deal
82a6505b0SSven Schnelle  * in the Software without restriction, including without limitation the rights
92a6505b0SSven Schnelle  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
102a6505b0SSven Schnelle  * copies of the Software, and to permit persons to whom the Software is
112a6505b0SSven Schnelle  * furnished to do so, subject to the following conditions:
122a6505b0SSven Schnelle  *
132a6505b0SSven Schnelle  * The above copyright notice and this permission notice shall be included in
142a6505b0SSven Schnelle  * all copies or substantial portions of the Software.
152a6505b0SSven Schnelle  *
162a6505b0SSven Schnelle  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
172a6505b0SSven Schnelle  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
182a6505b0SSven Schnelle  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
192a6505b0SSven Schnelle  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
202a6505b0SSven Schnelle  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
212a6505b0SSven Schnelle  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
222a6505b0SSven Schnelle  * THE SOFTWARE.
232a6505b0SSven Schnelle  */
242a6505b0SSven Schnelle #include "qemu/osdep.h"
252a6505b0SSven Schnelle #include "qemu/log.h"
262a6505b0SSven Schnelle #include "hw/qdev-properties.h"
27*653b388cSMark Cave-Ayland #include "hw/sysbus.h"
282a6505b0SSven Schnelle #include "hw/input/ps2.h"
292a6505b0SSven Schnelle #include "hw/input/lasips2.h"
302a6505b0SSven Schnelle #include "exec/hwaddr.h"
312a6505b0SSven Schnelle #include "trace.h"
322a6505b0SSven Schnelle #include "exec/address-spaces.h"
332a6505b0SSven Schnelle #include "migration/vmstate.h"
342a6505b0SSven Schnelle #include "hw/irq.h"
35*653b388cSMark Cave-Ayland #include "qapi/error.h"
362a6505b0SSven Schnelle 
372a6505b0SSven Schnelle 
382a6505b0SSven Schnelle struct LASIPS2State;
392a6505b0SSven Schnelle typedef struct LASIPS2Port {
402a6505b0SSven Schnelle     struct LASIPS2State *parent;
412a6505b0SSven Schnelle     MemoryRegion reg;
422a6505b0SSven Schnelle     void *dev;
432a6505b0SSven Schnelle     uint8_t id;
442a6505b0SSven Schnelle     uint8_t control;
452a6505b0SSven Schnelle     uint8_t buf;
462a6505b0SSven Schnelle     bool loopback_rbne;
472a6505b0SSven Schnelle     bool irq;
482a6505b0SSven Schnelle } LASIPS2Port;
492a6505b0SSven Schnelle 
50*653b388cSMark Cave-Ayland struct LASIPS2State {
51*653b388cSMark Cave-Ayland     SysBusDevice parent_obj;
52*653b388cSMark Cave-Ayland 
532a6505b0SSven Schnelle     LASIPS2Port kbd;
542a6505b0SSven Schnelle     LASIPS2Port mouse;
552a6505b0SSven Schnelle     qemu_irq irq;
56*653b388cSMark Cave-Ayland };
57*653b388cSMark Cave-Ayland 
58*653b388cSMark Cave-Ayland #define TYPE_LASIPS2 "lasips2"
59*653b388cSMark Cave-Ayland OBJECT_DECLARE_SIMPLE_TYPE(LASIPS2State, LASIPS2)
602a6505b0SSven Schnelle 
612a6505b0SSven Schnelle static const VMStateDescription vmstate_lasips2 = {
622a6505b0SSven Schnelle     .name = "lasips2",
632a6505b0SSven Schnelle     .version_id = 0,
642a6505b0SSven Schnelle     .minimum_version_id = 0,
652a6505b0SSven Schnelle     .fields = (VMStateField[]) {
662a6505b0SSven Schnelle         VMSTATE_UINT8(kbd.control, LASIPS2State),
672a6505b0SSven Schnelle         VMSTATE_UINT8(kbd.id, LASIPS2State),
682a6505b0SSven Schnelle         VMSTATE_BOOL(kbd.irq, LASIPS2State),
692a6505b0SSven Schnelle         VMSTATE_UINT8(mouse.control, LASIPS2State),
702a6505b0SSven Schnelle         VMSTATE_UINT8(mouse.id, LASIPS2State),
712a6505b0SSven Schnelle         VMSTATE_BOOL(mouse.irq, LASIPS2State),
722a6505b0SSven Schnelle         VMSTATE_END_OF_LIST()
732a6505b0SSven Schnelle     }
742a6505b0SSven Schnelle };
752a6505b0SSven Schnelle 
762a6505b0SSven Schnelle typedef enum {
772a6505b0SSven Schnelle     REG_PS2_ID = 0,
782a6505b0SSven Schnelle     REG_PS2_RCVDATA = 4,
792a6505b0SSven Schnelle     REG_PS2_CONTROL = 8,
802a6505b0SSven Schnelle     REG_PS2_STATUS = 12,
812a6505b0SSven Schnelle } lasips2_read_reg_t;
822a6505b0SSven Schnelle 
832a6505b0SSven Schnelle typedef enum {
842a6505b0SSven Schnelle     REG_PS2_RESET = 0,
852a6505b0SSven Schnelle     REG_PS2_XMTDATA = 4,
862a6505b0SSven Schnelle } lasips2_write_reg_t;
872a6505b0SSven Schnelle 
882a6505b0SSven Schnelle typedef enum {
892a6505b0SSven Schnelle     LASIPS2_CONTROL_ENABLE = 0x01,
902a6505b0SSven Schnelle     LASIPS2_CONTROL_LOOPBACK = 0x02,
912a6505b0SSven Schnelle     LASIPS2_CONTROL_DIAG = 0x20,
922a6505b0SSven Schnelle     LASIPS2_CONTROL_DATDIR = 0x40,
932a6505b0SSven Schnelle     LASIPS2_CONTROL_CLKDIR = 0x80,
942a6505b0SSven Schnelle } lasips2_control_reg_t;
952a6505b0SSven Schnelle 
962a6505b0SSven Schnelle typedef enum {
972a6505b0SSven Schnelle     LASIPS2_STATUS_RBNE = 0x01,
982a6505b0SSven Schnelle     LASIPS2_STATUS_TBNE = 0x02,
992a6505b0SSven Schnelle     LASIPS2_STATUS_TERR = 0x04,
1002a6505b0SSven Schnelle     LASIPS2_STATUS_PERR = 0x08,
1012a6505b0SSven Schnelle     LASIPS2_STATUS_CMPINTR = 0x10,
1022a6505b0SSven Schnelle     LASIPS2_STATUS_DATSHD = 0x40,
1032a6505b0SSven Schnelle     LASIPS2_STATUS_CLKSHD = 0x80,
1042a6505b0SSven Schnelle } lasips2_status_reg_t;
1052a6505b0SSven Schnelle 
1065d2bd735SPhilippe Mathieu-Daudé static const char *lasips2_read_reg_name(uint64_t addr)
1072a6505b0SSven Schnelle {
1082a6505b0SSven Schnelle     switch (addr & 0xc) {
1092a6505b0SSven Schnelle     case REG_PS2_ID:
1102a6505b0SSven Schnelle         return " PS2_ID";
1112a6505b0SSven Schnelle 
1122a6505b0SSven Schnelle     case REG_PS2_RCVDATA:
1132a6505b0SSven Schnelle         return " PS2_RCVDATA";
1142a6505b0SSven Schnelle 
1152a6505b0SSven Schnelle     case REG_PS2_CONTROL:
1162a6505b0SSven Schnelle         return " PS2_CONTROL";
1172a6505b0SSven Schnelle 
1182a6505b0SSven Schnelle     case REG_PS2_STATUS:
1192a6505b0SSven Schnelle         return " PS2_STATUS";
1202a6505b0SSven Schnelle 
1212a6505b0SSven Schnelle     default:
1222a6505b0SSven Schnelle         return "";
1232a6505b0SSven Schnelle     }
1242a6505b0SSven Schnelle }
1252a6505b0SSven Schnelle 
1265d2bd735SPhilippe Mathieu-Daudé static const char *lasips2_write_reg_name(uint64_t addr)
1272a6505b0SSven Schnelle {
1282a6505b0SSven Schnelle     switch (addr & 0x0c) {
1292a6505b0SSven Schnelle     case REG_PS2_RESET:
1302a6505b0SSven Schnelle         return " PS2_RESET";
1312a6505b0SSven Schnelle 
1322a6505b0SSven Schnelle     case REG_PS2_XMTDATA:
1332a6505b0SSven Schnelle         return " PS2_XMTDATA";
1342a6505b0SSven Schnelle 
1352a6505b0SSven Schnelle     case REG_PS2_CONTROL:
1362a6505b0SSven Schnelle         return " PS2_CONTROL";
1372a6505b0SSven Schnelle 
1382a6505b0SSven Schnelle     default:
1392a6505b0SSven Schnelle         return "";
1402a6505b0SSven Schnelle     }
1412a6505b0SSven Schnelle }
1422a6505b0SSven Schnelle 
1432a6505b0SSven Schnelle static void lasips2_update_irq(LASIPS2State *s)
1442a6505b0SSven Schnelle {
1452a6505b0SSven Schnelle     trace_lasips2_intr(s->kbd.irq | s->mouse.irq);
1462a6505b0SSven Schnelle     qemu_set_irq(s->irq, s->kbd.irq | s->mouse.irq);
1472a6505b0SSven Schnelle }
1482a6505b0SSven Schnelle 
1492a6505b0SSven Schnelle static void lasips2_reg_write(void *opaque, hwaddr addr, uint64_t val,
1502a6505b0SSven Schnelle                               unsigned size)
1512a6505b0SSven Schnelle {
1522a6505b0SSven Schnelle     LASIPS2Port *port = opaque;
1532a6505b0SSven Schnelle 
1542a6505b0SSven Schnelle     trace_lasips2_reg_write(size, port->id, addr,
1555d2bd735SPhilippe Mathieu-Daudé                             lasips2_write_reg_name(addr), val);
1562a6505b0SSven Schnelle 
1572a6505b0SSven Schnelle     switch (addr & 0xc) {
1582a6505b0SSven Schnelle     case REG_PS2_CONTROL:
1592a6505b0SSven Schnelle         port->control = val;
1602a6505b0SSven Schnelle         break;
1612a6505b0SSven Schnelle 
1622a6505b0SSven Schnelle     case REG_PS2_XMTDATA:
1632a6505b0SSven Schnelle         if (port->control & LASIPS2_CONTROL_LOOPBACK) {
1642a6505b0SSven Schnelle             port->buf = val;
1652a6505b0SSven Schnelle             port->irq = true;
1662a6505b0SSven Schnelle             port->loopback_rbne = true;
1672a6505b0SSven Schnelle             lasips2_update_irq(port->parent);
1682a6505b0SSven Schnelle             break;
1692a6505b0SSven Schnelle         }
1702a6505b0SSven Schnelle 
1712a6505b0SSven Schnelle         if (port->id) {
1722a6505b0SSven Schnelle             ps2_write_mouse(port->dev, val);
1732a6505b0SSven Schnelle         } else {
1742a6505b0SSven Schnelle             ps2_write_keyboard(port->dev, val);
1752a6505b0SSven Schnelle         }
1762a6505b0SSven Schnelle         break;
1772a6505b0SSven Schnelle 
1782a6505b0SSven Schnelle     case REG_PS2_RESET:
1792a6505b0SSven Schnelle         break;
1802a6505b0SSven Schnelle 
1812a6505b0SSven Schnelle     default:
1822a6505b0SSven Schnelle         qemu_log_mask(LOG_UNIMP, "%s: unknown register 0x%02" HWADDR_PRIx "\n",
1832a6505b0SSven Schnelle                       __func__, addr);
1842a6505b0SSven Schnelle         break;
1852a6505b0SSven Schnelle     }
1862a6505b0SSven Schnelle }
1872a6505b0SSven Schnelle 
1882a6505b0SSven Schnelle static uint64_t lasips2_reg_read(void *opaque, hwaddr addr, unsigned size)
1892a6505b0SSven Schnelle {
1902a6505b0SSven Schnelle     LASIPS2Port *port = opaque;
1912a6505b0SSven Schnelle     uint64_t ret = 0;
1922a6505b0SSven Schnelle 
1932a6505b0SSven Schnelle     switch (addr & 0xc) {
1942a6505b0SSven Schnelle     case REG_PS2_ID:
1952a6505b0SSven Schnelle         ret = port->id;
1962a6505b0SSven Schnelle         break;
1972a6505b0SSven Schnelle 
1982a6505b0SSven Schnelle     case REG_PS2_RCVDATA:
1992a6505b0SSven Schnelle         if (port->control & LASIPS2_CONTROL_LOOPBACK) {
2002a6505b0SSven Schnelle             port->irq = false;
2012a6505b0SSven Schnelle             port->loopback_rbne = false;
2022a6505b0SSven Schnelle             lasips2_update_irq(port->parent);
2032a6505b0SSven Schnelle             ret = port->buf;
2042a6505b0SSven Schnelle             break;
2052a6505b0SSven Schnelle         }
2062a6505b0SSven Schnelle 
2072a6505b0SSven Schnelle         ret = ps2_read_data(port->dev);
2082a6505b0SSven Schnelle         break;
2092a6505b0SSven Schnelle 
2102a6505b0SSven Schnelle     case REG_PS2_CONTROL:
2112a6505b0SSven Schnelle         ret = port->control;
2122a6505b0SSven Schnelle         break;
2132a6505b0SSven Schnelle 
2142a6505b0SSven Schnelle     case REG_PS2_STATUS:
2152a6505b0SSven Schnelle         ret = LASIPS2_STATUS_DATSHD | LASIPS2_STATUS_CLKSHD;
2162a6505b0SSven Schnelle 
2172a6505b0SSven Schnelle         if (port->control & LASIPS2_CONTROL_DIAG) {
2182a6505b0SSven Schnelle             if (!(port->control & LASIPS2_CONTROL_DATDIR)) {
2192a6505b0SSven Schnelle                 ret &= ~LASIPS2_STATUS_DATSHD;
2202a6505b0SSven Schnelle             }
2212a6505b0SSven Schnelle 
2222a6505b0SSven Schnelle             if (!(port->control & LASIPS2_CONTROL_CLKDIR)) {
2232a6505b0SSven Schnelle                 ret &= ~LASIPS2_STATUS_CLKSHD;
2242a6505b0SSven Schnelle             }
2252a6505b0SSven Schnelle         }
2262a6505b0SSven Schnelle 
2272a6505b0SSven Schnelle         if (port->control & LASIPS2_CONTROL_LOOPBACK) {
2282a6505b0SSven Schnelle             if (port->loopback_rbne) {
2292a6505b0SSven Schnelle                 ret |= LASIPS2_STATUS_RBNE;
2302a6505b0SSven Schnelle             }
2312a6505b0SSven Schnelle         } else {
2322a6505b0SSven Schnelle             if (!ps2_queue_empty(port->dev)) {
2332a6505b0SSven Schnelle                 ret |= LASIPS2_STATUS_RBNE;
2342a6505b0SSven Schnelle             }
2352a6505b0SSven Schnelle         }
2362a6505b0SSven Schnelle 
2372a6505b0SSven Schnelle         if (port->parent->kbd.irq || port->parent->mouse.irq) {
2382a6505b0SSven Schnelle             ret |= LASIPS2_STATUS_CMPINTR;
2392a6505b0SSven Schnelle         }
2402a6505b0SSven Schnelle         break;
2412a6505b0SSven Schnelle 
2422a6505b0SSven Schnelle     default:
2432a6505b0SSven Schnelle         qemu_log_mask(LOG_UNIMP, "%s: unknown register 0x%02" HWADDR_PRIx "\n",
2442a6505b0SSven Schnelle                       __func__, addr);
2452a6505b0SSven Schnelle         break;
2462a6505b0SSven Schnelle     }
2472a93d3c1SMark Cave-Ayland 
2482a6505b0SSven Schnelle     trace_lasips2_reg_read(size, port->id, addr,
2495d2bd735SPhilippe Mathieu-Daudé                            lasips2_read_reg_name(addr), ret);
2502a6505b0SSven Schnelle     return ret;
2512a6505b0SSven Schnelle }
2522a6505b0SSven Schnelle 
2532a6505b0SSven Schnelle static const MemoryRegionOps lasips2_reg_ops = {
2542a6505b0SSven Schnelle     .read = lasips2_reg_read,
2552a6505b0SSven Schnelle     .write = lasips2_reg_write,
2562a6505b0SSven Schnelle     .impl = {
2572a6505b0SSven Schnelle         .min_access_size = 1,
2582a6505b0SSven Schnelle         .max_access_size = 4,
2592a6505b0SSven Schnelle     },
2602a6505b0SSven Schnelle     .endianness = DEVICE_NATIVE_ENDIAN,
2612a6505b0SSven Schnelle };
2622a6505b0SSven Schnelle 
263f342469fSMark Cave-Ayland static void lasips2_port_set_irq(void *opaque, int level)
2642a6505b0SSven Schnelle {
2652a6505b0SSven Schnelle     LASIPS2Port *port = opaque;
2662a93d3c1SMark Cave-Ayland 
2672a6505b0SSven Schnelle     port->irq = level;
2682a6505b0SSven Schnelle     lasips2_update_irq(port->parent);
2692a6505b0SSven Schnelle }
2702a6505b0SSven Schnelle 
2712a6505b0SSven Schnelle void lasips2_init(MemoryRegion *address_space,
2722a6505b0SSven Schnelle                   hwaddr base, qemu_irq irq)
2732a6505b0SSven Schnelle {
2742a6505b0SSven Schnelle     LASIPS2State *s;
275*653b388cSMark Cave-Ayland     DeviceState *dev;
2762a6505b0SSven Schnelle 
277*653b388cSMark Cave-Ayland     dev = qdev_new(TYPE_LASIPS2);
278*653b388cSMark Cave-Ayland     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
279*653b388cSMark Cave-Ayland     s = LASIPS2(dev);
2802a6505b0SSven Schnelle 
2812a6505b0SSven Schnelle     s->irq = irq;
2822a6505b0SSven Schnelle     s->mouse.id = 1;
2832a6505b0SSven Schnelle     s->kbd.parent = s;
2842a6505b0SSven Schnelle     s->mouse.parent = s;
2852a6505b0SSven Schnelle 
2862a6505b0SSven Schnelle     vmstate_register(NULL, base, &vmstate_lasips2, s);
2872a6505b0SSven Schnelle 
288f342469fSMark Cave-Ayland     s->kbd.dev = ps2_kbd_init(lasips2_port_set_irq, &s->kbd);
289f342469fSMark Cave-Ayland     s->mouse.dev = ps2_mouse_init(lasips2_port_set_irq, &s->mouse);
2902a6505b0SSven Schnelle 
2912a6505b0SSven Schnelle     memory_region_init_io(&s->kbd.reg, NULL, &lasips2_reg_ops, &s->kbd,
2922a6505b0SSven Schnelle                           "lasips2-kbd", 0x100);
2932a6505b0SSven Schnelle     memory_region_add_subregion(address_space, base, &s->kbd.reg);
2942a6505b0SSven Schnelle 
2952a6505b0SSven Schnelle     memory_region_init_io(&s->mouse.reg, NULL, &lasips2_reg_ops, &s->mouse,
2962a6505b0SSven Schnelle                           "lasips2-mouse", 0x100);
2972a6505b0SSven Schnelle     memory_region_add_subregion(address_space, base + 0x100, &s->mouse.reg);
2982a6505b0SSven Schnelle }
299*653b388cSMark Cave-Ayland 
300*653b388cSMark Cave-Ayland static const TypeInfo lasips2_info = {
301*653b388cSMark Cave-Ayland     .name          = TYPE_LASIPS2,
302*653b388cSMark Cave-Ayland     .parent        = TYPE_SYS_BUS_DEVICE,
303*653b388cSMark Cave-Ayland     .instance_size = sizeof(LASIPS2State)
304*653b388cSMark Cave-Ayland };
305*653b388cSMark Cave-Ayland 
306*653b388cSMark Cave-Ayland static void lasips2_register_types(void)
307*653b388cSMark Cave-Ayland {
308*653b388cSMark Cave-Ayland     type_register_static(&lasips2_info);
309*653b388cSMark Cave-Ayland }
310*653b388cSMark Cave-Ayland 
311*653b388cSMark Cave-Ayland type_init(lasips2_register_types)
312