xref: /qemu/hw/ide/ide-internal.h (revision f74c6177bb9ae5763a123e1e9dbcda1405e03032)
1 #ifndef HW_IDE_INTERNAL_H
2 #define HW_IDE_INTERNAL_H
3 
4 /*
5  * QEMU IDE Emulation -- internal header file
6  * only files in hw/ide/ are supposed to include this file.
7  * non-internal declarations are in hw/ide.h
8  */
9 
10 #include "hw/ide.h"
11 #include "hw/ide/ide-bus.h"
12 
13 /* debug IDE devices */
14 #define USE_DMA_CDROM
15 
16 /* Device/Head ("select") Register */
17 #define ATA_DEV_SELECT          0x10
18 /* ATA1,3: Defined as '1'.
19  * ATA2:   Reserved.
20  * ATA3-7: obsolete. */
21 #define ATA_DEV_ALWAYS_ON       0xA0
22 #define ATA_DEV_LBA             0x40
23 #define ATA_DEV_LBA_MSB         0x0F  /* LBA 24:27 */
24 #define ATA_DEV_HS              0x0F  /* HS 3:0 */
25 
26 
27 /* Bits of HD_STATUS */
28 #define ERR_STAT                0x01
29 #define INDEX_STAT              0x02
30 #define ECC_STAT                0x04    /* Corrected error */
31 #define DRQ_STAT                0x08
32 #define SEEK_STAT               0x10
33 #define SRV_STAT                0x10
34 #define WRERR_STAT              0x20
35 #define READY_STAT              0x40
36 #define BUSY_STAT               0x80
37 
38 /* Bits for HD_ERROR */
39 #define MARK_ERR                0x01    /* Bad address mark */
40 #define TRK0_ERR                0x02    /* couldn't find track 0 */
41 #define ABRT_ERR                0x04    /* Command aborted */
42 #define MCR_ERR                 0x08    /* media change request */
43 #define ID_ERR                  0x10    /* ID field not found */
44 #define MC_ERR                  0x20    /* media changed */
45 #define ECC_ERR                 0x40    /* Uncorrectable ECC error */
46 #define BBD_ERR                 0x80    /* pre-EIDE meaning:  block marked bad */
47 #define ICRC_ERR                0x80    /* new meaning:  CRC error during transfer */
48 
49 /* Bits of HD_NSECTOR */
50 #define CD                      0x01
51 #define IO                      0x02
52 #define REL                     0x04
53 #define TAG_MASK                0xf8
54 
55 /* Bits of Device Control register */
56 #define IDE_CTRL_HOB            0x80
57 #define IDE_CTRL_RESET          0x04
58 #define IDE_CTRL_DISABLE_IRQ    0x02
59 
60 /* ACS-2 T13/2015-D Table B.2 Command codes */
61 #define WIN_NOP                         0x00
62 /* reserved                             0x01..0x02 */
63 #define CFA_REQ_EXT_ERROR_CODE          0x03 /* CFA Request Extended Error Code */
64 /* reserved                             0x04..0x05 */
65 #define WIN_DSM                         0x06
66 /* reserved                             0x07 */
67 #define WIN_DEVICE_RESET                0x08
68 /* reserved                             0x09..0x0a */
69 /* REQUEST SENSE DATA EXT               0x0B */
70 /* reserved                             0x0C..0x0F */
71 #define WIN_RECAL                       0x10 /* obsolete since ATA4 */
72 /* obsolete since ATA3, retired in ATA4 0x11..0x1F */
73 #define WIN_READ                        0x20 /* 28-Bit */
74 #define WIN_READ_ONCE                   0x21 /* 28-Bit w/o retries, obsolete since ATA5 */
75 /* obsolete since ATA4                  0x22..0x23 */
76 #define WIN_READ_EXT                    0x24 /* 48-Bit */
77 #define WIN_READDMA_EXT                 0x25 /* 48-Bit */
78 #define WIN_READDMA_QUEUED_EXT          0x26 /* 48-Bit, obsolete since ACS2 */
79 #define WIN_READ_NATIVE_MAX_EXT         0x27 /* 48-Bit */
80 /* reserved                             0x28 */
81 #define WIN_MULTREAD_EXT                0x29 /* 48-Bit */
82 /* READ STREAM DMA EXT                  0x2A */
83 /* READ STREAM EXT                      0x2B */
84 /* reserved                             0x2C..0x2E */
85 /* READ LOG EXT                         0x2F */
86 #define WIN_WRITE                       0x30 /* 28-Bit */
87 #define WIN_WRITE_ONCE                  0x31 /* 28-Bit w/o retries, obsolete since ATA5 */
88 /* obsolete since ATA4                  0x32..0x33 */
89 #define WIN_WRITE_EXT                   0x34 /* 48-Bit */
90 #define WIN_WRITEDMA_EXT                0x35 /* 48-Bit */
91 #define WIN_WRITEDMA_QUEUED_EXT         0x36 /* 48-Bit */
92 #define WIN_SET_MAX_EXT                 0x37 /* 48-Bit, obsolete since ACS2 */
93 #define WIN_SET_MAX_EXT                 0x37 /* 48-Bit */
94 #define CFA_WRITE_SECT_WO_ERASE         0x38 /* CFA Write Sectors without erase */
95 #define WIN_MULTWRITE_EXT               0x39 /* 48-Bit */
96 /* WRITE STREAM DMA EXT                 0x3A */
97 /* WRITE STREAM EXT                     0x3B */
98 #define WIN_WRITE_VERIFY                0x3C /* 28-Bit, obsolete since ATA4 */
99 /* WRITE DMA FUA EXT                    0x3D */
100 /* obsolete since ACS2                  0x3E */
101 /* WRITE LOG EXT                        0x3F */
102 #define WIN_VERIFY                      0x40 /* 28-Bit - Read Verify Sectors */
103 #define WIN_VERIFY_ONCE                 0x41 /* 28-Bit - w/o retries, obsolete since ATA5 */
104 #define WIN_VERIFY_EXT                  0x42 /* 48-Bit */
105 /* reserved                             0x43..0x44 */
106 /* WRITE UNCORRECTABLE EXT              0x45 */
107 /* reserved                             0x46 */
108 /* READ LOG DMA EXT                     0x47 */
109 /* reserved                             0x48..0x4F */
110 /* obsolete since ATA4                  0x50 */
111 /* CONFIGURE STREAM                     0x51 */
112 /* reserved                             0x52..0x56 */
113 /* WRITE LOG DMA EXT                    0x57 */
114 /* reserved                             0x58..0x5A */
115 /* TRUSTED NON DATA                     0x5B */
116 /* TRUSTED RECEIVE                      0x5C */
117 /* TRUSTED RECEIVE DMA                  0x5D */
118 /* TRUSTED SEND                         0x5E */
119 /* TRUSTED SEND DMA                     0x5F */
120 /* READ FPDMA QUEUED                    0x60 */
121 /* WRITE FPDMA QUEUED                   0x61 */
122 /* reserved                             0x62->0x6F */
123 #define WIN_SEEK                        0x70 /* obsolete since ATA7 */
124 /* reserved                             0x71-0x7F */
125 /* vendor specific                      0x80-0x86 */
126 #define CFA_TRANSLATE_SECTOR            0x87 /* CFA Translate Sector */
127 /* vendor specific                      0x88-0x8F */
128 #define WIN_DIAGNOSE                    0x90
129 #define WIN_SPECIFY                     0x91 /* set drive geometry translation, obsolete since ATA6 */
130 #define WIN_DOWNLOAD_MICROCODE          0x92
131 /* DOWNLOAD MICROCODE DMA               0x93 */
132 #define WIN_STANDBYNOW2                 0x94 /* retired in ATA4 */
133 #define WIN_IDLEIMMEDIATE2              0x95 /* force drive to become "ready", retired in ATA4 */
134 #define WIN_STANDBY2                    0x96 /* retired in ATA4 */
135 #define WIN_SETIDLE2                    0x97 /* retired in ATA4 */
136 #define WIN_CHECKPOWERMODE2             0x98 /* retired in ATA4 */
137 #define WIN_SLEEPNOW2                   0x99 /* retired in ATA4 */
138 /* vendor specific                      0x9A */
139 /* reserved                             0x9B..0x9F */
140 #define WIN_PACKETCMD                   0xA0 /* Send a packet command. */
141 #define WIN_PIDENTIFY                   0xA1 /* identify ATAPI device */
142 #define WIN_QUEUED_SERVICE              0xA2 /* obsolete since ACS2 */
143 /* reserved                             0xA3..0xAF */
144 #define WIN_SMART                       0xB0 /* self-monitoring and reporting */
145 /* Device Configuration Overlay         0xB1 */
146 /* reserved                             0xB2..0xB3 */
147 /* Sanitize Device                      0xB4 */
148 /* reserved                             0xB5 */
149 /* NV Cache                             0xB6 */
150 /* reserved for CFA                     0xB7..0xBB */
151 #define CFA_ACCESS_METADATA_STORAGE     0xB8
152 /* reserved                             0xBC..0xBF */
153 #define CFA_ERASE_SECTORS               0xC0 /* microdrives implement as NOP */
154 /* vendor specific                      0xC1..0xC3 */
155 #define WIN_MULTREAD                    0xC4 /* read sectors using multiple mode*/
156 #define WIN_MULTWRITE                   0xC5 /* write sectors using multiple mode */
157 #define WIN_SETMULT                     0xC6 /* enable/disable multiple mode */
158 #define WIN_READDMA_QUEUED              0xC7 /* read sectors using Queued DMA transfers, obsolete since ACS2 */
159 #define WIN_READDMA                     0xC8 /* read sectors using DMA transfers */
160 #define WIN_READDMA_ONCE                0xC9 /* 28-Bit - w/o retries, obsolete since ATA5 */
161 #define WIN_WRITEDMA                    0xCA /* write sectors using DMA transfers */
162 #define WIN_WRITEDMA_ONCE               0xCB /* 28-Bit - w/o retries, obsolete since ATA5 */
163 #define WIN_WRITEDMA_QUEUED             0xCC /* write sectors using Queued DMA transfers, obsolete since ACS2 */
164 #define CFA_WRITE_MULTI_WO_ERASE        0xCD /* CFA Write multiple without erase */
165 /* WRITE MULTIPLE FUA EXT               0xCE */
166 /* reserved                             0xCF..0xDO */
167 /* CHECK MEDIA CARD TYPE                0xD1 */
168 /* reserved for media card pass through 0xD2..0xD4 */
169 /* reserved                             0xD5..0xD9 */
170 #define WIN_GETMEDIASTATUS              0xDA /* obsolete since ATA8 */
171 /* obsolete since ATA3, retired in ATA4 0xDB..0xDD */
172 #define WIN_DOORLOCK                    0xDE /* lock door on removable drives, obsolete since ATA8 */
173 #define WIN_DOORUNLOCK                  0xDF /* unlock door on removable drives, obsolete since ATA8 */
174 #define WIN_STANDBYNOW1                 0xE0
175 #define WIN_IDLEIMMEDIATE               0xE1 /* force drive to become "ready" */
176 #define WIN_STANDBY                     0xE2 /* Set device in Standby Mode */
177 #define WIN_SETIDLE1                    0xE3
178 #define WIN_READ_BUFFER                 0xE4 /* force read only 1 sector */
179 #define WIN_CHECKPOWERMODE1             0xE5
180 #define WIN_SLEEPNOW1                   0xE6
181 #define WIN_FLUSH_CACHE                 0xE7
182 #define WIN_WRITE_BUFFER                0xE8 /* force write only 1 sector */
183 /* READ BUFFER DMA                      0xE9 */
184 #define WIN_FLUSH_CACHE_EXT             0xEA /* 48-Bit */
185 /* WRITE BUFFER DMA                     0xEB */
186 #define WIN_IDENTIFY                    0xEC /* ask drive to identify itself */
187 #define WIN_MEDIAEJECT                  0xED /* obsolete since ATA8 */
188 /* obsolete since ATA4                  0xEE */
189 #define WIN_SETFEATURES                 0xEF /* set special drive features */
190 #define IBM_SENSE_CONDITION             0xF0 /* measure disk temperature, vendor specific */
191 #define WIN_SECURITY_SET_PASS           0xF1
192 #define WIN_SECURITY_UNLOCK             0xF2
193 #define WIN_SECURITY_ERASE_PREPARE      0xF3
194 #define WIN_SECURITY_ERASE_UNIT         0xF4
195 #define WIN_SECURITY_FREEZE_LOCK        0xF5
196 #define CFA_WEAR_LEVEL                  0xF5 /* microdrives implement as NOP; not specified in T13! */
197 #define WIN_SECURITY_DISABLE            0xF6
198 /* vendor specific                      0xF7 */
199 #define WIN_READ_NATIVE_MAX             0xF8 /* return the native maximum address */
200 #define WIN_SET_MAX                     0xF9
201 /* vendor specific                      0xFA..0xFF */
202 
203 /* set to 1 set disable mult support */
204 #define MAX_MULT_SECTORS 16
205 
206 #define IDE_DMA_BUF_SECTORS 256
207 
208 /* feature values for Data Set Management */
209 #define DSM_TRIM                        0x01
210 
211 #if (IDE_DMA_BUF_SECTORS < MAX_MULT_SECTORS)
212 #error "IDE_DMA_BUF_SECTORS must be bigger or equal to MAX_MULT_SECTORS"
213 #endif
214 
215 /* ATAPI defines */
216 
217 #define ATAPI_PACKET_SIZE 12
218 
219 /* The generic packet command opcodes for CD/DVD Logical Units,
220  * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
221 #define GPCMD_BLANK                         0xa1
222 #define GPCMD_CLOSE_TRACK                   0x5b
223 #define GPCMD_FLUSH_CACHE                   0x35
224 #define GPCMD_FORMAT_UNIT                   0x04
225 #define GPCMD_GET_CONFIGURATION             0x46
226 #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
227 #define GPCMD_GET_PERFORMANCE               0xac
228 #define GPCMD_INQUIRY                       0x12
229 #define GPCMD_LOAD_UNLOAD                   0xa6
230 #define GPCMD_MECHANISM_STATUS              0xbd
231 #define GPCMD_MODE_SELECT_10                0x55
232 #define GPCMD_MODE_SENSE_10                 0x5a
233 #define GPCMD_PAUSE_RESUME                  0x4b
234 #define GPCMD_PLAY_AUDIO_10                 0x45
235 #define GPCMD_PLAY_AUDIO_MSF                0x47
236 #define GPCMD_PLAY_AUDIO_TI                 0x48
237 #define GPCMD_PLAY_CD                       0xbc
238 #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL  0x1e
239 #define GPCMD_READ_10                       0x28
240 #define GPCMD_READ_12                       0xa8
241 #define GPCMD_READ_CDVD_CAPACITY            0x25
242 #define GPCMD_READ_CD                       0xbe
243 #define GPCMD_READ_CD_MSF                   0xb9
244 #define GPCMD_READ_DISC_INFO                0x51
245 #define GPCMD_READ_DVD_STRUCTURE            0xad
246 #define GPCMD_READ_FORMAT_CAPACITIES        0x23
247 #define GPCMD_READ_HEADER                   0x44
248 #define GPCMD_READ_TRACK_RZONE_INFO         0x52
249 #define GPCMD_READ_SUBCHANNEL               0x42
250 #define GPCMD_READ_TOC_PMA_ATIP             0x43
251 #define GPCMD_REPAIR_RZONE_TRACK            0x58
252 #define GPCMD_REPORT_KEY                    0xa4
253 #define GPCMD_REQUEST_SENSE                 0x03
254 #define GPCMD_RESERVE_RZONE_TRACK           0x53
255 #define GPCMD_SCAN                          0xba
256 #define GPCMD_SEEK                          0x2b
257 #define GPCMD_SEND_DVD_STRUCTURE            0xad
258 #define GPCMD_SEND_EVENT                    0xa2
259 #define GPCMD_SEND_KEY                      0xa3
260 #define GPCMD_SEND_OPC                      0x54
261 #define GPCMD_SET_READ_AHEAD                0xa7
262 #define GPCMD_SET_STREAMING                 0xb6
263 #define GPCMD_START_STOP_UNIT               0x1b
264 #define GPCMD_STOP_PLAY_SCAN                0x4e
265 #define GPCMD_TEST_UNIT_READY               0x00
266 #define GPCMD_VERIFY_10                     0x2f
267 #define GPCMD_WRITE_10                      0x2a
268 #define GPCMD_WRITE_AND_VERIFY_10           0x2e
269 /* This is listed as optional in ATAPI 2.6, but is (curiously)
270  * missing from Mt. Fuji, Table 57.  It _is_ mentioned in Mt. Fuji
271  * Table 377 as an MMC command for SCSi devices though...  Most ATAPI
272  * drives support it. */
273 #define GPCMD_SET_SPEED                     0xbb
274 /* This seems to be a SCSI specific CD-ROM opcode
275  * to play data at track/index */
276 #define GPCMD_PLAYAUDIO_TI                  0x48
277 /*
278  * From MS Media Status Notification Support Specification. For
279  * older drives only.
280  */
281 #define GPCMD_GET_MEDIA_STATUS              0xda
282 #define GPCMD_MODE_SENSE_6                  0x1a
283 
284 #define ATAPI_INT_REASON_CD             0x01 /* 0 = data transfer */
285 #define ATAPI_INT_REASON_IO             0x02 /* 1 = transfer to the host */
286 #define ATAPI_INT_REASON_REL            0x04
287 #define ATAPI_INT_REASON_TAG            0xf8
288 
289 /* same constants as bochs */
290 #define ASC_NO_SEEK_COMPLETE                 0x02
291 #define ASC_ILLEGAL_OPCODE                   0x20
292 #define ASC_LOGICAL_BLOCK_OOR                0x21
293 #define ASC_INV_FIELD_IN_CMD_PACKET          0x24
294 #define ASC_MEDIUM_MAY_HAVE_CHANGED          0x28
295 #define ASC_INCOMPATIBLE_FORMAT              0x30
296 #define ASC_MEDIUM_NOT_PRESENT               0x3a
297 #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED  0x39
298 #define ASC_DATA_PHASE_ERROR                 0x4b
299 #define ASC_MEDIA_REMOVAL_PREVENTED          0x53
300 
301 #define CFA_NO_ERROR            0x00
302 #define CFA_MISC_ERROR          0x09
303 #define CFA_INVALID_COMMAND     0x20
304 #define CFA_INVALID_ADDRESS     0x21
305 #define CFA_ADDRESS_OVERFLOW    0x2f
306 
307 #define SMART_READ_DATA       0xd0
308 #define SMART_READ_THRESH     0xd1
309 #define SMART_ATTR_AUTOSAVE   0xd2
310 #define SMART_SAVE_ATTR       0xd3
311 #define SMART_EXECUTE_OFFLINE 0xd4
312 #define SMART_READ_LOG        0xd5
313 #define SMART_WRITE_LOG       0xd6
314 #define SMART_ENABLE          0xd8
315 #define SMART_DISABLE         0xd9
316 #define SMART_STATUS          0xda
317 
318 extern const char *IDE_DMA_CMD_lookup[IDE_DMA__COUNT];
319 
320 extern const MemoryRegionPortio ide_portio_list[];
321 extern const MemoryRegionPortio ide_portio2_list[];
322 
323 #define ide_cmd_is_read(s) \
324         ((s)->dma_cmd == IDE_DMA_READ)
325 
326 typedef struct IDEBufferedRequest {
327     QLIST_ENTRY(IDEBufferedRequest) list;
328     QEMUIOVector qiov;
329     QEMUIOVector *original_qiov;
330     BlockCompletionFunc *original_cb;
331     void *original_opaque;
332     bool orphaned;
333 } IDEBufferedRequest;
334 
335 /* These are used for the error_status field of IDEBus */
336 #define IDE_RETRY_MASK 0xf8
337 #define IDE_RETRY_DMA  0x08
338 #define IDE_RETRY_PIO  0x10
339 #define IDE_RETRY_ATAPI 0x20 /* reused IDE_RETRY_READ bit */
340 #define IDE_RETRY_READ  0x20
341 #define IDE_RETRY_FLUSH 0x40
342 #define IDE_RETRY_TRIM 0x80
343 #define IDE_RETRY_HBA  0x100
344 
345 #define IS_IDE_RETRY_DMA(_status) \
346     ((_status) & IDE_RETRY_DMA)
347 
348 #define IS_IDE_RETRY_PIO(_status) \
349     ((_status) & IDE_RETRY_PIO)
350 
351 /*
352  * The method of the IDE_RETRY_ATAPI determination is to use a previously
353  * impossible bit combination as a new status value.
354  */
355 #define IS_IDE_RETRY_ATAPI(_status)   \
356     (((_status) & IDE_RETRY_MASK) == IDE_RETRY_ATAPI)
357 
358 static inline uint8_t ide_dma_cmd_to_retry(uint8_t dma_cmd)
359 {
360     switch (dma_cmd) {
361     case IDE_DMA_READ:
362         return IDE_RETRY_DMA | IDE_RETRY_READ;
363     case IDE_DMA_WRITE:
364         return IDE_RETRY_DMA;
365     case IDE_DMA_TRIM:
366         return IDE_RETRY_DMA | IDE_RETRY_TRIM;
367     case IDE_DMA_ATAPI:
368         return IDE_RETRY_ATAPI;
369     default:
370         break;
371     }
372     return 0;
373 }
374 
375 static inline IDEState *ide_bus_active_if(IDEBus *bus)
376 {
377     return bus->ifs + bus->unit;
378 }
379 
380 /* hw/ide/core.c */
381 extern const VMStateDescription vmstate_ide_bus;
382 
383 #define VMSTATE_IDE_BUS(_field, _state)                          \
384     VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_bus, IDEBus)
385 
386 #define VMSTATE_IDE_BUS_ARRAY(_field, _state, _num)              \
387     VMSTATE_STRUCT_ARRAY(_field, _state, _num, 1, vmstate_ide_bus, IDEBus)
388 
389 extern const VMStateDescription vmstate_ide_drive;
390 
391 #define VMSTATE_IDE_DRIVES(_field, _state) \
392     VMSTATE_STRUCT_ARRAY(_field, _state, 2, 3, vmstate_ide_drive, IDEState)
393 
394 #define VMSTATE_IDE_DRIVE(_field, _state) \
395     VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_drive, IDEState)
396 
397 void ide_bus_reset(IDEBus *bus);
398 int64_t ide_get_sector(IDEState *s);
399 void ide_set_sector(IDEState *s, int64_t sector_num);
400 
401 void ide_start_dma(IDEState *s, BlockCompletionFunc *cb);
402 void dma_buf_commit(IDEState *s, uint32_t tx_bytes);
403 void ide_dma_error(IDEState *s);
404 void ide_abort_command(IDEState *s);
405 
406 void ide_atapi_cmd_ok(IDEState *s);
407 void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc);
408 void ide_atapi_dma_restart(IDEState *s);
409 void ide_atapi_io_error(IDEState *s, int ret);
410 
411 void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val);
412 uint32_t ide_ioport_read(void *opaque, uint32_t addr1);
413 uint32_t ide_status_read(void *opaque, uint32_t addr);
414 void ide_ctrl_write(void *opaque, uint32_t addr, uint32_t val);
415 void ide_data_writew(void *opaque, uint32_t addr, uint32_t val);
416 uint32_t ide_data_readw(void *opaque, uint32_t addr);
417 void ide_data_writel(void *opaque, uint32_t addr, uint32_t val);
418 uint32_t ide_data_readl(void *opaque, uint32_t addr);
419 
420 int ide_init_drive(IDEState *s, BlockBackend *blk, IDEDriveKind kind,
421                    const char *version, const char *serial, const char *model,
422                    uint64_t wwn,
423                    uint32_t cylinders, uint32_t heads, uint32_t secs,
424                    int chs_trans, Error **errp);
425 void ide_exit(IDEState *s);
426 void ide_bus_init_output_irq(IDEBus *bus, qemu_irq irq_out);
427 int ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2);
428 void ide_bus_set_irq(IDEBus *bus);
429 void ide_bus_register_restart_cb(IDEBus *bus);
430 
431 void ide_bus_exec_cmd(IDEBus *bus, uint32_t val);
432 
433 void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
434                         EndTransferFunc *end_transfer_func);
435 bool ide_transfer_start_norecurse(IDEState *s, uint8_t *buf, int size,
436                                   EndTransferFunc *end_transfer_func);
437 void ide_transfer_stop(IDEState *s);
438 void ide_set_inactive(IDEState *s, bool more);
439 BlockAIOCB *ide_issue_trim(
440         int64_t offset, QEMUIOVector *qiov,
441         BlockCompletionFunc *cb, void *cb_opaque, void *opaque);
442 BlockAIOCB *ide_buffered_readv(IDEState *s, int64_t sector_num,
443                                QEMUIOVector *iov, int nb_sectors,
444                                BlockCompletionFunc *cb, void *opaque);
445 void ide_cancel_dma_sync(IDEState *s);
446 
447 /* hw/ide/atapi.c */
448 void ide_atapi_cmd(IDEState *s);
449 void ide_atapi_cmd_reply_end(IDEState *s);
450 
451 int ide_handle_rw_error(IDEState *s, int error, int op);
452 
453 #endif /* HW_IDE_INTERNAL_H */
454