xref: /qemu/hw/ide/ide-internal.h (revision e29b124610f9b92c315e4655f52dec36d23de247)
1 #ifndef HW_IDE_INTERNAL_H
2 #define HW_IDE_INTERNAL_H
3 
4 /*
5  * QEMU IDE Emulation -- internal header file
6  * only files in hw/ide/ are supposed to include this file.
7  * non-internal declarations are in hw/ide.h
8  */
9 
10 #include "hw/ide.h"
11 #include "sysemu/dma.h"
12 #include "hw/block/block.h"
13 #include "exec/ioport.h"
14 
15 /* debug IDE devices */
16 #define USE_DMA_CDROM
17 #include "qom/object.h"
18 
19 typedef struct IDEDevice IDEDevice;
20 typedef struct IDEState IDEState;
21 typedef struct IDEDMA IDEDMA;
22 typedef struct IDEDMAOps IDEDMAOps;
23 
24 #define TYPE_IDE_BUS "IDE"
25 OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS)
26 
27 #define MAX_IDE_DEVS 2
28 
29 /* Device/Head ("select") Register */
30 #define ATA_DEV_SELECT          0x10
31 /* ATA1,3: Defined as '1'.
32  * ATA2:   Reserved.
33  * ATA3-7: obsolete. */
34 #define ATA_DEV_ALWAYS_ON       0xA0
35 #define ATA_DEV_LBA             0x40
36 #define ATA_DEV_LBA_MSB         0x0F  /* LBA 24:27 */
37 #define ATA_DEV_HS              0x0F  /* HS 3:0 */
38 
39 
40 /* Bits of HD_STATUS */
41 #define ERR_STAT		0x01
42 #define INDEX_STAT		0x02
43 #define ECC_STAT		0x04	/* Corrected error */
44 #define DRQ_STAT		0x08
45 #define SEEK_STAT		0x10
46 #define SRV_STAT		0x10
47 #define WRERR_STAT		0x20
48 #define READY_STAT		0x40
49 #define BUSY_STAT		0x80
50 
51 /* Bits for HD_ERROR */
52 #define MARK_ERR		0x01	/* Bad address mark */
53 #define TRK0_ERR		0x02	/* couldn't find track 0 */
54 #define ABRT_ERR		0x04	/* Command aborted */
55 #define MCR_ERR			0x08	/* media change request */
56 #define ID_ERR			0x10	/* ID field not found */
57 #define MC_ERR			0x20	/* media changed */
58 #define ECC_ERR			0x40	/* Uncorrectable ECC error */
59 #define BBD_ERR			0x80	/* pre-EIDE meaning:  block marked bad */
60 #define ICRC_ERR		0x80	/* new meaning:  CRC error during transfer */
61 
62 /* Bits of HD_NSECTOR */
63 #define CD			0x01
64 #define IO			0x02
65 #define REL			0x04
66 #define TAG_MASK		0xf8
67 
68 /* Bits of Device Control register */
69 #define IDE_CTRL_HOB            0x80
70 #define IDE_CTRL_RESET          0x04
71 #define IDE_CTRL_DISABLE_IRQ    0x02
72 
73 /* ACS-2 T13/2015-D Table B.2 Command codes */
74 #define WIN_NOP				0x00
75 /* reserved                             0x01..0x02 */
76 #define CFA_REQ_EXT_ERROR_CODE		0x03 /* CFA Request Extended Error Code */
77 /* reserved                             0x04..0x05 */
78 #define WIN_DSM                         0x06
79 /* reserved                             0x07 */
80 #define WIN_DEVICE_RESET		0x08
81 /* reserved                             0x09..0x0a */
82 /* REQUEST SENSE DATA EXT               0x0B */
83 /* reserved                             0x0C..0x0F */
84 #define WIN_RECAL                       0x10 /* obsolete since ATA4 */
85 /* obsolete since ATA3, retired in ATA4 0x11..0x1F */
86 #define WIN_READ			0x20 /* 28-Bit */
87 #define WIN_READ_ONCE                   0x21 /* 28-Bit w/o retries, obsolete since ATA5 */
88 /* obsolete since ATA4                  0x22..0x23 */
89 #define WIN_READ_EXT			0x24 /* 48-Bit */
90 #define WIN_READDMA_EXT			0x25 /* 48-Bit */
91 #define WIN_READDMA_QUEUED_EXT          0x26 /* 48-Bit, obsolete since ACS2 */
92 #define WIN_READ_NATIVE_MAX_EXT		0x27 /* 48-Bit */
93 /* reserved                             0x28 */
94 #define WIN_MULTREAD_EXT		0x29 /* 48-Bit */
95 /* READ STREAM DMA EXT                  0x2A */
96 /* READ STREAM EXT                      0x2B */
97 /* reserved                             0x2C..0x2E */
98 /* READ LOG EXT                         0x2F */
99 #define WIN_WRITE			0x30 /* 28-Bit */
100 #define WIN_WRITE_ONCE                  0x31 /* 28-Bit w/o retries, obsolete since ATA5 */
101 /* obsolete since ATA4                  0x32..0x33 */
102 #define WIN_WRITE_EXT			0x34 /* 48-Bit */
103 #define WIN_WRITEDMA_EXT		0x35 /* 48-Bit */
104 #define WIN_WRITEDMA_QUEUED_EXT		0x36 /* 48-Bit */
105 #define WIN_SET_MAX_EXT                 0x37 /* 48-Bit, obsolete since ACS2 */
106 #define WIN_SET_MAX_EXT			0x37 /* 48-Bit */
107 #define CFA_WRITE_SECT_WO_ERASE		0x38 /* CFA Write Sectors without erase */
108 #define WIN_MULTWRITE_EXT		0x39 /* 48-Bit */
109 /* WRITE STREAM DMA EXT                 0x3A */
110 /* WRITE STREAM EXT                     0x3B */
111 #define WIN_WRITE_VERIFY                0x3C /* 28-Bit, obsolete since ATA4 */
112 /* WRITE DMA FUA EXT                    0x3D */
113 /* obsolete since ACS2                  0x3E */
114 /* WRITE LOG EXT                        0x3F */
115 #define WIN_VERIFY			0x40 /* 28-Bit - Read Verify Sectors */
116 #define WIN_VERIFY_ONCE                 0x41 /* 28-Bit - w/o retries, obsolete since ATA5 */
117 #define WIN_VERIFY_EXT			0x42 /* 48-Bit */
118 /* reserved                             0x43..0x44 */
119 /* WRITE UNCORRECTABLE EXT              0x45 */
120 /* reserved                             0x46 */
121 /* READ LOG DMA EXT                     0x47 */
122 /* reserved                             0x48..0x4F */
123 /* obsolete since ATA4                  0x50 */
124 /* CONFIGURE STREAM                     0x51 */
125 /* reserved                             0x52..0x56 */
126 /* WRITE LOG DMA EXT                    0x57 */
127 /* reserved                             0x58..0x5A */
128 /* TRUSTED NON DATA                     0x5B */
129 /* TRUSTED RECEIVE                      0x5C */
130 /* TRUSTED RECEIVE DMA                  0x5D */
131 /* TRUSTED SEND                         0x5E */
132 /* TRUSTED SEND DMA                     0x5F */
133 /* READ FPDMA QUEUED                    0x60 */
134 /* WRITE FPDMA QUEUED                   0x61 */
135 /* reserved                             0x62->0x6F */
136 #define WIN_SEEK                        0x70 /* obsolete since ATA7 */
137 /* reserved                             0x71-0x7F */
138 /* vendor specific                      0x80-0x86 */
139 #define CFA_TRANSLATE_SECTOR		0x87 /* CFA Translate Sector */
140 /* vendor specific                      0x88-0x8F */
141 #define WIN_DIAGNOSE			0x90
142 #define WIN_SPECIFY                     0x91 /* set drive geometry translation, obsolete since ATA6 */
143 #define WIN_DOWNLOAD_MICROCODE		0x92
144 /* DOWNLOAD MICROCODE DMA               0x93 */
145 #define WIN_STANDBYNOW2                 0x94 /* retired in ATA4 */
146 #define WIN_IDLEIMMEDIATE2              0x95 /* force drive to become "ready", retired in ATA4 */
147 #define WIN_STANDBY2                    0x96 /* retired in ATA4 */
148 #define WIN_SETIDLE2                    0x97 /* retired in ATA4 */
149 #define WIN_CHECKPOWERMODE2             0x98 /* retired in ATA4 */
150 #define WIN_SLEEPNOW2                   0x99 /* retired in ATA4 */
151 /* vendor specific                      0x9A */
152 /* reserved                             0x9B..0x9F */
153 #define WIN_PACKETCMD			0xA0 /* Send a packet command. */
154 #define WIN_PIDENTIFY			0xA1 /* identify ATAPI device	*/
155 #define WIN_QUEUED_SERVICE              0xA2 /* obsolete since ACS2 */
156 /* reserved                             0xA3..0xAF */
157 #define WIN_SMART			0xB0 /* self-monitoring and reporting */
158 /* Device Configuration Overlay         0xB1 */
159 /* reserved                             0xB2..0xB3 */
160 /* Sanitize Device                      0xB4 */
161 /* reserved                             0xB5 */
162 /* NV Cache                             0xB6 */
163 /* reserved for CFA                     0xB7..0xBB */
164 #define CFA_ACCESS_METADATA_STORAGE	0xB8
165 /* reserved                             0xBC..0xBF */
166 #define CFA_ERASE_SECTORS       	0xC0 /* microdrives implement as NOP */
167 /* vendor specific                      0xC1..0xC3 */
168 #define WIN_MULTREAD			0xC4 /* read sectors using multiple mode*/
169 #define WIN_MULTWRITE			0xC5 /* write sectors using multiple mode */
170 #define WIN_SETMULT			0xC6 /* enable/disable multiple mode */
171 #define WIN_READDMA_QUEUED              0xC7 /* read sectors using Queued DMA transfers, obsolete since ACS2 */
172 #define WIN_READDMA			0xC8 /* read sectors using DMA transfers */
173 #define WIN_READDMA_ONCE                0xC9 /* 28-Bit - w/o retries, obsolete since ATA5 */
174 #define WIN_WRITEDMA			0xCA /* write sectors using DMA transfers */
175 #define WIN_WRITEDMA_ONCE               0xCB /* 28-Bit - w/o retries, obsolete since ATA5 */
176 #define WIN_WRITEDMA_QUEUED		0xCC /* write sectors using Queued DMA transfers, obsolete since ACS2 */
177 #define CFA_WRITE_MULTI_WO_ERASE	0xCD /* CFA Write multiple without erase */
178 /* WRITE MULTIPLE FUA EXT               0xCE */
179 /* reserved                             0xCF..0xDO */
180 /* CHECK MEDIA CARD TYPE                0xD1 */
181 /* reserved for media card pass through 0xD2..0xD4 */
182 /* reserved                             0xD5..0xD9 */
183 #define WIN_GETMEDIASTATUS              0xDA /* obsolete since ATA8 */
184 /* obsolete since ATA3, retired in ATA4 0xDB..0xDD */
185 #define WIN_DOORLOCK                    0xDE /* lock door on removable drives, obsolete since ATA8 */
186 #define WIN_DOORUNLOCK                  0xDF /* unlock door on removable drives, obsolete since ATA8 */
187 #define WIN_STANDBYNOW1			0xE0
188 #define WIN_IDLEIMMEDIATE		0xE1 /* force drive to become "ready" */
189 #define WIN_STANDBY             	0xE2 /* Set device in Standby Mode */
190 #define WIN_SETIDLE1			0xE3
191 #define WIN_READ_BUFFER			0xE4 /* force read only 1 sector */
192 #define WIN_CHECKPOWERMODE1		0xE5
193 #define WIN_SLEEPNOW1			0xE6
194 #define WIN_FLUSH_CACHE			0xE7
195 #define WIN_WRITE_BUFFER		0xE8 /* force write only 1 sector */
196 /* READ BUFFER DMA                      0xE9 */
197 #define WIN_FLUSH_CACHE_EXT		0xEA /* 48-Bit */
198 /* WRITE BUFFER DMA                     0xEB */
199 #define WIN_IDENTIFY			0xEC /* ask drive to identify itself	*/
200 #define WIN_MEDIAEJECT                  0xED /* obsolete since ATA8 */
201 /* obsolete since ATA4                  0xEE */
202 #define WIN_SETFEATURES			0xEF /* set special drive features */
203 #define IBM_SENSE_CONDITION             0xF0 /* measure disk temperature, vendor specific */
204 #define WIN_SECURITY_SET_PASS		0xF1
205 #define WIN_SECURITY_UNLOCK		0xF2
206 #define WIN_SECURITY_ERASE_PREPARE	0xF3
207 #define WIN_SECURITY_ERASE_UNIT		0xF4
208 #define WIN_SECURITY_FREEZE_LOCK	0xF5
209 #define CFA_WEAR_LEVEL                  0xF5 /* microdrives implement as NOP; not specified in T13! */
210 #define WIN_SECURITY_DISABLE		0xF6
211 /* vendor specific                      0xF7 */
212 #define WIN_READ_NATIVE_MAX		0xF8 /* return the native maximum address */
213 #define WIN_SET_MAX			0xF9
214 /* vendor specific                      0xFA..0xFF */
215 
216 /* set to 1 set disable mult support */
217 #define MAX_MULT_SECTORS 16
218 
219 #define IDE_DMA_BUF_SECTORS 256
220 
221 /* feature values for Data Set Management */
222 #define DSM_TRIM                        0x01
223 
224 #if (IDE_DMA_BUF_SECTORS < MAX_MULT_SECTORS)
225 #error "IDE_DMA_BUF_SECTORS must be bigger or equal to MAX_MULT_SECTORS"
226 #endif
227 
228 /* ATAPI defines */
229 
230 #define ATAPI_PACKET_SIZE 12
231 
232 /* The generic packet command opcodes for CD/DVD Logical Units,
233  * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
234 #define GPCMD_BLANK			    0xa1
235 #define GPCMD_CLOSE_TRACK		    0x5b
236 #define GPCMD_FLUSH_CACHE		    0x35
237 #define GPCMD_FORMAT_UNIT		    0x04
238 #define GPCMD_GET_CONFIGURATION		    0x46
239 #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
240 #define GPCMD_GET_PERFORMANCE		    0xac
241 #define GPCMD_INQUIRY			    0x12
242 #define GPCMD_LOAD_UNLOAD		    0xa6
243 #define GPCMD_MECHANISM_STATUS		    0xbd
244 #define GPCMD_MODE_SELECT_10		    0x55
245 #define GPCMD_MODE_SENSE_10		    0x5a
246 #define GPCMD_PAUSE_RESUME		    0x4b
247 #define GPCMD_PLAY_AUDIO_10		    0x45
248 #define GPCMD_PLAY_AUDIO_MSF		    0x47
249 #define GPCMD_PLAY_AUDIO_TI		    0x48
250 #define GPCMD_PLAY_CD			    0xbc
251 #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL  0x1e
252 #define GPCMD_READ_10			    0x28
253 #define GPCMD_READ_12			    0xa8
254 #define GPCMD_READ_CDVD_CAPACITY	    0x25
255 #define GPCMD_READ_CD			    0xbe
256 #define GPCMD_READ_CD_MSF		    0xb9
257 #define GPCMD_READ_DISC_INFO		    0x51
258 #define GPCMD_READ_DVD_STRUCTURE	    0xad
259 #define GPCMD_READ_FORMAT_CAPACITIES	    0x23
260 #define GPCMD_READ_HEADER		    0x44
261 #define GPCMD_READ_TRACK_RZONE_INFO	    0x52
262 #define GPCMD_READ_SUBCHANNEL		    0x42
263 #define GPCMD_READ_TOC_PMA_ATIP		    0x43
264 #define GPCMD_REPAIR_RZONE_TRACK	    0x58
265 #define GPCMD_REPORT_KEY		    0xa4
266 #define GPCMD_REQUEST_SENSE		    0x03
267 #define GPCMD_RESERVE_RZONE_TRACK	    0x53
268 #define GPCMD_SCAN			    0xba
269 #define GPCMD_SEEK			    0x2b
270 #define GPCMD_SEND_DVD_STRUCTURE	    0xad
271 #define GPCMD_SEND_EVENT		    0xa2
272 #define GPCMD_SEND_KEY			    0xa3
273 #define GPCMD_SEND_OPC			    0x54
274 #define GPCMD_SET_READ_AHEAD		    0xa7
275 #define GPCMD_SET_STREAMING		    0xb6
276 #define GPCMD_START_STOP_UNIT		    0x1b
277 #define GPCMD_STOP_PLAY_SCAN		    0x4e
278 #define GPCMD_TEST_UNIT_READY		    0x00
279 #define GPCMD_VERIFY_10			    0x2f
280 #define GPCMD_WRITE_10			    0x2a
281 #define GPCMD_WRITE_AND_VERIFY_10	    0x2e
282 /* This is listed as optional in ATAPI 2.6, but is (curiously)
283  * missing from Mt. Fuji, Table 57.  It _is_ mentioned in Mt. Fuji
284  * Table 377 as an MMC command for SCSi devices though...  Most ATAPI
285  * drives support it. */
286 #define GPCMD_SET_SPEED			    0xbb
287 /* This seems to be a SCSI specific CD-ROM opcode
288  * to play data at track/index */
289 #define GPCMD_PLAYAUDIO_TI		    0x48
290 /*
291  * From MS Media Status Notification Support Specification. For
292  * older drives only.
293  */
294 #define GPCMD_GET_MEDIA_STATUS		    0xda
295 #define GPCMD_MODE_SENSE_6		    0x1a
296 
297 #define ATAPI_INT_REASON_CD             0x01 /* 0 = data transfer */
298 #define ATAPI_INT_REASON_IO             0x02 /* 1 = transfer to the host */
299 #define ATAPI_INT_REASON_REL            0x04
300 #define ATAPI_INT_REASON_TAG            0xf8
301 
302 /* same constants as bochs */
303 #define ASC_NO_SEEK_COMPLETE                 0x02
304 #define ASC_ILLEGAL_OPCODE                   0x20
305 #define ASC_LOGICAL_BLOCK_OOR                0x21
306 #define ASC_INV_FIELD_IN_CMD_PACKET          0x24
307 #define ASC_MEDIUM_MAY_HAVE_CHANGED          0x28
308 #define ASC_INCOMPATIBLE_FORMAT              0x30
309 #define ASC_MEDIUM_NOT_PRESENT               0x3a
310 #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED  0x39
311 #define ASC_DATA_PHASE_ERROR                 0x4b
312 #define ASC_MEDIA_REMOVAL_PREVENTED          0x53
313 
314 #define CFA_NO_ERROR            0x00
315 #define CFA_MISC_ERROR          0x09
316 #define CFA_INVALID_COMMAND     0x20
317 #define CFA_INVALID_ADDRESS     0x21
318 #define CFA_ADDRESS_OVERFLOW    0x2f
319 
320 #define SMART_READ_DATA       0xd0
321 #define SMART_READ_THRESH     0xd1
322 #define SMART_ATTR_AUTOSAVE   0xd2
323 #define SMART_SAVE_ATTR       0xd3
324 #define SMART_EXECUTE_OFFLINE 0xd4
325 #define SMART_READ_LOG        0xd5
326 #define SMART_WRITE_LOG       0xd6
327 #define SMART_ENABLE          0xd8
328 #define SMART_DISABLE         0xd9
329 #define SMART_STATUS          0xda
330 
331 typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind;
332 
333 typedef void EndTransferFunc(IDEState *);
334 
335 typedef void DMAStartFunc(const IDEDMA *, IDEState *, BlockCompletionFunc *);
336 typedef void DMAVoidFunc(const IDEDMA *);
337 typedef int DMAIntFunc(const IDEDMA *, bool);
338 typedef int32_t DMAInt32Func(const IDEDMA *, int32_t len);
339 typedef void DMAu32Func(const IDEDMA *, uint32_t);
340 typedef void DMAStopFunc(const IDEDMA *, bool);
341 
342 struct unreported_events {
343     bool eject_request;
344     bool new_media;
345 };
346 
347 enum ide_dma_cmd {
348     IDE_DMA_READ = 0,
349     IDE_DMA_WRITE,
350     IDE_DMA_TRIM,
351     IDE_DMA_ATAPI,
352     IDE_DMA__COUNT
353 };
354 
355 extern const char *IDE_DMA_CMD_lookup[IDE_DMA__COUNT];
356 
357 #define ide_cmd_is_read(s) \
358         ((s)->dma_cmd == IDE_DMA_READ)
359 
360 typedef struct IDEBufferedRequest {
361     QLIST_ENTRY(IDEBufferedRequest) list;
362     QEMUIOVector qiov;
363     QEMUIOVector *original_qiov;
364     BlockCompletionFunc *original_cb;
365     void *original_opaque;
366     bool orphaned;
367 } IDEBufferedRequest;
368 
369 /* NOTE: IDEState represents in fact one drive */
370 struct IDEState {
371     IDEBus *bus;
372     uint8_t unit;
373     /* ide config */
374     IDEDriveKind drive_kind;
375     int drive_heads, drive_sectors;
376     int cylinders, heads, sectors, chs_trans;
377     int64_t nb_sectors;
378     int mult_sectors;
379     int identify_set;
380     uint8_t identify_data[512];
381     int drive_serial;
382     char drive_serial_str[21];
383     char drive_model_str[41];
384     uint64_t wwn;
385     /* ide regs */
386     uint8_t feature;
387     uint8_t error;
388     uint32_t nsector;
389     uint8_t sector;
390     uint8_t lcyl;
391     uint8_t hcyl;
392     /* other part of tf for lba48 support */
393     uint8_t hob_feature;
394     uint8_t hob_nsector;
395     uint8_t hob_sector;
396     uint8_t hob_lcyl;
397     uint8_t hob_hcyl;
398 
399     uint8_t select;
400     uint8_t status;
401 
402     bool io8;
403     bool reset_reverts;
404 
405     /* set for lba48 access */
406     uint8_t lba48;
407     BlockBackend *blk;
408     char version[9];
409     /* ATAPI specific */
410     struct unreported_events events;
411     uint8_t sense_key;
412     uint8_t asc;
413     bool tray_open;
414     bool tray_locked;
415     uint8_t cdrom_changed;
416     int packet_transfer_size;
417     int elementary_transfer_size;
418     int32_t io_buffer_index;
419     int lba;
420     int cd_sector_size;
421     int atapi_dma; /* true if dma is requested for the packet cmd */
422     BlockAcctCookie acct;
423     BlockAIOCB *pio_aiocb;
424     QEMUIOVector qiov;
425     QLIST_HEAD(, IDEBufferedRequest) buffered_requests;
426     /* ATA DMA state */
427     uint64_t io_buffer_offset;
428     int32_t io_buffer_size;
429     QEMUSGList sg;
430     /* PIO transfer handling */
431     int req_nb_sectors; /* number of sectors per interrupt */
432     EndTransferFunc *end_transfer_func;
433     uint8_t *data_ptr;
434     uint8_t *data_end;
435     uint8_t *io_buffer;
436     /* PIO save/restore */
437     int32_t io_buffer_total_len;
438     int32_t cur_io_buffer_offset;
439     int32_t cur_io_buffer_len;
440     uint8_t end_transfer_fn_idx;
441     QEMUTimer *sector_write_timer; /* only used for win2k install hack */
442     uint32_t irq_count; /* counts IRQs when using win2k install hack */
443     /* CF-ATA extended error */
444     uint8_t ext_error;
445     /* CF-ATA metadata storage */
446     uint32_t mdata_size;
447     uint8_t *mdata_storage;
448     int media_changed;
449     enum ide_dma_cmd dma_cmd;
450     /* SMART */
451     uint8_t smart_enabled;
452     uint8_t smart_autosave;
453     int smart_errors;
454     uint8_t smart_selftest_count;
455     uint8_t *smart_selftest_data;
456     /* AHCI */
457     int ncq_queues;
458 };
459 
460 struct IDEDMAOps {
461     DMAStartFunc *start_dma;
462     DMAVoidFunc *pio_transfer;
463     DMAInt32Func *prepare_buf;
464     DMAu32Func *commit_buf;
465     DMAIntFunc *rw_buf;
466     DMAVoidFunc *restart;
467     DMAVoidFunc *restart_dma;
468     DMAStopFunc *set_inactive;
469     DMAVoidFunc *cmd_done;
470     DMAVoidFunc *reset;
471 };
472 
473 struct IDEDMA {
474     const struct IDEDMAOps *ops;
475     QEMUIOVector qiov;
476     BlockAIOCB *aiocb;
477 };
478 
479 struct IDEBus {
480     BusState qbus;
481     IDEDevice *master;
482     IDEDevice *slave;
483     IDEState ifs[2];
484     QEMUBH *bh;
485 
486     int bus_id;
487     int max_units;
488     IDEDMA *dma;
489     uint8_t unit;
490     uint8_t cmd;
491     qemu_irq irq;
492 
493     int error_status;
494     uint8_t retry_unit;
495     int64_t retry_sector_num;
496     uint32_t retry_nsector;
497     PortioList portio_list;
498     PortioList portio2_list;
499     VMChangeStateEntry *vmstate;
500 };
501 
502 #define TYPE_IDE_DEVICE "ide-device"
503 OBJECT_DECLARE_TYPE(IDEDevice, IDEDeviceClass, IDE_DEVICE)
504 
505 struct IDEDeviceClass {
506     DeviceClass parent_class;
507     void (*realize)(IDEDevice *dev, Error **errp);
508 };
509 
510 struct IDEDevice {
511     DeviceState qdev;
512     uint32_t unit;
513     BlockConf conf;
514     int chs_trans;
515     char *version;
516     char *serial;
517     char *model;
518     uint64_t wwn;
519     /*
520      * 0x0000        - rotation rate not reported
521      * 0x0001        - non-rotating medium (SSD)
522      * 0x0002-0x0400 - reserved
523      * 0x0401-0xffe  - rotations per minute
524      * 0xffff        - reserved
525      */
526     uint16_t rotation_rate;
527 };
528 
529 /* These are used for the error_status field of IDEBus */
530 #define IDE_RETRY_MASK 0xf8
531 #define IDE_RETRY_DMA  0x08
532 #define IDE_RETRY_PIO  0x10
533 #define IDE_RETRY_ATAPI 0x20 /* reused IDE_RETRY_READ bit */
534 #define IDE_RETRY_READ  0x20
535 #define IDE_RETRY_FLUSH 0x40
536 #define IDE_RETRY_TRIM 0x80
537 #define IDE_RETRY_HBA  0x100
538 
539 #define IS_IDE_RETRY_DMA(_status) \
540     ((_status) & IDE_RETRY_DMA)
541 
542 #define IS_IDE_RETRY_PIO(_status) \
543     ((_status) & IDE_RETRY_PIO)
544 
545 /*
546  * The method of the IDE_RETRY_ATAPI determination is to use a previously
547  * impossible bit combination as a new status value.
548  */
549 #define IS_IDE_RETRY_ATAPI(_status)   \
550     (((_status) & IDE_RETRY_MASK) == IDE_RETRY_ATAPI)
551 
552 static inline uint8_t ide_dma_cmd_to_retry(uint8_t dma_cmd)
553 {
554     switch (dma_cmd) {
555     case IDE_DMA_READ:
556         return IDE_RETRY_DMA | IDE_RETRY_READ;
557     case IDE_DMA_WRITE:
558         return IDE_RETRY_DMA;
559     case IDE_DMA_TRIM:
560         return IDE_RETRY_DMA | IDE_RETRY_TRIM;
561     case IDE_DMA_ATAPI:
562         return IDE_RETRY_ATAPI;
563     default:
564         break;
565     }
566     return 0;
567 }
568 
569 static inline IDEState *idebus_active_if(IDEBus *bus)
570 {
571     return bus->ifs + bus->unit;
572 }
573 
574 /* hw/ide/core.c */
575 extern const VMStateDescription vmstate_ide_bus;
576 
577 #define VMSTATE_IDE_BUS(_field, _state)                          \
578     VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_bus, IDEBus)
579 
580 #define VMSTATE_IDE_BUS_ARRAY(_field, _state, _num)              \
581     VMSTATE_STRUCT_ARRAY(_field, _state, _num, 1, vmstate_ide_bus, IDEBus)
582 
583 extern const VMStateDescription vmstate_ide_drive;
584 
585 #define VMSTATE_IDE_DRIVES(_field, _state) \
586     VMSTATE_STRUCT_ARRAY(_field, _state, 2, 3, vmstate_ide_drive, IDEState)
587 
588 #define VMSTATE_IDE_DRIVE(_field, _state) \
589     VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_drive, IDEState)
590 
591 void ide_bus_reset(IDEBus *bus);
592 int64_t ide_get_sector(IDEState *s);
593 void ide_set_sector(IDEState *s, int64_t sector_num);
594 
595 void ide_start_dma(IDEState *s, BlockCompletionFunc *cb);
596 void dma_buf_commit(IDEState *s, uint32_t tx_bytes);
597 void ide_dma_error(IDEState *s);
598 void ide_abort_command(IDEState *s);
599 
600 void ide_atapi_cmd_ok(IDEState *s);
601 void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc);
602 void ide_atapi_dma_restart(IDEState *s);
603 void ide_atapi_io_error(IDEState *s, int ret);
604 
605 void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val);
606 uint32_t ide_ioport_read(void *opaque, uint32_t addr1);
607 uint32_t ide_status_read(void *opaque, uint32_t addr);
608 void ide_ctrl_write(void *opaque, uint32_t addr, uint32_t val);
609 void ide_data_writew(void *opaque, uint32_t addr, uint32_t val);
610 uint32_t ide_data_readw(void *opaque, uint32_t addr);
611 void ide_data_writel(void *opaque, uint32_t addr, uint32_t val);
612 uint32_t ide_data_readl(void *opaque, uint32_t addr);
613 
614 int ide_init_drive(IDEState *s, BlockBackend *blk, IDEDriveKind kind,
615                    const char *version, const char *serial, const char *model,
616                    uint64_t wwn,
617                    uint32_t cylinders, uint32_t heads, uint32_t secs,
618                    int chs_trans, Error **errp);
619 void ide_init2(IDEBus *bus, qemu_irq irq);
620 void ide_exit(IDEState *s);
621 int ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2);
622 void ide_bus_set_irq(IDEBus *bus);
623 void ide_bus_register_restart_cb(IDEBus *bus);
624 
625 void ide_exec_cmd(IDEBus *bus, uint32_t val);
626 
627 void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
628                         EndTransferFunc *end_transfer_func);
629 bool ide_transfer_start_norecurse(IDEState *s, uint8_t *buf, int size,
630                                   EndTransferFunc *end_transfer_func);
631 void ide_transfer_stop(IDEState *s);
632 void ide_set_inactive(IDEState *s, bool more);
633 BlockAIOCB *ide_issue_trim(
634         int64_t offset, QEMUIOVector *qiov,
635         BlockCompletionFunc *cb, void *cb_opaque, void *opaque);
636 BlockAIOCB *ide_buffered_readv(IDEState *s, int64_t sector_num,
637                                QEMUIOVector *iov, int nb_sectors,
638                                BlockCompletionFunc *cb, void *opaque);
639 void ide_cancel_dma_sync(IDEState *s);
640 
641 /* hw/ide/atapi.c */
642 void ide_atapi_cmd(IDEState *s);
643 void ide_atapi_cmd_reply_end(IDEState *s);
644 
645 /* hw/ide/qdev.c */
646 void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev,
647                   int bus_id, int max_units);
648 IDEDevice *ide_bus_create_drive(IDEBus *bus, int unit, DriveInfo *drive);
649 
650 int ide_handle_rw_error(IDEState *s, int error, int op);
651 
652 #endif /* HW_IDE_INTERNAL_H */
653