xref: /qemu/hw/ide/ide-internal.h (revision 989bc90b2c5fe6f3144de0c54a1678bbc3ef505c)
1 #ifndef HW_IDE_INTERNAL_H
2 #define HW_IDE_INTERNAL_H
3 
4 /*
5  * QEMU IDE Emulation -- internal header file
6  * only files in hw/ide/ are supposed to include this file.
7  * non-internal declarations are in hw/ide.h
8  */
9 
10 #include "hw/ide.h"
11 #include "hw/irq.h"
12 #include "hw/isa/isa.h"
13 #include "sysemu/dma.h"
14 #include "hw/block/block.h"
15 
16 /* debug IDE devices */
17 #define USE_DMA_CDROM
18 #include "qom/object.h"
19 
20 typedef struct IDEDevice IDEDevice;
21 typedef struct IDEState IDEState;
22 typedef struct IDEDMA IDEDMA;
23 typedef struct IDEDMAOps IDEDMAOps;
24 
25 #define TYPE_IDE_BUS "IDE"
26 OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS)
27 
28 #define MAX_IDE_DEVS 2
29 
30 /* Device/Head ("select") Register */
31 #define ATA_DEV_SELECT          0x10
32 /* ATA1,3: Defined as '1'.
33  * ATA2:   Reserved.
34  * ATA3-7: obsolete. */
35 #define ATA_DEV_ALWAYS_ON       0xA0
36 #define ATA_DEV_LBA             0x40
37 #define ATA_DEV_LBA_MSB         0x0F  /* LBA 24:27 */
38 #define ATA_DEV_HS              0x0F  /* HS 3:0 */
39 
40 
41 /* Bits of HD_STATUS */
42 #define ERR_STAT		0x01
43 #define INDEX_STAT		0x02
44 #define ECC_STAT		0x04	/* Corrected error */
45 #define DRQ_STAT		0x08
46 #define SEEK_STAT		0x10
47 #define SRV_STAT		0x10
48 #define WRERR_STAT		0x20
49 #define READY_STAT		0x40
50 #define BUSY_STAT		0x80
51 
52 /* Bits for HD_ERROR */
53 #define MARK_ERR		0x01	/* Bad address mark */
54 #define TRK0_ERR		0x02	/* couldn't find track 0 */
55 #define ABRT_ERR		0x04	/* Command aborted */
56 #define MCR_ERR			0x08	/* media change request */
57 #define ID_ERR			0x10	/* ID field not found */
58 #define MC_ERR			0x20	/* media changed */
59 #define ECC_ERR			0x40	/* Uncorrectable ECC error */
60 #define BBD_ERR			0x80	/* pre-EIDE meaning:  block marked bad */
61 #define ICRC_ERR		0x80	/* new meaning:  CRC error during transfer */
62 
63 /* Bits of HD_NSECTOR */
64 #define CD			0x01
65 #define IO			0x02
66 #define REL			0x04
67 #define TAG_MASK		0xf8
68 
69 /* Bits of Device Control register */
70 #define IDE_CTRL_HOB            0x80
71 #define IDE_CTRL_RESET          0x04
72 #define IDE_CTRL_DISABLE_IRQ    0x02
73 
74 /* ACS-2 T13/2015-D Table B.2 Command codes */
75 #define WIN_NOP				0x00
76 /* reserved                             0x01..0x02 */
77 #define CFA_REQ_EXT_ERROR_CODE		0x03 /* CFA Request Extended Error Code */
78 /* reserved                             0x04..0x05 */
79 #define WIN_DSM                         0x06
80 /* reserved                             0x07 */
81 #define WIN_DEVICE_RESET		0x08
82 /* reserved                             0x09..0x0a */
83 /* REQUEST SENSE DATA EXT               0x0B */
84 /* reserved                             0x0C..0x0F */
85 #define WIN_RECAL                       0x10 /* obsolete since ATA4 */
86 /* obsolete since ATA3, retired in ATA4 0x11..0x1F */
87 #define WIN_READ			0x20 /* 28-Bit */
88 #define WIN_READ_ONCE                   0x21 /* 28-Bit w/o retries, obsolete since ATA5 */
89 /* obsolete since ATA4                  0x22..0x23 */
90 #define WIN_READ_EXT			0x24 /* 48-Bit */
91 #define WIN_READDMA_EXT			0x25 /* 48-Bit */
92 #define WIN_READDMA_QUEUED_EXT          0x26 /* 48-Bit, obsolete since ACS2 */
93 #define WIN_READ_NATIVE_MAX_EXT		0x27 /* 48-Bit */
94 /* reserved                             0x28 */
95 #define WIN_MULTREAD_EXT		0x29 /* 48-Bit */
96 /* READ STREAM DMA EXT                  0x2A */
97 /* READ STREAM EXT                      0x2B */
98 /* reserved                             0x2C..0x2E */
99 /* READ LOG EXT                         0x2F */
100 #define WIN_WRITE			0x30 /* 28-Bit */
101 #define WIN_WRITE_ONCE                  0x31 /* 28-Bit w/o retries, obsolete since ATA5 */
102 /* obsolete since ATA4                  0x32..0x33 */
103 #define WIN_WRITE_EXT			0x34 /* 48-Bit */
104 #define WIN_WRITEDMA_EXT		0x35 /* 48-Bit */
105 #define WIN_WRITEDMA_QUEUED_EXT		0x36 /* 48-Bit */
106 #define WIN_SET_MAX_EXT                 0x37 /* 48-Bit, obsolete since ACS2 */
107 #define WIN_SET_MAX_EXT			0x37 /* 48-Bit */
108 #define CFA_WRITE_SECT_WO_ERASE		0x38 /* CFA Write Sectors without erase */
109 #define WIN_MULTWRITE_EXT		0x39 /* 48-Bit */
110 /* WRITE STREAM DMA EXT                 0x3A */
111 /* WRITE STREAM EXT                     0x3B */
112 #define WIN_WRITE_VERIFY                0x3C /* 28-Bit, obsolete since ATA4 */
113 /* WRITE DMA FUA EXT                    0x3D */
114 /* obsolete since ACS2                  0x3E */
115 /* WRITE LOG EXT                        0x3F */
116 #define WIN_VERIFY			0x40 /* 28-Bit - Read Verify Sectors */
117 #define WIN_VERIFY_ONCE                 0x41 /* 28-Bit - w/o retries, obsolete since ATA5 */
118 #define WIN_VERIFY_EXT			0x42 /* 48-Bit */
119 /* reserved                             0x43..0x44 */
120 /* WRITE UNCORRECTABLE EXT              0x45 */
121 /* reserved                             0x46 */
122 /* READ LOG DMA EXT                     0x47 */
123 /* reserved                             0x48..0x4F */
124 /* obsolete since ATA4                  0x50 */
125 /* CONFIGURE STREAM                     0x51 */
126 /* reserved                             0x52..0x56 */
127 /* WRITE LOG DMA EXT                    0x57 */
128 /* reserved                             0x58..0x5A */
129 /* TRUSTED NON DATA                     0x5B */
130 /* TRUSTED RECEIVE                      0x5C */
131 /* TRUSTED RECEIVE DMA                  0x5D */
132 /* TRUSTED SEND                         0x5E */
133 /* TRUSTED SEND DMA                     0x5F */
134 /* READ FPDMA QUEUED                    0x60 */
135 /* WRITE FPDMA QUEUED                   0x61 */
136 /* reserved                             0x62->0x6F */
137 #define WIN_SEEK                        0x70 /* obsolete since ATA7 */
138 /* reserved                             0x71-0x7F */
139 /* vendor specific                      0x80-0x86 */
140 #define CFA_TRANSLATE_SECTOR		0x87 /* CFA Translate Sector */
141 /* vendor specific                      0x88-0x8F */
142 #define WIN_DIAGNOSE			0x90
143 #define WIN_SPECIFY                     0x91 /* set drive geometry translation, obsolete since ATA6 */
144 #define WIN_DOWNLOAD_MICROCODE		0x92
145 /* DOWNLOAD MICROCODE DMA               0x93 */
146 #define WIN_STANDBYNOW2                 0x94 /* retired in ATA4 */
147 #define WIN_IDLEIMMEDIATE2              0x95 /* force drive to become "ready", retired in ATA4 */
148 #define WIN_STANDBY2                    0x96 /* retired in ATA4 */
149 #define WIN_SETIDLE2                    0x97 /* retired in ATA4 */
150 #define WIN_CHECKPOWERMODE2             0x98 /* retired in ATA4 */
151 #define WIN_SLEEPNOW2                   0x99 /* retired in ATA4 */
152 /* vendor specific                      0x9A */
153 /* reserved                             0x9B..0x9F */
154 #define WIN_PACKETCMD			0xA0 /* Send a packet command. */
155 #define WIN_PIDENTIFY			0xA1 /* identify ATAPI device	*/
156 #define WIN_QUEUED_SERVICE              0xA2 /* obsolete since ACS2 */
157 /* reserved                             0xA3..0xAF */
158 #define WIN_SMART			0xB0 /* self-monitoring and reporting */
159 /* Device Configuration Overlay         0xB1 */
160 /* reserved                             0xB2..0xB3 */
161 /* Sanitize Device                      0xB4 */
162 /* reserved                             0xB5 */
163 /* NV Cache                             0xB6 */
164 /* reserved for CFA                     0xB7..0xBB */
165 #define CFA_ACCESS_METADATA_STORAGE	0xB8
166 /* reserved                             0xBC..0xBF */
167 #define CFA_ERASE_SECTORS       	0xC0 /* microdrives implement as NOP */
168 /* vendor specific                      0xC1..0xC3 */
169 #define WIN_MULTREAD			0xC4 /* read sectors using multiple mode*/
170 #define WIN_MULTWRITE			0xC5 /* write sectors using multiple mode */
171 #define WIN_SETMULT			0xC6 /* enable/disable multiple mode */
172 #define WIN_READDMA_QUEUED              0xC7 /* read sectors using Queued DMA transfers, obsolete since ACS2 */
173 #define WIN_READDMA			0xC8 /* read sectors using DMA transfers */
174 #define WIN_READDMA_ONCE                0xC9 /* 28-Bit - w/o retries, obsolete since ATA5 */
175 #define WIN_WRITEDMA			0xCA /* write sectors using DMA transfers */
176 #define WIN_WRITEDMA_ONCE               0xCB /* 28-Bit - w/o retries, obsolete since ATA5 */
177 #define WIN_WRITEDMA_QUEUED		0xCC /* write sectors using Queued DMA transfers, obsolete since ACS2 */
178 #define CFA_WRITE_MULTI_WO_ERASE	0xCD /* CFA Write multiple without erase */
179 /* WRITE MULTIPLE FUA EXT               0xCE */
180 /* reserved                             0xCF..0xDO */
181 /* CHECK MEDIA CARD TYPE                0xD1 */
182 /* reserved for media card pass through 0xD2..0xD4 */
183 /* reserved                             0xD5..0xD9 */
184 #define WIN_GETMEDIASTATUS              0xDA /* obsolete since ATA8 */
185 /* obsolete since ATA3, retired in ATA4 0xDB..0xDD */
186 #define WIN_DOORLOCK                    0xDE /* lock door on removable drives, obsolete since ATA8 */
187 #define WIN_DOORUNLOCK                  0xDF /* unlock door on removable drives, obsolete since ATA8 */
188 #define WIN_STANDBYNOW1			0xE0
189 #define WIN_IDLEIMMEDIATE		0xE1 /* force drive to become "ready" */
190 #define WIN_STANDBY             	0xE2 /* Set device in Standby Mode */
191 #define WIN_SETIDLE1			0xE3
192 #define WIN_READ_BUFFER			0xE4 /* force read only 1 sector */
193 #define WIN_CHECKPOWERMODE1		0xE5
194 #define WIN_SLEEPNOW1			0xE6
195 #define WIN_FLUSH_CACHE			0xE7
196 #define WIN_WRITE_BUFFER		0xE8 /* force write only 1 sector */
197 /* READ BUFFER DMA                      0xE9 */
198 #define WIN_FLUSH_CACHE_EXT		0xEA /* 48-Bit */
199 /* WRITE BUFFER DMA                     0xEB */
200 #define WIN_IDENTIFY			0xEC /* ask drive to identify itself	*/
201 #define WIN_MEDIAEJECT                  0xED /* obsolete since ATA8 */
202 /* obsolete since ATA4                  0xEE */
203 #define WIN_SETFEATURES			0xEF /* set special drive features */
204 #define IBM_SENSE_CONDITION             0xF0 /* measure disk temperature, vendor specific */
205 #define WIN_SECURITY_SET_PASS		0xF1
206 #define WIN_SECURITY_UNLOCK		0xF2
207 #define WIN_SECURITY_ERASE_PREPARE	0xF3
208 #define WIN_SECURITY_ERASE_UNIT		0xF4
209 #define WIN_SECURITY_FREEZE_LOCK	0xF5
210 #define CFA_WEAR_LEVEL                  0xF5 /* microdrives implement as NOP; not specified in T13! */
211 #define WIN_SECURITY_DISABLE		0xF6
212 /* vendor specific                      0xF7 */
213 #define WIN_READ_NATIVE_MAX		0xF8 /* return the native maximum address */
214 #define WIN_SET_MAX			0xF9
215 /* vendor specific                      0xFA..0xFF */
216 
217 /* set to 1 set disable mult support */
218 #define MAX_MULT_SECTORS 16
219 
220 #define IDE_DMA_BUF_SECTORS 256
221 
222 /* feature values for Data Set Management */
223 #define DSM_TRIM                        0x01
224 
225 #if (IDE_DMA_BUF_SECTORS < MAX_MULT_SECTORS)
226 #error "IDE_DMA_BUF_SECTORS must be bigger or equal to MAX_MULT_SECTORS"
227 #endif
228 
229 /* ATAPI defines */
230 
231 #define ATAPI_PACKET_SIZE 12
232 
233 /* The generic packet command opcodes for CD/DVD Logical Units,
234  * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
235 #define GPCMD_BLANK			    0xa1
236 #define GPCMD_CLOSE_TRACK		    0x5b
237 #define GPCMD_FLUSH_CACHE		    0x35
238 #define GPCMD_FORMAT_UNIT		    0x04
239 #define GPCMD_GET_CONFIGURATION		    0x46
240 #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
241 #define GPCMD_GET_PERFORMANCE		    0xac
242 #define GPCMD_INQUIRY			    0x12
243 #define GPCMD_LOAD_UNLOAD		    0xa6
244 #define GPCMD_MECHANISM_STATUS		    0xbd
245 #define GPCMD_MODE_SELECT_10		    0x55
246 #define GPCMD_MODE_SENSE_10		    0x5a
247 #define GPCMD_PAUSE_RESUME		    0x4b
248 #define GPCMD_PLAY_AUDIO_10		    0x45
249 #define GPCMD_PLAY_AUDIO_MSF		    0x47
250 #define GPCMD_PLAY_AUDIO_TI		    0x48
251 #define GPCMD_PLAY_CD			    0xbc
252 #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL  0x1e
253 #define GPCMD_READ_10			    0x28
254 #define GPCMD_READ_12			    0xa8
255 #define GPCMD_READ_CDVD_CAPACITY	    0x25
256 #define GPCMD_READ_CD			    0xbe
257 #define GPCMD_READ_CD_MSF		    0xb9
258 #define GPCMD_READ_DISC_INFO		    0x51
259 #define GPCMD_READ_DVD_STRUCTURE	    0xad
260 #define GPCMD_READ_FORMAT_CAPACITIES	    0x23
261 #define GPCMD_READ_HEADER		    0x44
262 #define GPCMD_READ_TRACK_RZONE_INFO	    0x52
263 #define GPCMD_READ_SUBCHANNEL		    0x42
264 #define GPCMD_READ_TOC_PMA_ATIP		    0x43
265 #define GPCMD_REPAIR_RZONE_TRACK	    0x58
266 #define GPCMD_REPORT_KEY		    0xa4
267 #define GPCMD_REQUEST_SENSE		    0x03
268 #define GPCMD_RESERVE_RZONE_TRACK	    0x53
269 #define GPCMD_SCAN			    0xba
270 #define GPCMD_SEEK			    0x2b
271 #define GPCMD_SEND_DVD_STRUCTURE	    0xad
272 #define GPCMD_SEND_EVENT		    0xa2
273 #define GPCMD_SEND_KEY			    0xa3
274 #define GPCMD_SEND_OPC			    0x54
275 #define GPCMD_SET_READ_AHEAD		    0xa7
276 #define GPCMD_SET_STREAMING		    0xb6
277 #define GPCMD_START_STOP_UNIT		    0x1b
278 #define GPCMD_STOP_PLAY_SCAN		    0x4e
279 #define GPCMD_TEST_UNIT_READY		    0x00
280 #define GPCMD_VERIFY_10			    0x2f
281 #define GPCMD_WRITE_10			    0x2a
282 #define GPCMD_WRITE_AND_VERIFY_10	    0x2e
283 /* This is listed as optional in ATAPI 2.6, but is (curiously)
284  * missing from Mt. Fuji, Table 57.  It _is_ mentioned in Mt. Fuji
285  * Table 377 as an MMC command for SCSi devices though...  Most ATAPI
286  * drives support it. */
287 #define GPCMD_SET_SPEED			    0xbb
288 /* This seems to be a SCSI specific CD-ROM opcode
289  * to play data at track/index */
290 #define GPCMD_PLAYAUDIO_TI		    0x48
291 /*
292  * From MS Media Status Notification Support Specification. For
293  * older drives only.
294  */
295 #define GPCMD_GET_MEDIA_STATUS		    0xda
296 #define GPCMD_MODE_SENSE_6		    0x1a
297 
298 #define ATAPI_INT_REASON_CD             0x01 /* 0 = data transfer */
299 #define ATAPI_INT_REASON_IO             0x02 /* 1 = transfer to the host */
300 #define ATAPI_INT_REASON_REL            0x04
301 #define ATAPI_INT_REASON_TAG            0xf8
302 
303 /* same constants as bochs */
304 #define ASC_NO_SEEK_COMPLETE                 0x02
305 #define ASC_ILLEGAL_OPCODE                   0x20
306 #define ASC_LOGICAL_BLOCK_OOR                0x21
307 #define ASC_INV_FIELD_IN_CMD_PACKET          0x24
308 #define ASC_MEDIUM_MAY_HAVE_CHANGED          0x28
309 #define ASC_INCOMPATIBLE_FORMAT              0x30
310 #define ASC_MEDIUM_NOT_PRESENT               0x3a
311 #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED  0x39
312 #define ASC_DATA_PHASE_ERROR                 0x4b
313 #define ASC_MEDIA_REMOVAL_PREVENTED          0x53
314 
315 #define CFA_NO_ERROR            0x00
316 #define CFA_MISC_ERROR          0x09
317 #define CFA_INVALID_COMMAND     0x20
318 #define CFA_INVALID_ADDRESS     0x21
319 #define CFA_ADDRESS_OVERFLOW    0x2f
320 
321 #define SMART_READ_DATA       0xd0
322 #define SMART_READ_THRESH     0xd1
323 #define SMART_ATTR_AUTOSAVE   0xd2
324 #define SMART_SAVE_ATTR       0xd3
325 #define SMART_EXECUTE_OFFLINE 0xd4
326 #define SMART_READ_LOG        0xd5
327 #define SMART_WRITE_LOG       0xd6
328 #define SMART_ENABLE          0xd8
329 #define SMART_DISABLE         0xd9
330 #define SMART_STATUS          0xda
331 
332 typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind;
333 
334 typedef void EndTransferFunc(IDEState *);
335 
336 typedef void DMAStartFunc(const IDEDMA *, IDEState *, BlockCompletionFunc *);
337 typedef void DMAVoidFunc(const IDEDMA *);
338 typedef int DMAIntFunc(const IDEDMA *, bool);
339 typedef int32_t DMAInt32Func(const IDEDMA *, int32_t len);
340 typedef void DMAu32Func(const IDEDMA *, uint32_t);
341 typedef void DMAStopFunc(const IDEDMA *, bool);
342 
343 struct unreported_events {
344     bool eject_request;
345     bool new_media;
346 };
347 
348 enum ide_dma_cmd {
349     IDE_DMA_READ = 0,
350     IDE_DMA_WRITE,
351     IDE_DMA_TRIM,
352     IDE_DMA_ATAPI,
353     IDE_DMA__COUNT
354 };
355 
356 extern const char *IDE_DMA_CMD_lookup[IDE_DMA__COUNT];
357 
358 #define ide_cmd_is_read(s) \
359         ((s)->dma_cmd == IDE_DMA_READ)
360 
361 typedef struct IDEBufferedRequest {
362     QLIST_ENTRY(IDEBufferedRequest) list;
363     QEMUIOVector qiov;
364     QEMUIOVector *original_qiov;
365     BlockCompletionFunc *original_cb;
366     void *original_opaque;
367     bool orphaned;
368 } IDEBufferedRequest;
369 
370 /* NOTE: IDEState represents in fact one drive */
371 struct IDEState {
372     IDEBus *bus;
373     uint8_t unit;
374     /* ide config */
375     IDEDriveKind drive_kind;
376     int drive_heads, drive_sectors;
377     int cylinders, heads, sectors, chs_trans;
378     int64_t nb_sectors;
379     int mult_sectors;
380     int identify_set;
381     uint8_t identify_data[512];
382     int drive_serial;
383     char drive_serial_str[21];
384     char drive_model_str[41];
385     uint64_t wwn;
386     /* ide regs */
387     uint8_t feature;
388     uint8_t error;
389     uint32_t nsector;
390     uint8_t sector;
391     uint8_t lcyl;
392     uint8_t hcyl;
393     /* other part of tf for lba48 support */
394     uint8_t hob_feature;
395     uint8_t hob_nsector;
396     uint8_t hob_sector;
397     uint8_t hob_lcyl;
398     uint8_t hob_hcyl;
399 
400     uint8_t select;
401     uint8_t status;
402 
403     bool io8;
404     bool reset_reverts;
405 
406     /* set for lba48 access */
407     uint8_t lba48;
408     BlockBackend *blk;
409     char version[9];
410     /* ATAPI specific */
411     struct unreported_events events;
412     uint8_t sense_key;
413     uint8_t asc;
414     bool tray_open;
415     bool tray_locked;
416     uint8_t cdrom_changed;
417     int packet_transfer_size;
418     int elementary_transfer_size;
419     int32_t io_buffer_index;
420     int lba;
421     int cd_sector_size;
422     int atapi_dma; /* true if dma is requested for the packet cmd */
423     BlockAcctCookie acct;
424     BlockAIOCB *pio_aiocb;
425     QEMUIOVector qiov;
426     QLIST_HEAD(, IDEBufferedRequest) buffered_requests;
427     /* ATA DMA state */
428     uint64_t io_buffer_offset;
429     int32_t io_buffer_size;
430     QEMUSGList sg;
431     /* PIO transfer handling */
432     int req_nb_sectors; /* number of sectors per interrupt */
433     EndTransferFunc *end_transfer_func;
434     uint8_t *data_ptr;
435     uint8_t *data_end;
436     uint8_t *io_buffer;
437     /* PIO save/restore */
438     int32_t io_buffer_total_len;
439     int32_t cur_io_buffer_offset;
440     int32_t cur_io_buffer_len;
441     uint8_t end_transfer_fn_idx;
442     QEMUTimer *sector_write_timer; /* only used for win2k install hack */
443     uint32_t irq_count; /* counts IRQs when using win2k install hack */
444     /* CF-ATA extended error */
445     uint8_t ext_error;
446     /* CF-ATA metadata storage */
447     uint32_t mdata_size;
448     uint8_t *mdata_storage;
449     int media_changed;
450     enum ide_dma_cmd dma_cmd;
451     /* SMART */
452     uint8_t smart_enabled;
453     uint8_t smart_autosave;
454     int smart_errors;
455     uint8_t smart_selftest_count;
456     uint8_t *smart_selftest_data;
457     /* AHCI */
458     int ncq_queues;
459 };
460 
461 struct IDEDMAOps {
462     DMAStartFunc *start_dma;
463     DMAVoidFunc *pio_transfer;
464     DMAInt32Func *prepare_buf;
465     DMAu32Func *commit_buf;
466     DMAIntFunc *rw_buf;
467     DMAVoidFunc *restart;
468     DMAVoidFunc *restart_dma;
469     DMAStopFunc *set_inactive;
470     DMAVoidFunc *cmd_done;
471     DMAVoidFunc *reset;
472 };
473 
474 struct IDEDMA {
475     const struct IDEDMAOps *ops;
476     QEMUIOVector qiov;
477     BlockAIOCB *aiocb;
478 };
479 
480 struct IDEBus {
481     BusState qbus;
482     IDEDevice *master;
483     IDEDevice *slave;
484     IDEState ifs[2];
485     QEMUBH *bh;
486 
487     int bus_id;
488     int max_units;
489     IDEDMA *dma;
490     uint8_t unit;
491     uint8_t cmd;
492     qemu_irq irq;
493 
494     int error_status;
495     uint8_t retry_unit;
496     int64_t retry_sector_num;
497     uint32_t retry_nsector;
498     PortioList portio_list;
499     PortioList portio2_list;
500     VMChangeStateEntry *vmstate;
501 };
502 
503 #define TYPE_IDE_DEVICE "ide-device"
504 OBJECT_DECLARE_TYPE(IDEDevice, IDEDeviceClass, IDE_DEVICE)
505 
506 struct IDEDeviceClass {
507     DeviceClass parent_class;
508     void (*realize)(IDEDevice *dev, Error **errp);
509 };
510 
511 struct IDEDevice {
512     DeviceState qdev;
513     uint32_t unit;
514     BlockConf conf;
515     int chs_trans;
516     char *version;
517     char *serial;
518     char *model;
519     uint64_t wwn;
520     /*
521      * 0x0000        - rotation rate not reported
522      * 0x0001        - non-rotating medium (SSD)
523      * 0x0002-0x0400 - reserved
524      * 0x0401-0xffe  - rotations per minute
525      * 0xffff        - reserved
526      */
527     uint16_t rotation_rate;
528 };
529 
530 /* These are used for the error_status field of IDEBus */
531 #define IDE_RETRY_MASK 0xf8
532 #define IDE_RETRY_DMA  0x08
533 #define IDE_RETRY_PIO  0x10
534 #define IDE_RETRY_ATAPI 0x20 /* reused IDE_RETRY_READ bit */
535 #define IDE_RETRY_READ  0x20
536 #define IDE_RETRY_FLUSH 0x40
537 #define IDE_RETRY_TRIM 0x80
538 #define IDE_RETRY_HBA  0x100
539 
540 #define IS_IDE_RETRY_DMA(_status) \
541     ((_status) & IDE_RETRY_DMA)
542 
543 #define IS_IDE_RETRY_PIO(_status) \
544     ((_status) & IDE_RETRY_PIO)
545 
546 /*
547  * The method of the IDE_RETRY_ATAPI determination is to use a previously
548  * impossible bit combination as a new status value.
549  */
550 #define IS_IDE_RETRY_ATAPI(_status)   \
551     (((_status) & IDE_RETRY_MASK) == IDE_RETRY_ATAPI)
552 
553 static inline uint8_t ide_dma_cmd_to_retry(uint8_t dma_cmd)
554 {
555     switch (dma_cmd) {
556     case IDE_DMA_READ:
557         return IDE_RETRY_DMA | IDE_RETRY_READ;
558     case IDE_DMA_WRITE:
559         return IDE_RETRY_DMA;
560     case IDE_DMA_TRIM:
561         return IDE_RETRY_DMA | IDE_RETRY_TRIM;
562     case IDE_DMA_ATAPI:
563         return IDE_RETRY_ATAPI;
564     default:
565         break;
566     }
567     return 0;
568 }
569 
570 static inline IDEState *idebus_active_if(IDEBus *bus)
571 {
572     return bus->ifs + bus->unit;
573 }
574 
575 static inline void ide_set_irq(IDEBus *bus)
576 {
577     if (!(bus->cmd & IDE_CTRL_DISABLE_IRQ)) {
578         qemu_irq_raise(bus->irq);
579     }
580 }
581 
582 /* hw/ide/core.c */
583 extern const VMStateDescription vmstate_ide_bus;
584 
585 #define VMSTATE_IDE_BUS(_field, _state)                          \
586     VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_bus, IDEBus)
587 
588 #define VMSTATE_IDE_BUS_ARRAY(_field, _state, _num)              \
589     VMSTATE_STRUCT_ARRAY(_field, _state, _num, 1, vmstate_ide_bus, IDEBus)
590 
591 extern const VMStateDescription vmstate_ide_drive;
592 
593 #define VMSTATE_IDE_DRIVES(_field, _state) \
594     VMSTATE_STRUCT_ARRAY(_field, _state, 2, 3, vmstate_ide_drive, IDEState)
595 
596 #define VMSTATE_IDE_DRIVE(_field, _state) \
597     VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_drive, IDEState)
598 
599 void ide_bus_reset(IDEBus *bus);
600 int64_t ide_get_sector(IDEState *s);
601 void ide_set_sector(IDEState *s, int64_t sector_num);
602 
603 void ide_start_dma(IDEState *s, BlockCompletionFunc *cb);
604 void dma_buf_commit(IDEState *s, uint32_t tx_bytes);
605 void ide_dma_error(IDEState *s);
606 void ide_abort_command(IDEState *s);
607 
608 void ide_atapi_cmd_ok(IDEState *s);
609 void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc);
610 void ide_atapi_dma_restart(IDEState *s);
611 void ide_atapi_io_error(IDEState *s, int ret);
612 
613 void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val);
614 uint32_t ide_ioport_read(void *opaque, uint32_t addr1);
615 uint32_t ide_status_read(void *opaque, uint32_t addr);
616 void ide_ctrl_write(void *opaque, uint32_t addr, uint32_t val);
617 void ide_data_writew(void *opaque, uint32_t addr, uint32_t val);
618 uint32_t ide_data_readw(void *opaque, uint32_t addr);
619 void ide_data_writel(void *opaque, uint32_t addr, uint32_t val);
620 uint32_t ide_data_readl(void *opaque, uint32_t addr);
621 
622 int ide_init_drive(IDEState *s, BlockBackend *blk, IDEDriveKind kind,
623                    const char *version, const char *serial, const char *model,
624                    uint64_t wwn,
625                    uint32_t cylinders, uint32_t heads, uint32_t secs,
626                    int chs_trans, Error **errp);
627 void ide_init2(IDEBus *bus, qemu_irq irq);
628 void ide_exit(IDEState *s);
629 int ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2);
630 void ide_register_restart_cb(IDEBus *bus);
631 
632 void ide_exec_cmd(IDEBus *bus, uint32_t val);
633 
634 void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
635                         EndTransferFunc *end_transfer_func);
636 bool ide_transfer_start_norecurse(IDEState *s, uint8_t *buf, int size,
637                                   EndTransferFunc *end_transfer_func);
638 void ide_transfer_stop(IDEState *s);
639 void ide_set_inactive(IDEState *s, bool more);
640 BlockAIOCB *ide_issue_trim(
641         int64_t offset, QEMUIOVector *qiov,
642         BlockCompletionFunc *cb, void *cb_opaque, void *opaque);
643 BlockAIOCB *ide_buffered_readv(IDEState *s, int64_t sector_num,
644                                QEMUIOVector *iov, int nb_sectors,
645                                BlockCompletionFunc *cb, void *opaque);
646 void ide_cancel_dma_sync(IDEState *s);
647 
648 /* hw/ide/atapi.c */
649 void ide_atapi_cmd(IDEState *s);
650 void ide_atapi_cmd_reply_end(IDEState *s);
651 
652 /* hw/ide/qdev.c */
653 void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev,
654                   int bus_id, int max_units);
655 IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive);
656 
657 int ide_handle_rw_error(IDEState *s, int error, int op);
658 
659 #endif /* HW_IDE_INTERNAL_H */
660