1 #ifndef HW_IDE_INTERNAL_H 2 #define HW_IDE_INTERNAL_H 3 4 /* 5 * QEMU IDE Emulation -- internal header file 6 * only files in hw/ide/ are supposed to include this file. 7 * non-internal declarations are in hw/ide.h 8 */ 9 #include <hw/ide.h> 10 #include <hw/isa.h> 11 #include "iorange.h" 12 #include "dma.h" 13 #include "sysemu.h" 14 #include "hw/scsi-defs.h" 15 16 /* debug IDE devices */ 17 //#define DEBUG_IDE 18 //#define DEBUG_IDE_ATAPI 19 //#define DEBUG_AIO 20 #define USE_DMA_CDROM 21 22 typedef struct IDEBus IDEBus; 23 typedef struct IDEDevice IDEDevice; 24 typedef struct IDEState IDEState; 25 typedef struct IDEDMA IDEDMA; 26 typedef struct IDEDMAOps IDEDMAOps; 27 28 #define TYPE_IDE_BUS "IDE" 29 #define IDE_BUS(obj) OBJECT_CHECK(IDEBus, (obj), TYPE_IDE_BUS) 30 31 /* Bits of HD_STATUS */ 32 #define ERR_STAT 0x01 33 #define INDEX_STAT 0x02 34 #define ECC_STAT 0x04 /* Corrected error */ 35 #define DRQ_STAT 0x08 36 #define SEEK_STAT 0x10 37 #define SRV_STAT 0x10 38 #define WRERR_STAT 0x20 39 #define READY_STAT 0x40 40 #define BUSY_STAT 0x80 41 42 /* Bits for HD_ERROR */ 43 #define MARK_ERR 0x01 /* Bad address mark */ 44 #define TRK0_ERR 0x02 /* couldn't find track 0 */ 45 #define ABRT_ERR 0x04 /* Command aborted */ 46 #define MCR_ERR 0x08 /* media change request */ 47 #define ID_ERR 0x10 /* ID field not found */ 48 #define MC_ERR 0x20 /* media changed */ 49 #define ECC_ERR 0x40 /* Uncorrectable ECC error */ 50 #define BBD_ERR 0x80 /* pre-EIDE meaning: block marked bad */ 51 #define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */ 52 53 /* Bits of HD_NSECTOR */ 54 #define CD 0x01 55 #define IO 0x02 56 #define REL 0x04 57 #define TAG_MASK 0xf8 58 59 #define IDE_CMD_RESET 0x04 60 #define IDE_CMD_DISABLE_IRQ 0x02 61 62 /* ACS-2 T13/2015-D Table B.2 Command codes */ 63 #define WIN_NOP 0x00 64 /* reserved 0x01..0x02 */ 65 #define CFA_REQ_EXT_ERROR_CODE 0x03 /* CFA Request Extended Error Code */ 66 /* reserved 0x04..0x05 */ 67 #define WIN_DSM 0x06 68 /* reserved 0x07 */ 69 #define WIN_DEVICE_RESET 0x08 70 /* reserved 0x09..0x0a */ 71 /* REQUEST SENSE DATA EXT 0x0B */ 72 /* reserved 0x0C..0x0F */ 73 #define WIN_RECAL 0x10 /* obsolete since ATA4 */ 74 /* obsolete since ATA3, retired in ATA4 0x11..0x1F */ 75 #define WIN_READ 0x20 /* 28-Bit */ 76 #define WIN_READ_ONCE 0x21 /* 28-Bit w/o retries, obsolete since ATA5 */ 77 /* obsolete since ATA4 0x22..0x23 */ 78 #define WIN_READ_EXT 0x24 /* 48-Bit */ 79 #define WIN_READDMA_EXT 0x25 /* 48-Bit */ 80 #define WIN_READDMA_QUEUED_EXT 0x26 /* 48-Bit, obsolete since ACS2 */ 81 #define WIN_READ_NATIVE_MAX_EXT 0x27 /* 48-Bit */ 82 /* reserved 0x28 */ 83 #define WIN_MULTREAD_EXT 0x29 /* 48-Bit */ 84 /* READ STREAM DMA EXT 0x2A */ 85 /* READ STREAM EXT 0x2B */ 86 /* reserved 0x2C..0x2E */ 87 /* READ LOG EXT 0x2F */ 88 #define WIN_WRITE 0x30 /* 28-Bit */ 89 #define WIN_WRITE_ONCE 0x31 /* 28-Bit w/o retries, obsolete since ATA5 */ 90 /* obsolete since ATA4 0x32..0x33 */ 91 #define WIN_WRITE_EXT 0x34 /* 48-Bit */ 92 #define WIN_WRITEDMA_EXT 0x35 /* 48-Bit */ 93 #define WIN_WRITEDMA_QUEUED_EXT 0x36 /* 48-Bit */ 94 #define WIN_SET_MAX_EXT 0x37 /* 48-Bit, obsolete since ACS2 */ 95 #define WIN_SET_MAX_EXT 0x37 /* 48-Bit */ 96 #define CFA_WRITE_SECT_WO_ERASE 0x38 /* CFA Write Sectors without erase */ 97 #define WIN_MULTWRITE_EXT 0x39 /* 48-Bit */ 98 /* WRITE STREAM DMA EXT 0x3A */ 99 /* WRITE STREAM EXT 0x3B */ 100 #define WIN_WRITE_VERIFY 0x3C /* 28-Bit, obsolete since ATA4 */ 101 /* WRITE DMA FUA EXT 0x3D */ 102 /* obsolete since ACS2 0x3E */ 103 /* WRITE LOG EXT 0x3F */ 104 #define WIN_VERIFY 0x40 /* 28-Bit - Read Verify Sectors */ 105 #define WIN_VERIFY_ONCE 0x41 /* 28-Bit - w/o retries, obsolete since ATA5 */ 106 #define WIN_VERIFY_EXT 0x42 /* 48-Bit */ 107 /* reserved 0x43..0x44 */ 108 /* WRITE UNCORRECTABLE EXT 0x45 */ 109 /* reserved 0x46 */ 110 /* READ LOG DMA EXT 0x47 */ 111 /* reserved 0x48..0x4F */ 112 /* obsolete since ATA4 0x50 */ 113 /* CONFIGURE STREAM 0x51 */ 114 /* reserved 0x52..0x56 */ 115 /* WRITE LOG DMA EXT 0x57 */ 116 /* reserved 0x58..0x5A */ 117 /* TRUSTED NON DATA 0x5B */ 118 /* TRUSTED RECEIVE 0x5C */ 119 /* TRUSTED RECEIVE DMA 0x5D */ 120 /* TRUSTED SEND 0x5E */ 121 /* TRUSTED SEND DMA 0x5F */ 122 /* READ FPDMA QUEUED 0x60 */ 123 /* WRITE FPDMA QUEUED 0x61 */ 124 /* reserved 0x62->0x6F */ 125 #define WIN_SEEK 0x70 /* obsolete since ATA7 */ 126 /* reserved 0x71-0x7F */ 127 /* vendor specific 0x80-0x86 */ 128 #define CFA_TRANSLATE_SECTOR 0x87 /* CFA Translate Sector */ 129 /* vendor specific 0x88-0x8F */ 130 #define WIN_DIAGNOSE 0x90 131 #define WIN_SPECIFY 0x91 /* set drive geometry translation, obsolete since ATA6 */ 132 #define WIN_DOWNLOAD_MICROCODE 0x92 133 /* DOWNLOAD MICROCODE DMA 0x93 */ 134 #define WIN_STANDBYNOW2 0x94 /* retired in ATA4 */ 135 #define WIN_IDLEIMMEDIATE2 0x95 /* force drive to become "ready", retired in ATA4 */ 136 #define WIN_STANDBY2 0x96 /* retired in ATA4 */ 137 #define WIN_SETIDLE2 0x97 /* retired in ATA4 */ 138 #define WIN_CHECKPOWERMODE2 0x98 /* retired in ATA4 */ 139 #define WIN_SLEEPNOW2 0x99 /* retired in ATA4 */ 140 /* vendor specific 0x9A */ 141 /* reserved 0x9B..0x9F */ 142 #define WIN_PACKETCMD 0xA0 /* Send a packet command. */ 143 #define WIN_PIDENTIFY 0xA1 /* identify ATAPI device */ 144 #define WIN_QUEUED_SERVICE 0xA2 /* obsolete since ACS2 */ 145 /* reserved 0xA3..0xAF */ 146 #define WIN_SMART 0xB0 /* self-monitoring and reporting */ 147 /* Device Configuration Overlay 0xB1 */ 148 /* reserved 0xB2..0xB3 */ 149 /* Sanitize Device 0xB4 */ 150 /* reserved 0xB5 */ 151 /* NV Cache 0xB6 */ 152 /* reserved for CFA 0xB7..0xBB */ 153 #define CFA_ACCESS_METADATA_STORAGE 0xB8 154 /* reserved 0xBC..0xBF */ 155 #define CFA_ERASE_SECTORS 0xC0 /* microdrives implement as NOP */ 156 /* vendor specific 0xC1..0xC3 */ 157 #define WIN_MULTREAD 0xC4 /* read sectors using multiple mode*/ 158 #define WIN_MULTWRITE 0xC5 /* write sectors using multiple mode */ 159 #define WIN_SETMULT 0xC6 /* enable/disable multiple mode */ 160 #define WIN_READDMA_QUEUED 0xC7 /* read sectors using Queued DMA transfers, obsolete since ACS2 */ 161 #define WIN_READDMA 0xC8 /* read sectors using DMA transfers */ 162 #define WIN_READDMA_ONCE 0xC9 /* 28-Bit - w/o retries, obsolete since ATA5 */ 163 #define WIN_WRITEDMA 0xCA /* write sectors using DMA transfers */ 164 #define WIN_WRITEDMA_ONCE 0xCB /* 28-Bit - w/o retries, obsolete since ATA5 */ 165 #define WIN_WRITEDMA_QUEUED 0xCC /* write sectors using Queued DMA transfers, obsolete since ACS2 */ 166 #define CFA_WRITE_MULTI_WO_ERASE 0xCD /* CFA Write multiple without erase */ 167 /* WRITE MULTIPLE FUA EXT 0xCE */ 168 /* reserved 0xCF..0xDO */ 169 /* CHECK MEDIA CARD TYPE 0xD1 */ 170 /* reserved for media card pass through 0xD2..0xD4 */ 171 /* reserved 0xD5..0xD9 */ 172 #define WIN_GETMEDIASTATUS 0xDA /* obsolete since ATA8 */ 173 /* obsolete since ATA3, retired in ATA4 0xDB..0xDD */ 174 #define WIN_DOORLOCK 0xDE /* lock door on removable drives, obsolete since ATA8 */ 175 #define WIN_DOORUNLOCK 0xDF /* unlock door on removable drives, obsolete since ATA8 */ 176 #define WIN_STANDBYNOW1 0xE0 177 #define WIN_IDLEIMMEDIATE 0xE1 /* force drive to become "ready" */ 178 #define WIN_STANDBY 0xE2 /* Set device in Standby Mode */ 179 #define WIN_SETIDLE1 0xE3 180 #define WIN_READ_BUFFER 0xE4 /* force read only 1 sector */ 181 #define WIN_CHECKPOWERMODE1 0xE5 182 #define WIN_SLEEPNOW1 0xE6 183 #define WIN_FLUSH_CACHE 0xE7 184 #define WIN_WRITE_BUFFER 0xE8 /* force write only 1 sector */ 185 /* READ BUFFER DMA 0xE9 */ 186 #define WIN_FLUSH_CACHE_EXT 0xEA /* 48-Bit */ 187 /* WRITE BUFFER DMA 0xEB */ 188 #define WIN_IDENTIFY 0xEC /* ask drive to identify itself */ 189 #define WIN_MEDIAEJECT 0xED /* obsolete since ATA8 */ 190 /* obsolete since ATA4 0xEE */ 191 #define WIN_SETFEATURES 0xEF /* set special drive features */ 192 #define IBM_SENSE_CONDITION 0xF0 /* measure disk temperature, vendor specific */ 193 #define WIN_SECURITY_SET_PASS 0xF1 194 #define WIN_SECURITY_UNLOCK 0xF2 195 #define WIN_SECURITY_ERASE_PREPARE 0xF3 196 #define WIN_SECURITY_ERASE_UNIT 0xF4 197 #define WIN_SECURITY_FREEZE_LOCK 0xF5 198 #define CFA_WEAR_LEVEL 0xF5 /* microdrives implement as NOP; not specified in T13! */ 199 #define WIN_SECURITY_DISABLE 0xF6 200 /* vendor specific 0xF7 */ 201 #define WIN_READ_NATIVE_MAX 0xF8 /* return the native maximum address */ 202 #define WIN_SET_MAX 0xF9 203 /* vendor specific 0xFA..0xFF */ 204 205 /* set to 1 set disable mult support */ 206 #define MAX_MULT_SECTORS 16 207 208 #define IDE_DMA_BUF_SECTORS 256 209 210 /* feature values for Data Set Management */ 211 #define DSM_TRIM 0x01 212 213 #if (IDE_DMA_BUF_SECTORS < MAX_MULT_SECTORS) 214 #error "IDE_DMA_BUF_SECTORS must be bigger or equal to MAX_MULT_SECTORS" 215 #endif 216 217 /* ATAPI defines */ 218 219 #define ATAPI_PACKET_SIZE 12 220 221 /* The generic packet command opcodes for CD/DVD Logical Units, 222 * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */ 223 #define GPCMD_BLANK 0xa1 224 #define GPCMD_CLOSE_TRACK 0x5b 225 #define GPCMD_FLUSH_CACHE 0x35 226 #define GPCMD_FORMAT_UNIT 0x04 227 #define GPCMD_GET_CONFIGURATION 0x46 228 #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a 229 #define GPCMD_GET_PERFORMANCE 0xac 230 #define GPCMD_INQUIRY 0x12 231 #define GPCMD_LOAD_UNLOAD 0xa6 232 #define GPCMD_MECHANISM_STATUS 0xbd 233 #define GPCMD_MODE_SELECT_10 0x55 234 #define GPCMD_MODE_SENSE_10 0x5a 235 #define GPCMD_PAUSE_RESUME 0x4b 236 #define GPCMD_PLAY_AUDIO_10 0x45 237 #define GPCMD_PLAY_AUDIO_MSF 0x47 238 #define GPCMD_PLAY_AUDIO_TI 0x48 239 #define GPCMD_PLAY_CD 0xbc 240 #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1e 241 #define GPCMD_READ_10 0x28 242 #define GPCMD_READ_12 0xa8 243 #define GPCMD_READ_CDVD_CAPACITY 0x25 244 #define GPCMD_READ_CD 0xbe 245 #define GPCMD_READ_CD_MSF 0xb9 246 #define GPCMD_READ_DISC_INFO 0x51 247 #define GPCMD_READ_DVD_STRUCTURE 0xad 248 #define GPCMD_READ_FORMAT_CAPACITIES 0x23 249 #define GPCMD_READ_HEADER 0x44 250 #define GPCMD_READ_TRACK_RZONE_INFO 0x52 251 #define GPCMD_READ_SUBCHANNEL 0x42 252 #define GPCMD_READ_TOC_PMA_ATIP 0x43 253 #define GPCMD_REPAIR_RZONE_TRACK 0x58 254 #define GPCMD_REPORT_KEY 0xa4 255 #define GPCMD_REQUEST_SENSE 0x03 256 #define GPCMD_RESERVE_RZONE_TRACK 0x53 257 #define GPCMD_SCAN 0xba 258 #define GPCMD_SEEK 0x2b 259 #define GPCMD_SEND_DVD_STRUCTURE 0xad 260 #define GPCMD_SEND_EVENT 0xa2 261 #define GPCMD_SEND_KEY 0xa3 262 #define GPCMD_SEND_OPC 0x54 263 #define GPCMD_SET_READ_AHEAD 0xa7 264 #define GPCMD_SET_STREAMING 0xb6 265 #define GPCMD_START_STOP_UNIT 0x1b 266 #define GPCMD_STOP_PLAY_SCAN 0x4e 267 #define GPCMD_TEST_UNIT_READY 0x00 268 #define GPCMD_VERIFY_10 0x2f 269 #define GPCMD_WRITE_10 0x2a 270 #define GPCMD_WRITE_AND_VERIFY_10 0x2e 271 /* This is listed as optional in ATAPI 2.6, but is (curiously) 272 * missing from Mt. Fuji, Table 57. It _is_ mentioned in Mt. Fuji 273 * Table 377 as an MMC command for SCSi devices though... Most ATAPI 274 * drives support it. */ 275 #define GPCMD_SET_SPEED 0xbb 276 /* This seems to be a SCSI specific CD-ROM opcode 277 * to play data at track/index */ 278 #define GPCMD_PLAYAUDIO_TI 0x48 279 /* 280 * From MS Media Status Notification Support Specification. For 281 * older drives only. 282 */ 283 #define GPCMD_GET_MEDIA_STATUS 0xda 284 #define GPCMD_MODE_SENSE_6 0x1a 285 286 #define ATAPI_INT_REASON_CD 0x01 /* 0 = data transfer */ 287 #define ATAPI_INT_REASON_IO 0x02 /* 1 = transfer to the host */ 288 #define ATAPI_INT_REASON_REL 0x04 289 #define ATAPI_INT_REASON_TAG 0xf8 290 291 /* same constants as bochs */ 292 #define ASC_ILLEGAL_OPCODE 0x20 293 #define ASC_LOGICAL_BLOCK_OOR 0x21 294 #define ASC_INV_FIELD_IN_CMD_PACKET 0x24 295 #define ASC_MEDIUM_MAY_HAVE_CHANGED 0x28 296 #define ASC_INCOMPATIBLE_FORMAT 0x30 297 #define ASC_MEDIUM_NOT_PRESENT 0x3a 298 #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED 0x39 299 #define ASC_MEDIA_REMOVAL_PREVENTED 0x53 300 301 #define CFA_NO_ERROR 0x00 302 #define CFA_MISC_ERROR 0x09 303 #define CFA_INVALID_COMMAND 0x20 304 #define CFA_INVALID_ADDRESS 0x21 305 #define CFA_ADDRESS_OVERFLOW 0x2f 306 307 #define SMART_READ_DATA 0xd0 308 #define SMART_READ_THRESH 0xd1 309 #define SMART_ATTR_AUTOSAVE 0xd2 310 #define SMART_SAVE_ATTR 0xd3 311 #define SMART_EXECUTE_OFFLINE 0xd4 312 #define SMART_READ_LOG 0xd5 313 #define SMART_WRITE_LOG 0xd6 314 #define SMART_ENABLE 0xd8 315 #define SMART_DISABLE 0xd9 316 #define SMART_STATUS 0xda 317 318 typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind; 319 320 typedef void EndTransferFunc(IDEState *); 321 322 typedef void DMAStartFunc(IDEDMA *, IDEState *, BlockDriverCompletionFunc *); 323 typedef int DMAFunc(IDEDMA *); 324 typedef int DMAIntFunc(IDEDMA *, int); 325 typedef void DMARestartFunc(void *, int, RunState); 326 327 struct unreported_events { 328 bool eject_request; 329 bool new_media; 330 }; 331 332 enum ide_dma_cmd { 333 IDE_DMA_READ, 334 IDE_DMA_WRITE, 335 IDE_DMA_TRIM, 336 }; 337 338 #define ide_cmd_is_read(s) \ 339 ((s)->dma_cmd == IDE_DMA_READ) 340 341 /* NOTE: IDEState represents in fact one drive */ 342 struct IDEState { 343 IDEBus *bus; 344 uint8_t unit; 345 /* ide config */ 346 IDEDriveKind drive_kind; 347 int cylinders, heads, sectors, chs_trans; 348 int64_t nb_sectors; 349 int mult_sectors; 350 int identify_set; 351 uint8_t identify_data[512]; 352 int drive_serial; 353 char drive_serial_str[21]; 354 char drive_model_str[41]; 355 uint64_t wwn; 356 /* ide regs */ 357 uint8_t feature; 358 uint8_t error; 359 uint32_t nsector; 360 uint8_t sector; 361 uint8_t lcyl; 362 uint8_t hcyl; 363 /* other part of tf for lba48 support */ 364 uint8_t hob_feature; 365 uint8_t hob_nsector; 366 uint8_t hob_sector; 367 uint8_t hob_lcyl; 368 uint8_t hob_hcyl; 369 370 uint8_t select; 371 uint8_t status; 372 373 /* set for lba48 access */ 374 uint8_t lba48; 375 BlockDriverState *bs; 376 char version[9]; 377 /* ATAPI specific */ 378 struct unreported_events events; 379 uint8_t sense_key; 380 uint8_t asc; 381 bool tray_open; 382 bool tray_locked; 383 uint8_t cdrom_changed; 384 int packet_transfer_size; 385 int elementary_transfer_size; 386 int io_buffer_index; 387 int lba; 388 int cd_sector_size; 389 int atapi_dma; /* true if dma is requested for the packet cmd */ 390 BlockAcctCookie acct; 391 BlockDriverAIOCB *pio_aiocb; 392 struct iovec iov; 393 QEMUIOVector qiov; 394 /* ATA DMA state */ 395 int io_buffer_size; 396 QEMUSGList sg; 397 /* PIO transfer handling */ 398 int req_nb_sectors; /* number of sectors per interrupt */ 399 EndTransferFunc *end_transfer_func; 400 uint8_t *data_ptr; 401 uint8_t *data_end; 402 uint8_t *io_buffer; 403 /* PIO save/restore */ 404 int32_t io_buffer_total_len; 405 int cur_io_buffer_offset; 406 int cur_io_buffer_len; 407 uint8_t end_transfer_fn_idx; 408 QEMUTimer *sector_write_timer; /* only used for win2k install hack */ 409 uint32_t irq_count; /* counts IRQs when using win2k install hack */ 410 /* CF-ATA extended error */ 411 uint8_t ext_error; 412 /* CF-ATA metadata storage */ 413 uint32_t mdata_size; 414 uint8_t *mdata_storage; 415 int media_changed; 416 enum ide_dma_cmd dma_cmd; 417 /* SMART */ 418 uint8_t smart_enabled; 419 uint8_t smart_autosave; 420 int smart_errors; 421 uint8_t smart_selftest_count; 422 uint8_t *smart_selftest_data; 423 /* AHCI */ 424 int ncq_queues; 425 }; 426 427 struct IDEDMAOps { 428 DMAStartFunc *start_dma; 429 DMAFunc *start_transfer; 430 DMAIntFunc *prepare_buf; 431 DMAIntFunc *rw_buf; 432 DMAIntFunc *set_unit; 433 DMAIntFunc *add_status; 434 DMAFunc *set_inactive; 435 DMARestartFunc *restart_cb; 436 DMAFunc *reset; 437 }; 438 439 struct IDEDMA { 440 const struct IDEDMAOps *ops; 441 struct iovec iov; 442 QEMUIOVector qiov; 443 BlockDriverAIOCB *aiocb; 444 }; 445 446 struct IDEBus { 447 BusState qbus; 448 IDEDevice *master; 449 IDEDevice *slave; 450 IDEState ifs[2]; 451 int bus_id; 452 IDEDMA *dma; 453 uint8_t unit; 454 uint8_t cmd; 455 qemu_irq irq; 456 457 int error_status; 458 }; 459 460 #define TYPE_IDE_DEVICE "ide-device" 461 #define IDE_DEVICE(obj) \ 462 OBJECT_CHECK(IDEDevice, (obj), TYPE_IDE_DEVICE) 463 #define IDE_DEVICE_CLASS(klass) \ 464 OBJECT_CLASS_CHECK(IDEDeviceClass, (klass), TYPE_IDE_DEVICE) 465 #define IDE_DEVICE_GET_CLASS(obj) \ 466 OBJECT_GET_CLASS(IDEDeviceClass, (obj), TYPE_IDE_DEVICE) 467 468 typedef struct IDEDeviceClass { 469 DeviceClass parent_class; 470 int (*init)(IDEDevice *dev); 471 } IDEDeviceClass; 472 473 struct IDEDevice { 474 DeviceState qdev; 475 uint32_t unit; 476 BlockConf conf; 477 int chs_trans; 478 char *version; 479 char *serial; 480 char *model; 481 uint64_t wwn; 482 }; 483 484 #define BM_STATUS_DMAING 0x01 485 #define BM_STATUS_ERROR 0x02 486 #define BM_STATUS_INT 0x04 487 488 /* FIXME These are not status register bits */ 489 #define BM_STATUS_DMA_RETRY 0x08 490 #define BM_STATUS_PIO_RETRY 0x10 491 #define BM_STATUS_RETRY_READ 0x20 492 #define BM_STATUS_RETRY_FLUSH 0x40 493 #define BM_STATUS_RETRY_TRIM 0x80 494 495 #define BM_MIGRATION_COMPAT_STATUS_BITS \ 496 (BM_STATUS_DMA_RETRY | BM_STATUS_PIO_RETRY | \ 497 BM_STATUS_RETRY_READ | BM_STATUS_RETRY_FLUSH) 498 499 #define BM_CMD_START 0x01 500 #define BM_CMD_READ 0x08 501 502 static inline IDEState *idebus_active_if(IDEBus *bus) 503 { 504 return bus->ifs + bus->unit; 505 } 506 507 static inline void ide_set_irq(IDEBus *bus) 508 { 509 if (!(bus->cmd & IDE_CMD_DISABLE_IRQ)) { 510 qemu_irq_raise(bus->irq); 511 } 512 } 513 514 /* hw/ide/core.c */ 515 extern const VMStateDescription vmstate_ide_bus; 516 517 #define VMSTATE_IDE_BUS(_field, _state) \ 518 VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_bus, IDEBus) 519 520 #define VMSTATE_IDE_BUS_ARRAY(_field, _state, _num) \ 521 VMSTATE_STRUCT_ARRAY(_field, _state, _num, 1, vmstate_ide_bus, IDEBus) 522 523 extern const VMStateDescription vmstate_ide_drive; 524 525 #define VMSTATE_IDE_DRIVES(_field, _state) \ 526 VMSTATE_STRUCT_ARRAY(_field, _state, 2, 3, vmstate_ide_drive, IDEState) 527 528 void ide_bus_reset(IDEBus *bus); 529 int64_t ide_get_sector(IDEState *s); 530 void ide_set_sector(IDEState *s, int64_t sector_num); 531 532 void ide_dma_error(IDEState *s); 533 534 void ide_atapi_cmd_ok(IDEState *s); 535 void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc); 536 void ide_atapi_io_error(IDEState *s, int ret); 537 538 void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val); 539 uint32_t ide_ioport_read(void *opaque, uint32_t addr1); 540 uint32_t ide_status_read(void *opaque, uint32_t addr); 541 void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val); 542 void ide_data_writew(void *opaque, uint32_t addr, uint32_t val); 543 uint32_t ide_data_readw(void *opaque, uint32_t addr); 544 void ide_data_writel(void *opaque, uint32_t addr, uint32_t val); 545 uint32_t ide_data_readl(void *opaque, uint32_t addr); 546 547 int ide_init_drive(IDEState *s, BlockDriverState *bs, IDEDriveKind kind, 548 const char *version, const char *serial, const char *model, 549 uint64_t wwn, 550 uint32_t cylinders, uint32_t heads, uint32_t secs, 551 int chs_trans); 552 void ide_init2(IDEBus *bus, qemu_irq irq); 553 void ide_init2_with_non_qdev_drives(IDEBus *bus, DriveInfo *hd0, 554 DriveInfo *hd1, qemu_irq irq); 555 void ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2); 556 557 void ide_exec_cmd(IDEBus *bus, uint32_t val); 558 void ide_dma_cb(void *opaque, int ret); 559 void ide_sector_write(IDEState *s); 560 void ide_sector_read(IDEState *s); 561 void ide_flush_cache(IDEState *s); 562 563 void ide_transfer_start(IDEState *s, uint8_t *buf, int size, 564 EndTransferFunc *end_transfer_func); 565 void ide_transfer_stop(IDEState *s); 566 void ide_set_inactive(IDEState *s); 567 BlockDriverAIOCB *ide_issue_trim(BlockDriverState *bs, 568 int64_t sector_num, QEMUIOVector *qiov, int nb_sectors, 569 BlockDriverCompletionFunc *cb, void *opaque); 570 571 /* hw/ide/atapi.c */ 572 void ide_atapi_cmd(IDEState *s); 573 void ide_atapi_cmd_reply_end(IDEState *s); 574 575 /* hw/ide/qdev.c */ 576 void ide_bus_new(IDEBus *idebus, DeviceState *dev, int bus_id); 577 IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive); 578 579 #endif /* HW_IDE_INTERNAL_H */ 580