1*b061f059SPaolo Bonzini /* 2*b061f059SPaolo Bonzini * Copyright (c) 2003-2004 Fabrice Bellard 3*b061f059SPaolo Bonzini * Copyright (c) 2019, 2024 Red Hat, Inc. 4*b061f059SPaolo Bonzini * 5*b061f059SPaolo Bonzini * Permission is hereby granted, free of charge, to any person obtaining a copy 6*b061f059SPaolo Bonzini * of this software and associated documentation files (the "Software"), to deal 7*b061f059SPaolo Bonzini * in the Software without restriction, including without limitation the rights 8*b061f059SPaolo Bonzini * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9*b061f059SPaolo Bonzini * copies of the Software, and to permit persons to whom the Software is 10*b061f059SPaolo Bonzini * furnished to do so, subject to the following conditions: 11*b061f059SPaolo Bonzini * 12*b061f059SPaolo Bonzini * The above copyright notice and this permission notice shall be included in 13*b061f059SPaolo Bonzini * all copies or substantial portions of the Software. 14*b061f059SPaolo Bonzini * 15*b061f059SPaolo Bonzini * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16*b061f059SPaolo Bonzini * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17*b061f059SPaolo Bonzini * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18*b061f059SPaolo Bonzini * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19*b061f059SPaolo Bonzini * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20*b061f059SPaolo Bonzini * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 21*b061f059SPaolo Bonzini * THE SOFTWARE. 22*b061f059SPaolo Bonzini */ 23*b061f059SPaolo Bonzini #include "qemu/osdep.h" 24*b061f059SPaolo Bonzini #include "sysemu/whpx.h" 25*b061f059SPaolo Bonzini #include "sysemu/cpu-timers.h" 26*b061f059SPaolo Bonzini #include "trace.h" 27*b061f059SPaolo Bonzini 28*b061f059SPaolo Bonzini #include "hw/i386/x86.h" 29*b061f059SPaolo Bonzini #include "target/i386/cpu.h" 30*b061f059SPaolo Bonzini #include "hw/intc/i8259.h" 31*b061f059SPaolo Bonzini #include "hw/irq.h" 32*b061f059SPaolo Bonzini #include "sysemu/kvm.h" 33*b061f059SPaolo Bonzini 34*b061f059SPaolo Bonzini /* TSC handling */ 35*b061f059SPaolo Bonzini uint64_t cpu_get_tsc(CPUX86State *env) 36*b061f059SPaolo Bonzini { 37*b061f059SPaolo Bonzini return cpus_get_elapsed_ticks(); 38*b061f059SPaolo Bonzini } 39*b061f059SPaolo Bonzini 40*b061f059SPaolo Bonzini /* IRQ handling */ 41*b061f059SPaolo Bonzini static void pic_irq_request(void *opaque, int irq, int level) 42*b061f059SPaolo Bonzini { 43*b061f059SPaolo Bonzini CPUState *cs = first_cpu; 44*b061f059SPaolo Bonzini X86CPU *cpu = X86_CPU(cs); 45*b061f059SPaolo Bonzini 46*b061f059SPaolo Bonzini trace_x86_pic_interrupt(irq, level); 47*b061f059SPaolo Bonzini if (cpu_is_apic_enabled(cpu->apic_state) && !kvm_irqchip_in_kernel() && 48*b061f059SPaolo Bonzini !whpx_apic_in_platform()) { 49*b061f059SPaolo Bonzini CPU_FOREACH(cs) { 50*b061f059SPaolo Bonzini cpu = X86_CPU(cs); 51*b061f059SPaolo Bonzini if (apic_accept_pic_intr(cpu->apic_state)) { 52*b061f059SPaolo Bonzini apic_deliver_pic_intr(cpu->apic_state, level); 53*b061f059SPaolo Bonzini } 54*b061f059SPaolo Bonzini } 55*b061f059SPaolo Bonzini } else { 56*b061f059SPaolo Bonzini if (level) { 57*b061f059SPaolo Bonzini cpu_interrupt(cs, CPU_INTERRUPT_HARD); 58*b061f059SPaolo Bonzini } else { 59*b061f059SPaolo Bonzini cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); 60*b061f059SPaolo Bonzini } 61*b061f059SPaolo Bonzini } 62*b061f059SPaolo Bonzini } 63*b061f059SPaolo Bonzini 64*b061f059SPaolo Bonzini qemu_irq x86_allocate_cpu_irq(void) 65*b061f059SPaolo Bonzini { 66*b061f059SPaolo Bonzini return qemu_allocate_irq(pic_irq_request, NULL, 0); 67*b061f059SPaolo Bonzini } 68*b061f059SPaolo Bonzini 69*b061f059SPaolo Bonzini int cpu_get_pic_interrupt(CPUX86State *env) 70*b061f059SPaolo Bonzini { 71*b061f059SPaolo Bonzini X86CPU *cpu = env_archcpu(env); 72*b061f059SPaolo Bonzini int intno; 73*b061f059SPaolo Bonzini 74*b061f059SPaolo Bonzini if (!kvm_irqchip_in_kernel() && !whpx_apic_in_platform()) { 75*b061f059SPaolo Bonzini intno = apic_get_interrupt(cpu->apic_state); 76*b061f059SPaolo Bonzini if (intno >= 0) { 77*b061f059SPaolo Bonzini return intno; 78*b061f059SPaolo Bonzini } 79*b061f059SPaolo Bonzini /* read the irq from the PIC */ 80*b061f059SPaolo Bonzini if (!apic_accept_pic_intr(cpu->apic_state)) { 81*b061f059SPaolo Bonzini return -1; 82*b061f059SPaolo Bonzini } 83*b061f059SPaolo Bonzini } 84*b061f059SPaolo Bonzini 85*b061f059SPaolo Bonzini intno = pic_read_irq(isa_pic); 86*b061f059SPaolo Bonzini return intno; 87*b061f059SPaolo Bonzini } 88*b061f059SPaolo Bonzini 89*b061f059SPaolo Bonzini DeviceState *cpu_get_current_apic(void) 90*b061f059SPaolo Bonzini { 91*b061f059SPaolo Bonzini if (current_cpu) { 92*b061f059SPaolo Bonzini X86CPU *cpu = X86_CPU(current_cpu); 93*b061f059SPaolo Bonzini return cpu->apic_state; 94*b061f059SPaolo Bonzini } else { 95*b061f059SPaolo Bonzini return NULL; 96*b061f059SPaolo Bonzini } 97*b061f059SPaolo Bonzini } 98