1b061f059SPaolo Bonzini /* 2b061f059SPaolo Bonzini * Copyright (c) 2003-2004 Fabrice Bellard 3b061f059SPaolo Bonzini * Copyright (c) 2019, 2024 Red Hat, Inc. 4b061f059SPaolo Bonzini * 5b061f059SPaolo Bonzini * Permission is hereby granted, free of charge, to any person obtaining a copy 6b061f059SPaolo Bonzini * of this software and associated documentation files (the "Software"), to deal 7b061f059SPaolo Bonzini * in the Software without restriction, including without limitation the rights 8b061f059SPaolo Bonzini * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9b061f059SPaolo Bonzini * copies of the Software, and to permit persons to whom the Software is 10b061f059SPaolo Bonzini * furnished to do so, subject to the following conditions: 11b061f059SPaolo Bonzini * 12b061f059SPaolo Bonzini * The above copyright notice and this permission notice shall be included in 13b061f059SPaolo Bonzini * all copies or substantial portions of the Software. 14b061f059SPaolo Bonzini * 15b061f059SPaolo Bonzini * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16b061f059SPaolo Bonzini * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17b061f059SPaolo Bonzini * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18b061f059SPaolo Bonzini * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19b061f059SPaolo Bonzini * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20b061f059SPaolo Bonzini * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 21b061f059SPaolo Bonzini * THE SOFTWARE. 22b061f059SPaolo Bonzini */ 23b061f059SPaolo Bonzini #include "qemu/osdep.h" 24*32cad1ffSPhilippe Mathieu-Daudé #include "system/whpx.h" 25*32cad1ffSPhilippe Mathieu-Daudé #include "system/cpu-timers.h" 26b061f059SPaolo Bonzini #include "trace.h" 27b061f059SPaolo Bonzini 28b061f059SPaolo Bonzini #include "hw/i386/x86.h" 29b061f059SPaolo Bonzini #include "target/i386/cpu.h" 30b061f059SPaolo Bonzini #include "hw/intc/i8259.h" 31b061f059SPaolo Bonzini #include "hw/irq.h" 32*32cad1ffSPhilippe Mathieu-Daudé #include "system/kvm.h" 33b061f059SPaolo Bonzini 34b061f059SPaolo Bonzini /* TSC handling */ 35b061f059SPaolo Bonzini uint64_t cpu_get_tsc(CPUX86State *env) 36b061f059SPaolo Bonzini { 37b061f059SPaolo Bonzini return cpus_get_elapsed_ticks(); 38b061f059SPaolo Bonzini } 39b061f059SPaolo Bonzini 40b061f059SPaolo Bonzini /* IRQ handling */ 41b061f059SPaolo Bonzini static void pic_irq_request(void *opaque, int irq, int level) 42b061f059SPaolo Bonzini { 43b061f059SPaolo Bonzini CPUState *cs = first_cpu; 44b061f059SPaolo Bonzini X86CPU *cpu = X86_CPU(cs); 45b061f059SPaolo Bonzini 46b061f059SPaolo Bonzini trace_x86_pic_interrupt(irq, level); 47b061f059SPaolo Bonzini if (cpu_is_apic_enabled(cpu->apic_state) && !kvm_irqchip_in_kernel() && 48b061f059SPaolo Bonzini !whpx_apic_in_platform()) { 49b061f059SPaolo Bonzini CPU_FOREACH(cs) { 50b061f059SPaolo Bonzini cpu = X86_CPU(cs); 51b061f059SPaolo Bonzini if (apic_accept_pic_intr(cpu->apic_state)) { 52b061f059SPaolo Bonzini apic_deliver_pic_intr(cpu->apic_state, level); 53b061f059SPaolo Bonzini } 54b061f059SPaolo Bonzini } 55b061f059SPaolo Bonzini } else { 56b061f059SPaolo Bonzini if (level) { 57b061f059SPaolo Bonzini cpu_interrupt(cs, CPU_INTERRUPT_HARD); 58b061f059SPaolo Bonzini } else { 59b061f059SPaolo Bonzini cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); 60b061f059SPaolo Bonzini } 61b061f059SPaolo Bonzini } 62b061f059SPaolo Bonzini } 63b061f059SPaolo Bonzini 64b061f059SPaolo Bonzini qemu_irq x86_allocate_cpu_irq(void) 65b061f059SPaolo Bonzini { 66b061f059SPaolo Bonzini return qemu_allocate_irq(pic_irq_request, NULL, 0); 67b061f059SPaolo Bonzini } 68b061f059SPaolo Bonzini 69b061f059SPaolo Bonzini int cpu_get_pic_interrupt(CPUX86State *env) 70b061f059SPaolo Bonzini { 71b061f059SPaolo Bonzini X86CPU *cpu = env_archcpu(env); 72b061f059SPaolo Bonzini int intno; 73b061f059SPaolo Bonzini 74b061f059SPaolo Bonzini if (!kvm_irqchip_in_kernel() && !whpx_apic_in_platform()) { 75b061f059SPaolo Bonzini intno = apic_get_interrupt(cpu->apic_state); 76b061f059SPaolo Bonzini if (intno >= 0) { 77b061f059SPaolo Bonzini return intno; 78b061f059SPaolo Bonzini } 79b061f059SPaolo Bonzini /* read the irq from the PIC */ 80b061f059SPaolo Bonzini if (!apic_accept_pic_intr(cpu->apic_state)) { 81b061f059SPaolo Bonzini return -1; 82b061f059SPaolo Bonzini } 83b061f059SPaolo Bonzini } 84b061f059SPaolo Bonzini 85b061f059SPaolo Bonzini intno = pic_read_irq(isa_pic); 86b061f059SPaolo Bonzini return intno; 87b061f059SPaolo Bonzini } 88b061f059SPaolo Bonzini 89b061f059SPaolo Bonzini DeviceState *cpu_get_current_apic(void) 90b061f059SPaolo Bonzini { 91b061f059SPaolo Bonzini if (current_cpu) { 92b061f059SPaolo Bonzini X86CPU *cpu = X86_CPU(current_cpu); 93b061f059SPaolo Bonzini return cpu->apic_state; 94b061f059SPaolo Bonzini } else { 95b061f059SPaolo Bonzini return NULL; 96b061f059SPaolo Bonzini } 97b061f059SPaolo Bonzini } 98