1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include CONFIG_DEVICES 27 28 #include "qemu/units.h" 29 #include "hw/loader.h" 30 #include "hw/i386/x86.h" 31 #include "hw/i386/pc.h" 32 #include "hw/i386/apic.h" 33 #include "hw/pci-host/i440fx.h" 34 #include "hw/southbridge/piix.h" 35 #include "hw/display/ramfb.h" 36 #include "hw/firmware/smbios.h" 37 #include "hw/pci/pci.h" 38 #include "hw/pci/pci_ids.h" 39 #include "hw/usb.h" 40 #include "net/net.h" 41 #include "hw/ide/pci.h" 42 #include "hw/irq.h" 43 #include "sysemu/kvm.h" 44 #include "hw/kvm/clock.h" 45 #include "hw/sysbus.h" 46 #include "sysemu/arch_init.h" 47 #include "hw/i2c/smbus_eeprom.h" 48 #include "hw/xen/xen-x86.h" 49 #include "exec/memory.h" 50 #include "exec/address-spaces.h" 51 #include "hw/acpi/acpi.h" 52 #include "cpu.h" 53 #include "qapi/error.h" 54 #include "qemu/error-report.h" 55 #include "sysemu/xen.h" 56 #ifdef CONFIG_XEN 57 #include <xen/hvm/hvm_info_table.h> 58 #include "hw/xen/xen_pt.h" 59 #endif 60 #include "migration/global_state.h" 61 #include "migration/misc.h" 62 #include "sysemu/numa.h" 63 #include "hw/hyperv/vmbus-bridge.h" 64 #include "hw/mem/nvdimm.h" 65 #include "hw/i386/acpi-build.h" 66 67 #define MAX_IDE_BUS 2 68 69 #ifdef CONFIG_IDE_ISA 70 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 71 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 72 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 73 #endif 74 75 /* PC hardware initialisation */ 76 static void pc_init1(MachineState *machine, 77 const char *host_type, const char *pci_type) 78 { 79 PCMachineState *pcms = PC_MACHINE(machine); 80 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 81 X86MachineState *x86ms = X86_MACHINE(machine); 82 MemoryRegion *system_memory = get_system_memory(); 83 MemoryRegion *system_io = get_system_io(); 84 PCIBus *pci_bus; 85 ISABus *isa_bus; 86 PCII440FXState *i440fx_state; 87 int piix3_devfn = -1; 88 qemu_irq smi_irq; 89 GSIState *gsi_state; 90 BusState *idebus[MAX_IDE_BUS]; 91 ISADevice *rtc_state; 92 MemoryRegion *ram_memory; 93 MemoryRegion *pci_memory; 94 MemoryRegion *rom_memory; 95 ram_addr_t lowmem; 96 97 /* 98 * Calculate ram split, for memory below and above 4G. It's a bit 99 * complicated for backward compatibility reasons ... 100 * 101 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 102 * default value for max_ram_below_4g now. 103 * 104 * - Then, to gigabyte align the memory, we move the split to 3G 105 * (lowmem = 0xc0000000). But only in case we have to split in 106 * the first place, i.e. ram_size is larger than (traditional) 107 * lowmem. And for new machine types (gigabyte_align = true) 108 * only, for live migration compatibility reasons. 109 * 110 * - Next the max-ram-below-4g option was added, which allowed to 111 * reduce lowmem to a smaller value, to allow a larger PCI I/O 112 * window below 4G. qemu doesn't enforce gigabyte alignment here, 113 * but prints a warning. 114 * 115 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 116 * so legacy non-PAE guests can get as much memory as possible in 117 * the 32bit address space below 4G. 118 * 119 * - Note that Xen has its own ram setup code in xen_ram_init(), 120 * called via xen_hvm_init_pc(). 121 * 122 * Examples: 123 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 124 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 125 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 126 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 127 */ 128 if (xen_enabled()) { 129 xen_hvm_init_pc(pcms, &ram_memory); 130 } else { 131 if (!pcms->max_ram_below_4g) { 132 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 133 } 134 lowmem = pcms->max_ram_below_4g; 135 if (machine->ram_size >= pcms->max_ram_below_4g) { 136 if (pcmc->gigabyte_align) { 137 if (lowmem > 0xc0000000) { 138 lowmem = 0xc0000000; 139 } 140 if (lowmem & (1 * GiB - 1)) { 141 warn_report("Large machine and max_ram_below_4g " 142 "(%" PRIu64 ") not a multiple of 1G; " 143 "possible bad performance.", 144 pcms->max_ram_below_4g); 145 } 146 } 147 } 148 149 if (machine->ram_size >= lowmem) { 150 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 151 x86ms->below_4g_mem_size = lowmem; 152 } else { 153 x86ms->above_4g_mem_size = 0; 154 x86ms->below_4g_mem_size = machine->ram_size; 155 } 156 } 157 158 x86_cpus_init(x86ms, pcmc->default_cpu_version); 159 160 if (pcmc->kvmclock_enabled) { 161 kvmclock_create(pcmc->kvmclock_create_always); 162 } 163 164 if (pcmc->pci_enabled) { 165 pci_memory = g_new(MemoryRegion, 1); 166 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 167 rom_memory = pci_memory; 168 } else { 169 pci_memory = NULL; 170 rom_memory = system_memory; 171 } 172 173 pc_guest_info_init(pcms); 174 175 if (pcmc->smbios_defaults) { 176 MachineClass *mc = MACHINE_GET_CLASS(machine); 177 /* These values are guest ABI, do not change */ 178 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 179 mc->name, pcmc->smbios_legacy_mode, 180 pcmc->smbios_uuid_encoded, 181 SMBIOS_ENTRY_POINT_21); 182 } 183 184 /* allocate ram and load rom/bios */ 185 if (!xen_enabled()) { 186 pc_memory_init(pcms, system_memory, 187 rom_memory, &ram_memory); 188 } else { 189 pc_system_flash_cleanup_unused(pcms); 190 if (machine->kernel_filename != NULL) { 191 /* For xen HVM direct kernel boot, load linux here */ 192 xen_load_linux(pcms); 193 } 194 } 195 196 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 197 198 if (pcmc->pci_enabled) { 199 PIIX3State *piix3; 200 201 pci_bus = i440fx_init(host_type, 202 pci_type, 203 &i440fx_state, 204 system_memory, system_io, machine->ram_size, 205 x86ms->below_4g_mem_size, 206 x86ms->above_4g_mem_size, 207 pci_memory, ram_memory); 208 pcms->bus = pci_bus; 209 210 piix3 = piix3_create(pci_bus, &isa_bus); 211 piix3->pic = x86ms->gsi; 212 piix3_devfn = piix3->dev.devfn; 213 } else { 214 pci_bus = NULL; 215 i440fx_state = NULL; 216 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 217 &error_abort); 218 pcms->hpet_enabled = false; 219 } 220 isa_bus_irqs(isa_bus, x86ms->gsi); 221 222 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 223 224 if (pcmc->pci_enabled) { 225 ioapic_init_gsi(gsi_state, "i440fx"); 226 } 227 228 if (tcg_enabled()) { 229 x86_register_ferr_irq(x86ms->gsi[13]); 230 } 231 232 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 233 234 assert(pcms->vmport != ON_OFF_AUTO__MAX); 235 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 236 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 237 } 238 239 /* init basic PC hardware */ 240 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, &rtc_state, true, 241 0x4); 242 243 pc_nic_init(pcmc, isa_bus, pci_bus); 244 245 if (pcmc->pci_enabled) { 246 PCIDevice *dev; 247 248 dev = pci_create_simple(pci_bus, piix3_devfn + 1, 249 xen_enabled() ? "piix3-ide-xen" : "piix3-ide"); 250 pci_ide_create_devs(dev); 251 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 252 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 253 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 254 } 255 #ifdef CONFIG_IDE_ISA 256 else { 257 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 258 int i; 259 260 ide_drive_get(hd, ARRAY_SIZE(hd)); 261 for (i = 0; i < MAX_IDE_BUS; i++) { 262 ISADevice *dev; 263 char busname[] = "ide.0"; 264 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 265 ide_irq[i], 266 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 267 /* 268 * The ide bus name is ide.0 for the first bus and ide.1 for the 269 * second one. 270 */ 271 busname[4] = '0' + i; 272 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 273 } 274 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 275 } 276 #endif 277 278 if (pcmc->pci_enabled && machine_usb(machine)) { 279 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 280 } 281 282 if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { 283 DeviceState *piix4_pm; 284 285 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 286 /* TODO: Populate SPD eeprom data. */ 287 pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 288 x86ms->gsi[9], smi_irq, 289 x86_machine_is_smm_enabled(x86ms), 290 &piix4_pm); 291 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 292 293 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 294 TYPE_HOTPLUG_HANDLER, 295 (Object **)&x86ms->acpi_dev, 296 object_property_allow_set_link, 297 OBJ_PROP_LINK_STRONG); 298 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 299 OBJECT(piix4_pm), &error_abort); 300 } 301 302 if (machine->nvdimms_state->is_enabled) { 303 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 304 x86_nvdimm_acpi_dsmio, 305 x86ms->fw_cfg, OBJECT(pcms)); 306 } 307 } 308 309 /* Looking for a pc_compat_2_4() function? It doesn't exist. 310 * pc_compat_*() functions that run on machine-init time and 311 * change global QEMU state are deprecated. Please don't create 312 * one, and implement any pc-*-2.4 (and newer) compat code in 313 * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). 314 */ 315 316 static void pc_compat_2_3_fn(MachineState *machine) 317 { 318 X86MachineState *x86ms = X86_MACHINE(machine); 319 if (kvm_enabled()) { 320 x86ms->smm = ON_OFF_AUTO_OFF; 321 } 322 } 323 324 static void pc_compat_2_2_fn(MachineState *machine) 325 { 326 pc_compat_2_3_fn(machine); 327 } 328 329 static void pc_compat_2_1_fn(MachineState *machine) 330 { 331 pc_compat_2_2_fn(machine); 332 x86_cpu_change_kvm_default("svm", NULL); 333 } 334 335 static void pc_compat_2_0_fn(MachineState *machine) 336 { 337 pc_compat_2_1_fn(machine); 338 } 339 340 static void pc_compat_1_7_fn(MachineState *machine) 341 { 342 pc_compat_2_0_fn(machine); 343 x86_cpu_change_kvm_default("x2apic", NULL); 344 } 345 346 static void pc_compat_1_6_fn(MachineState *machine) 347 { 348 pc_compat_1_7_fn(machine); 349 } 350 351 static void pc_compat_1_5_fn(MachineState *machine) 352 { 353 pc_compat_1_6_fn(machine); 354 } 355 356 static void pc_compat_1_4_fn(MachineState *machine) 357 { 358 pc_compat_1_5_fn(machine); 359 } 360 361 static void pc_init_isa(MachineState *machine) 362 { 363 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 364 } 365 366 #ifdef CONFIG_XEN 367 static void pc_xen_hvm_init_pci(MachineState *machine) 368 { 369 const char *pci_type = xen_igd_gfx_pt_enabled() ? 370 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 371 372 pc_init1(machine, 373 TYPE_I440FX_PCI_HOST_BRIDGE, 374 pci_type); 375 } 376 377 static void pc_xen_hvm_init(MachineState *machine) 378 { 379 PCMachineState *pcms = PC_MACHINE(machine); 380 381 if (!xen_enabled()) { 382 error_report("xenfv machine requires the xen accelerator"); 383 exit(1); 384 } 385 386 pc_xen_hvm_init_pci(machine); 387 pci_create_simple(pcms->bus, -1, "xen-platform"); 388 } 389 #endif 390 391 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 392 static void pc_init_##suffix(MachineState *machine) \ 393 { \ 394 void (*compat)(MachineState *m) = (compatfn); \ 395 if (compat) { \ 396 compat(machine); \ 397 } \ 398 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 399 TYPE_I440FX_PCI_DEVICE); \ 400 } \ 401 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 402 403 static void pc_i440fx_machine_options(MachineClass *m) 404 { 405 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 406 pcmc->default_nic_model = "e1000"; 407 pcmc->pci_root_uid = 0; 408 409 m->family = "pc_piix"; 410 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 411 m->default_machine_opts = "firmware=bios-256k.bin"; 412 m->default_display = "std"; 413 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 414 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); 415 } 416 417 static void pc_i440fx_6_1_machine_options(MachineClass *m) 418 { 419 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 420 pc_i440fx_machine_options(m); 421 m->alias = "pc"; 422 m->is_default = true; 423 pcmc->default_cpu_version = 1; 424 } 425 426 DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL, 427 pc_i440fx_6_1_machine_options); 428 429 static void pc_i440fx_6_0_machine_options(MachineClass *m) 430 { 431 pc_i440fx_6_1_machine_options(m); 432 m->alias = NULL; 433 m->is_default = false; 434 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len); 435 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len); 436 } 437 438 DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL, 439 pc_i440fx_6_0_machine_options); 440 441 static void pc_i440fx_5_2_machine_options(MachineClass *m) 442 { 443 pc_i440fx_6_0_machine_options(m); 444 m->alias = NULL; 445 m->is_default = false; 446 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len); 447 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len); 448 } 449 450 DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, 451 pc_i440fx_5_2_machine_options); 452 453 static void pc_i440fx_5_1_machine_options(MachineClass *m) 454 { 455 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 456 457 pc_i440fx_5_2_machine_options(m); 458 m->alias = NULL; 459 m->is_default = false; 460 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); 461 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); 462 pcmc->kvmclock_create_always = false; 463 pcmc->pci_root_uid = 1; 464 } 465 466 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, 467 pc_i440fx_5_1_machine_options); 468 469 static void pc_i440fx_5_0_machine_options(MachineClass *m) 470 { 471 pc_i440fx_5_1_machine_options(m); 472 m->alias = NULL; 473 m->is_default = false; 474 m->numa_mem_supported = true; 475 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); 476 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); 477 m->auto_enable_numa_with_memdev = false; 478 } 479 480 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, 481 pc_i440fx_5_0_machine_options); 482 483 static void pc_i440fx_4_2_machine_options(MachineClass *m) 484 { 485 pc_i440fx_5_0_machine_options(m); 486 m->alias = NULL; 487 m->is_default = false; 488 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 489 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 490 } 491 492 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, 493 pc_i440fx_4_2_machine_options); 494 495 static void pc_i440fx_4_1_machine_options(MachineClass *m) 496 { 497 pc_i440fx_4_2_machine_options(m); 498 m->alias = NULL; 499 m->is_default = false; 500 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 501 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 502 } 503 504 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, 505 pc_i440fx_4_1_machine_options); 506 507 static void pc_i440fx_4_0_machine_options(MachineClass *m) 508 { 509 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 510 pc_i440fx_4_1_machine_options(m); 511 m->alias = NULL; 512 m->is_default = false; 513 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 514 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 515 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 516 } 517 518 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 519 pc_i440fx_4_0_machine_options); 520 521 static void pc_i440fx_3_1_machine_options(MachineClass *m) 522 { 523 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 524 525 pc_i440fx_4_0_machine_options(m); 526 m->is_default = false; 527 pcmc->do_not_add_smb_acpi = true; 528 m->smbus_no_migration_support = true; 529 m->alias = NULL; 530 pcmc->pvh_enabled = false; 531 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 532 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 533 } 534 535 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 536 pc_i440fx_3_1_machine_options); 537 538 static void pc_i440fx_3_0_machine_options(MachineClass *m) 539 { 540 pc_i440fx_3_1_machine_options(m); 541 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 542 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 543 } 544 545 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 546 pc_i440fx_3_0_machine_options); 547 548 static void pc_i440fx_2_12_machine_options(MachineClass *m) 549 { 550 pc_i440fx_3_0_machine_options(m); 551 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 552 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 553 } 554 555 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 556 pc_i440fx_2_12_machine_options); 557 558 static void pc_i440fx_2_11_machine_options(MachineClass *m) 559 { 560 pc_i440fx_2_12_machine_options(m); 561 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 562 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 563 } 564 565 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 566 pc_i440fx_2_11_machine_options); 567 568 static void pc_i440fx_2_10_machine_options(MachineClass *m) 569 { 570 pc_i440fx_2_11_machine_options(m); 571 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 572 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 573 m->auto_enable_numa_with_memhp = false; 574 } 575 576 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 577 pc_i440fx_2_10_machine_options); 578 579 static void pc_i440fx_2_9_machine_options(MachineClass *m) 580 { 581 pc_i440fx_2_10_machine_options(m); 582 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 583 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 584 } 585 586 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 587 pc_i440fx_2_9_machine_options); 588 589 static void pc_i440fx_2_8_machine_options(MachineClass *m) 590 { 591 pc_i440fx_2_9_machine_options(m); 592 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 593 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 594 } 595 596 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 597 pc_i440fx_2_8_machine_options); 598 599 static void pc_i440fx_2_7_machine_options(MachineClass *m) 600 { 601 pc_i440fx_2_8_machine_options(m); 602 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 603 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 604 } 605 606 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 607 pc_i440fx_2_7_machine_options); 608 609 static void pc_i440fx_2_6_machine_options(MachineClass *m) 610 { 611 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 612 613 pc_i440fx_2_7_machine_options(m); 614 pcmc->legacy_cpu_hotplug = true; 615 pcmc->linuxboot_dma_enabled = false; 616 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 617 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 618 } 619 620 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 621 pc_i440fx_2_6_machine_options); 622 623 static void pc_i440fx_2_5_machine_options(MachineClass *m) 624 { 625 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 626 627 pc_i440fx_2_6_machine_options(m); 628 x86mc->save_tsc_khz = false; 629 m->legacy_fw_cfg_order = 1; 630 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 631 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 632 } 633 634 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 635 pc_i440fx_2_5_machine_options); 636 637 static void pc_i440fx_2_4_machine_options(MachineClass *m) 638 { 639 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 640 641 pc_i440fx_2_5_machine_options(m); 642 m->hw_version = "2.4.0"; 643 pcmc->broken_reserved_end = true; 644 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 645 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 646 } 647 648 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 649 pc_i440fx_2_4_machine_options) 650 651 static void pc_i440fx_2_3_machine_options(MachineClass *m) 652 { 653 pc_i440fx_2_4_machine_options(m); 654 m->hw_version = "2.3.0"; 655 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); 656 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); 657 } 658 659 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, 660 pc_i440fx_2_3_machine_options); 661 662 static void pc_i440fx_2_2_machine_options(MachineClass *m) 663 { 664 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 665 666 pc_i440fx_2_3_machine_options(m); 667 m->hw_version = "2.2.0"; 668 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 669 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); 670 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); 671 pcmc->rsdp_in_ram = false; 672 } 673 674 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, 675 pc_i440fx_2_2_machine_options); 676 677 static void pc_i440fx_2_1_machine_options(MachineClass *m) 678 { 679 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 680 681 pc_i440fx_2_2_machine_options(m); 682 m->hw_version = "2.1.0"; 683 m->default_display = NULL; 684 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len); 685 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len); 686 pcmc->smbios_uuid_encoded = false; 687 pcmc->enforce_aligned_dimm = false; 688 } 689 690 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, 691 pc_i440fx_2_1_machine_options); 692 693 static void pc_i440fx_2_0_machine_options(MachineClass *m) 694 { 695 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 696 697 pc_i440fx_2_1_machine_options(m); 698 m->hw_version = "2.0.0"; 699 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); 700 pcmc->smbios_legacy_mode = true; 701 pcmc->has_reserved_memory = false; 702 /* This value depends on the actual DSDT and SSDT compiled into 703 * the source QEMU; unfortunately it depends on the binary and 704 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 705 * both QEMU 1.7 and QEMU 2.0. 706 * 707 * Large variations cause migration to fail for more than one 708 * consecutive value of the "-smp" maxcpus option. 709 * 710 * For small variations of the kind caused by different iasl versions, 711 * the 4k rounding usually leaves slack. However, there could be still 712 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 713 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 714 * 715 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 716 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 717 */ 718 pcmc->legacy_acpi_table_size = 6652; 719 pcmc->acpi_data_size = 0x10000; 720 } 721 722 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, 723 pc_i440fx_2_0_machine_options); 724 725 static void pc_i440fx_1_7_machine_options(MachineClass *m) 726 { 727 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 728 729 pc_i440fx_2_0_machine_options(m); 730 m->hw_version = "1.7.0"; 731 m->default_machine_opts = NULL; 732 m->option_rom_has_mr = true; 733 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len); 734 pcmc->smbios_defaults = false; 735 pcmc->gigabyte_align = false; 736 pcmc->legacy_acpi_table_size = 6414; 737 } 738 739 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn, 740 pc_i440fx_1_7_machine_options); 741 742 static void pc_i440fx_1_6_machine_options(MachineClass *m) 743 { 744 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 745 746 pc_i440fx_1_7_machine_options(m); 747 m->hw_version = "1.6.0"; 748 m->rom_file_has_mr = false; 749 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len); 750 pcmc->has_acpi_build = false; 751 } 752 753 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn, 754 pc_i440fx_1_6_machine_options); 755 756 static void pc_i440fx_1_5_machine_options(MachineClass *m) 757 { 758 pc_i440fx_1_6_machine_options(m); 759 m->hw_version = "1.5.0"; 760 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len); 761 } 762 763 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn, 764 pc_i440fx_1_5_machine_options); 765 766 static void pc_i440fx_1_4_machine_options(MachineClass *m) 767 { 768 pc_i440fx_1_5_machine_options(m); 769 m->hw_version = "1.4.0"; 770 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len); 771 } 772 773 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn, 774 pc_i440fx_1_4_machine_options); 775 776 typedef struct { 777 uint16_t gpu_device_id; 778 uint16_t pch_device_id; 779 uint8_t pch_revision_id; 780 } IGDDeviceIDInfo; 781 782 /* In real world different GPU should have different PCH. But actually 783 * the different PCH DIDs likely map to different PCH SKUs. We do the 784 * same thing for the GPU. For PCH, the different SKUs are going to be 785 * all the same silicon design and implementation, just different 786 * features turn on and off with fuses. The SW interfaces should be 787 * consistent across all SKUs in a given family (eg LPT). But just same 788 * features may not be supported. 789 * 790 * Most of these different PCH features probably don't matter to the 791 * Gfx driver, but obviously any difference in display port connections 792 * will so it should be fine with any PCH in case of passthrough. 793 * 794 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 795 * scenarios, 0x9cc3 for BDW(Broadwell). 796 */ 797 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 798 /* HSW Classic */ 799 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 800 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 801 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 802 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 803 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 804 /* HSW ULT */ 805 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 806 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 807 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 808 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 809 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 810 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 811 /* HSW CRW */ 812 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 813 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 814 /* HSW Server */ 815 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 816 /* HSW SRVR */ 817 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 818 /* BSW */ 819 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 820 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 821 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 822 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 823 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 824 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 825 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 826 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 827 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 828 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 829 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 830 }; 831 832 static void isa_bridge_class_init(ObjectClass *klass, void *data) 833 { 834 DeviceClass *dc = DEVICE_CLASS(klass); 835 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 836 837 dc->desc = "ISA bridge faked to support IGD PT"; 838 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 839 k->vendor_id = PCI_VENDOR_ID_INTEL; 840 k->class_id = PCI_CLASS_BRIDGE_ISA; 841 }; 842 843 static TypeInfo isa_bridge_info = { 844 .name = "igd-passthrough-isa-bridge", 845 .parent = TYPE_PCI_DEVICE, 846 .instance_size = sizeof(PCIDevice), 847 .class_init = isa_bridge_class_init, 848 .interfaces = (InterfaceInfo[]) { 849 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 850 { }, 851 }, 852 }; 853 854 static void pt_graphics_register_types(void) 855 { 856 type_register_static(&isa_bridge_info); 857 } 858 type_init(pt_graphics_register_types) 859 860 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 861 { 862 struct PCIDevice *bridge_dev; 863 int i, num; 864 uint16_t pch_dev_id = 0xffff; 865 uint8_t pch_rev_id = 0; 866 867 num = ARRAY_SIZE(igd_combo_id_infos); 868 for (i = 0; i < num; i++) { 869 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 870 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 871 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 872 } 873 } 874 875 if (pch_dev_id == 0xffff) { 876 return; 877 } 878 879 /* Currently IGD drivers always need to access PCH by 1f.0. */ 880 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 881 "igd-passthrough-isa-bridge"); 882 883 /* 884 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 885 */ 886 if (!bridge_dev) { 887 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 888 return; 889 } 890 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 891 pci_config_set_revision(bridge_dev->config, pch_rev_id); 892 } 893 894 static void isapc_machine_options(MachineClass *m) 895 { 896 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 897 m->desc = "ISA-only PC"; 898 m->max_cpus = 1; 899 m->option_rom_has_mr = true; 900 m->rom_file_has_mr = false; 901 pcmc->pci_enabled = false; 902 pcmc->has_acpi_build = false; 903 pcmc->smbios_defaults = false; 904 pcmc->gigabyte_align = false; 905 pcmc->smbios_legacy_mode = true; 906 pcmc->has_reserved_memory = false; 907 pcmc->default_nic_model = "ne2k_isa"; 908 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 909 } 910 911 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 912 isapc_machine_options); 913 914 915 #ifdef CONFIG_XEN 916 static void xenfv_4_2_machine_options(MachineClass *m) 917 { 918 pc_i440fx_4_2_machine_options(m); 919 m->desc = "Xen Fully-virtualized PC"; 920 m->max_cpus = HVM_MAX_VCPUS; 921 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 922 } 923 924 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, 925 xenfv_4_2_machine_options); 926 927 static void xenfv_3_1_machine_options(MachineClass *m) 928 { 929 pc_i440fx_3_1_machine_options(m); 930 m->desc = "Xen Fully-virtualized PC"; 931 m->alias = "xenfv"; 932 m->max_cpus = HVM_MAX_VCPUS; 933 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 934 } 935 936 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, 937 xenfv_3_1_machine_options); 938 #endif 939