1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "config-devices.h" 27 28 #include "qemu/units.h" 29 #include "hw/loader.h" 30 #include "hw/i386/x86.h" 31 #include "hw/i386/pc.h" 32 #include "hw/i386/apic.h" 33 #include "hw/pci-host/i440fx.h" 34 #include "hw/southbridge/piix.h" 35 #include "hw/display/ramfb.h" 36 #include "hw/firmware/smbios.h" 37 #include "hw/pci/pci.h" 38 #include "hw/pci/pci_ids.h" 39 #include "hw/usb.h" 40 #include "net/net.h" 41 #include "hw/ide/pci.h" 42 #include "hw/irq.h" 43 #include "sysemu/kvm.h" 44 #include "hw/kvm/clock.h" 45 #include "sysemu/sysemu.h" 46 #include "hw/sysbus.h" 47 #include "sysemu/arch_init.h" 48 #include "hw/i2c/smbus_eeprom.h" 49 #include "hw/xen/xen.h" 50 #include "exec/memory.h" 51 #include "exec/address-spaces.h" 52 #include "hw/acpi/acpi.h" 53 #include "cpu.h" 54 #include "qapi/error.h" 55 #include "qemu/error-report.h" 56 #ifdef CONFIG_XEN 57 #include <xen/hvm/hvm_info_table.h> 58 #include "hw/xen/xen_pt.h" 59 #endif 60 #include "migration/global_state.h" 61 #include "migration/misc.h" 62 #include "sysemu/numa.h" 63 #include "hw/hyperv/vmbus-bridge.h" 64 #include "hw/mem/nvdimm.h" 65 #include "hw/i386/acpi-build.h" 66 67 #define MAX_IDE_BUS 2 68 69 #ifdef CONFIG_IDE_ISA 70 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 71 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 72 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 73 #endif 74 75 /* PC hardware initialisation */ 76 static void pc_init1(MachineState *machine, 77 const char *host_type, const char *pci_type) 78 { 79 PCMachineState *pcms = PC_MACHINE(machine); 80 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 81 X86MachineState *x86ms = X86_MACHINE(machine); 82 MemoryRegion *system_memory = get_system_memory(); 83 MemoryRegion *system_io = get_system_io(); 84 PCIBus *pci_bus; 85 ISABus *isa_bus; 86 PCII440FXState *i440fx_state; 87 int piix3_devfn = -1; 88 qemu_irq smi_irq; 89 GSIState *gsi_state; 90 BusState *idebus[MAX_IDE_BUS]; 91 ISADevice *rtc_state; 92 MemoryRegion *ram_memory; 93 MemoryRegion *pci_memory; 94 MemoryRegion *rom_memory; 95 ram_addr_t lowmem; 96 97 /* 98 * Calculate ram split, for memory below and above 4G. It's a bit 99 * complicated for backward compatibility reasons ... 100 * 101 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 102 * default value for max_ram_below_4g now. 103 * 104 * - Then, to gigabyte align the memory, we move the split to 3G 105 * (lowmem = 0xc0000000). But only in case we have to split in 106 * the first place, i.e. ram_size is larger than (traditional) 107 * lowmem. And for new machine types (gigabyte_align = true) 108 * only, for live migration compatibility reasons. 109 * 110 * - Next the max-ram-below-4g option was added, which allowed to 111 * reduce lowmem to a smaller value, to allow a larger PCI I/O 112 * window below 4G. qemu doesn't enforce gigabyte alignment here, 113 * but prints a warning. 114 * 115 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 116 * so legacy non-PAE guests can get as much memory as possible in 117 * the 32bit address space below 4G. 118 * 119 * - Note that Xen has its own ram setp code in xen_ram_init(), 120 * called via xen_hvm_init(). 121 * 122 * Examples: 123 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 124 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 125 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 126 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 127 */ 128 if (xen_enabled()) { 129 xen_hvm_init(pcms, &ram_memory); 130 } else { 131 if (!x86ms->max_ram_below_4g) { 132 x86ms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 133 } 134 lowmem = x86ms->max_ram_below_4g; 135 if (machine->ram_size >= x86ms->max_ram_below_4g) { 136 if (pcmc->gigabyte_align) { 137 if (lowmem > 0xc0000000) { 138 lowmem = 0xc0000000; 139 } 140 if (lowmem & (1 * GiB - 1)) { 141 warn_report("Large machine and max_ram_below_4g " 142 "(%" PRIu64 ") not a multiple of 1G; " 143 "possible bad performance.", 144 x86ms->max_ram_below_4g); 145 } 146 } 147 } 148 149 if (machine->ram_size >= lowmem) { 150 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 151 x86ms->below_4g_mem_size = lowmem; 152 } else { 153 x86ms->above_4g_mem_size = 0; 154 x86ms->below_4g_mem_size = machine->ram_size; 155 } 156 } 157 158 x86_cpus_init(x86ms, pcmc->default_cpu_version); 159 160 if (kvm_enabled() && pcmc->kvmclock_enabled) { 161 kvmclock_create(); 162 } 163 164 if (pcmc->pci_enabled) { 165 pci_memory = g_new(MemoryRegion, 1); 166 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 167 rom_memory = pci_memory; 168 } else { 169 pci_memory = NULL; 170 rom_memory = system_memory; 171 } 172 173 pc_guest_info_init(pcms); 174 175 if (pcmc->smbios_defaults) { 176 MachineClass *mc = MACHINE_GET_CLASS(machine); 177 /* These values are guest ABI, do not change */ 178 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 179 mc->name, pcmc->smbios_legacy_mode, 180 pcmc->smbios_uuid_encoded, 181 SMBIOS_ENTRY_POINT_21); 182 } 183 184 /* allocate ram and load rom/bios */ 185 if (!xen_enabled()) { 186 pc_memory_init(pcms, system_memory, 187 rom_memory, &ram_memory); 188 } else if (machine->kernel_filename != NULL) { 189 /* For xen HVM direct kernel boot, load linux here */ 190 xen_load_linux(pcms); 191 } 192 193 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 194 195 if (pcmc->pci_enabled) { 196 PIIX3State *piix3; 197 198 pci_bus = i440fx_init(host_type, 199 pci_type, 200 &i440fx_state, 201 system_memory, system_io, machine->ram_size, 202 x86ms->below_4g_mem_size, 203 x86ms->above_4g_mem_size, 204 pci_memory, ram_memory); 205 pcms->bus = pci_bus; 206 207 piix3 = piix3_create(pci_bus, &isa_bus); 208 piix3->pic = x86ms->gsi; 209 piix3_devfn = piix3->dev.devfn; 210 } else { 211 pci_bus = NULL; 212 i440fx_state = NULL; 213 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 214 &error_abort); 215 no_hpet = 1; 216 } 217 isa_bus_irqs(isa_bus, x86ms->gsi); 218 219 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 220 221 if (pcmc->pci_enabled) { 222 ioapic_init_gsi(gsi_state, "i440fx"); 223 } 224 225 if (tcg_enabled()) { 226 x86_register_ferr_irq(x86ms->gsi[13]); 227 } 228 229 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 230 231 assert(pcms->vmport != ON_OFF_AUTO__MAX); 232 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 233 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 234 } 235 236 /* init basic PC hardware */ 237 pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, true, 238 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled, 239 0x4); 240 241 pc_nic_init(pcmc, isa_bus, pci_bus); 242 243 if (pcmc->pci_enabled) { 244 PCIDevice *dev; 245 246 dev = pci_create_simple(pci_bus, piix3_devfn + 1, 247 xen_enabled() ? "piix3-ide-xen" : "piix3-ide"); 248 pci_ide_create_devs(dev); 249 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 250 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 251 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 252 } 253 #ifdef CONFIG_IDE_ISA 254 else { 255 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 256 int i; 257 258 ide_drive_get(hd, ARRAY_SIZE(hd)); 259 for (i = 0; i < MAX_IDE_BUS; i++) { 260 ISADevice *dev; 261 char busname[] = "ide.0"; 262 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 263 ide_irq[i], 264 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 265 /* 266 * The ide bus name is ide.0 for the first bus and ide.1 for the 267 * second one. 268 */ 269 busname[4] = '0' + i; 270 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 271 } 272 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 273 } 274 #endif 275 276 if (pcmc->pci_enabled && machine_usb(machine)) { 277 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 278 } 279 280 if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { 281 DeviceState *piix4_pm; 282 283 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 284 /* TODO: Populate SPD eeprom data. */ 285 pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 286 x86ms->gsi[9], smi_irq, 287 x86_machine_is_smm_enabled(x86ms), 288 &piix4_pm); 289 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 290 291 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 292 TYPE_HOTPLUG_HANDLER, 293 (Object **)&pcms->acpi_dev, 294 object_property_allow_set_link, 295 OBJ_PROP_LINK_STRONG); 296 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), 297 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); 298 } 299 300 if (machine->nvdimms_state->is_enabled) { 301 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 302 x86_nvdimm_acpi_dsmio, 303 x86ms->fw_cfg, OBJECT(pcms)); 304 } 305 } 306 307 /* Looking for a pc_compat_2_4() function? It doesn't exist. 308 * pc_compat_*() functions that run on machine-init time and 309 * change global QEMU state are deprecated. Please don't create 310 * one, and implement any pc-*-2.4 (and newer) compat code in 311 * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). 312 */ 313 314 static void pc_compat_2_3_fn(MachineState *machine) 315 { 316 X86MachineState *x86ms = X86_MACHINE(machine); 317 if (kvm_enabled()) { 318 x86ms->smm = ON_OFF_AUTO_OFF; 319 } 320 } 321 322 static void pc_compat_2_2_fn(MachineState *machine) 323 { 324 pc_compat_2_3_fn(machine); 325 } 326 327 static void pc_compat_2_1_fn(MachineState *machine) 328 { 329 pc_compat_2_2_fn(machine); 330 x86_cpu_change_kvm_default("svm", NULL); 331 } 332 333 static void pc_compat_2_0_fn(MachineState *machine) 334 { 335 pc_compat_2_1_fn(machine); 336 } 337 338 static void pc_compat_1_7_fn(MachineState *machine) 339 { 340 pc_compat_2_0_fn(machine); 341 x86_cpu_change_kvm_default("x2apic", NULL); 342 } 343 344 static void pc_compat_1_6_fn(MachineState *machine) 345 { 346 pc_compat_1_7_fn(machine); 347 } 348 349 static void pc_compat_1_5_fn(MachineState *machine) 350 { 351 pc_compat_1_6_fn(machine); 352 } 353 354 static void pc_compat_1_4_fn(MachineState *machine) 355 { 356 pc_compat_1_5_fn(machine); 357 } 358 359 static void pc_compat_1_3(MachineState *machine) 360 { 361 pc_compat_1_4_fn(machine); 362 } 363 364 /* PC compat function for pc-1.0 to pc-1.2 */ 365 static void pc_compat_1_2(MachineState *machine) 366 { 367 pc_compat_1_3(machine); 368 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); 369 } 370 371 static void pc_init_isa(MachineState *machine) 372 { 373 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 374 } 375 376 #ifdef CONFIG_XEN 377 static void pc_xen_hvm_init_pci(MachineState *machine) 378 { 379 const char *pci_type = has_igd_gfx_passthru ? 380 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 381 382 pc_init1(machine, 383 TYPE_I440FX_PCI_HOST_BRIDGE, 384 pci_type); 385 } 386 387 static void pc_xen_hvm_init(MachineState *machine) 388 { 389 PCMachineState *pcms = PC_MACHINE(machine); 390 391 if (!xen_enabled()) { 392 error_report("xenfv machine requires the xen accelerator"); 393 exit(1); 394 } 395 396 pc_xen_hvm_init_pci(machine); 397 pci_create_simple(pcms->bus, -1, "xen-platform"); 398 } 399 #endif 400 401 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 402 static void pc_init_##suffix(MachineState *machine) \ 403 { \ 404 void (*compat)(MachineState *m) = (compatfn); \ 405 if (compat) { \ 406 compat(machine); \ 407 } \ 408 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 409 TYPE_I440FX_PCI_DEVICE); \ 410 } \ 411 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 412 413 static void pc_i440fx_machine_options(MachineClass *m) 414 { 415 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 416 pcmc->default_nic_model = "e1000"; 417 418 m->family = "pc_piix"; 419 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 420 m->default_machine_opts = "firmware=bios-256k.bin"; 421 m->default_display = "std"; 422 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 423 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); 424 } 425 426 static void pc_i440fx_5_1_machine_options(MachineClass *m) 427 { 428 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 429 pc_i440fx_machine_options(m); 430 m->alias = "pc"; 431 m->is_default = true; 432 pcmc->default_cpu_version = 1; 433 } 434 435 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, 436 pc_i440fx_5_1_machine_options); 437 438 static void pc_i440fx_5_0_machine_options(MachineClass *m) 439 { 440 pc_i440fx_5_1_machine_options(m); 441 m->alias = NULL; 442 m->is_default = false; 443 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); 444 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); 445 } 446 447 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, 448 pc_i440fx_5_0_machine_options); 449 450 static void pc_i440fx_4_2_machine_options(MachineClass *m) 451 { 452 pc_i440fx_5_0_machine_options(m); 453 m->alias = NULL; 454 m->is_default = false; 455 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 456 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 457 } 458 459 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, 460 pc_i440fx_4_2_machine_options); 461 462 static void pc_i440fx_4_1_machine_options(MachineClass *m) 463 { 464 pc_i440fx_4_2_machine_options(m); 465 m->alias = NULL; 466 m->is_default = false; 467 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 468 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 469 } 470 471 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, 472 pc_i440fx_4_1_machine_options); 473 474 static void pc_i440fx_4_0_machine_options(MachineClass *m) 475 { 476 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 477 pc_i440fx_4_1_machine_options(m); 478 m->alias = NULL; 479 m->is_default = false; 480 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 481 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 482 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 483 } 484 485 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 486 pc_i440fx_4_0_machine_options); 487 488 static void pc_i440fx_3_1_machine_options(MachineClass *m) 489 { 490 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 491 492 pc_i440fx_4_0_machine_options(m); 493 m->is_default = false; 494 pcmc->do_not_add_smb_acpi = true; 495 m->smbus_no_migration_support = true; 496 m->alias = NULL; 497 pcmc->pvh_enabled = false; 498 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 499 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 500 } 501 502 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 503 pc_i440fx_3_1_machine_options); 504 505 static void pc_i440fx_3_0_machine_options(MachineClass *m) 506 { 507 pc_i440fx_3_1_machine_options(m); 508 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 509 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 510 } 511 512 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 513 pc_i440fx_3_0_machine_options); 514 515 static void pc_i440fx_2_12_machine_options(MachineClass *m) 516 { 517 pc_i440fx_3_0_machine_options(m); 518 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 519 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 520 } 521 522 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 523 pc_i440fx_2_12_machine_options); 524 525 static void pc_i440fx_2_11_machine_options(MachineClass *m) 526 { 527 pc_i440fx_2_12_machine_options(m); 528 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 529 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 530 } 531 532 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 533 pc_i440fx_2_11_machine_options); 534 535 static void pc_i440fx_2_10_machine_options(MachineClass *m) 536 { 537 pc_i440fx_2_11_machine_options(m); 538 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 539 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 540 m->auto_enable_numa_with_memhp = false; 541 } 542 543 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 544 pc_i440fx_2_10_machine_options); 545 546 static void pc_i440fx_2_9_machine_options(MachineClass *m) 547 { 548 pc_i440fx_2_10_machine_options(m); 549 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 550 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 551 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram; 552 } 553 554 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 555 pc_i440fx_2_9_machine_options); 556 557 static void pc_i440fx_2_8_machine_options(MachineClass *m) 558 { 559 pc_i440fx_2_9_machine_options(m); 560 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 561 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 562 } 563 564 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 565 pc_i440fx_2_8_machine_options); 566 567 static void pc_i440fx_2_7_machine_options(MachineClass *m) 568 { 569 pc_i440fx_2_8_machine_options(m); 570 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 571 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 572 } 573 574 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 575 pc_i440fx_2_7_machine_options); 576 577 static void pc_i440fx_2_6_machine_options(MachineClass *m) 578 { 579 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 580 581 pc_i440fx_2_7_machine_options(m); 582 pcmc->legacy_cpu_hotplug = true; 583 pcmc->linuxboot_dma_enabled = false; 584 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 585 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 586 } 587 588 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 589 pc_i440fx_2_6_machine_options); 590 591 static void pc_i440fx_2_5_machine_options(MachineClass *m) 592 { 593 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 594 595 pc_i440fx_2_6_machine_options(m); 596 x86mc->save_tsc_khz = false; 597 m->legacy_fw_cfg_order = 1; 598 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 599 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 600 } 601 602 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 603 pc_i440fx_2_5_machine_options); 604 605 static void pc_i440fx_2_4_machine_options(MachineClass *m) 606 { 607 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 608 609 pc_i440fx_2_5_machine_options(m); 610 m->hw_version = "2.4.0"; 611 pcmc->broken_reserved_end = true; 612 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 613 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 614 } 615 616 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 617 pc_i440fx_2_4_machine_options) 618 619 static void pc_i440fx_2_3_machine_options(MachineClass *m) 620 { 621 pc_i440fx_2_4_machine_options(m); 622 m->hw_version = "2.3.0"; 623 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); 624 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); 625 } 626 627 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, 628 pc_i440fx_2_3_machine_options); 629 630 static void pc_i440fx_2_2_machine_options(MachineClass *m) 631 { 632 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 633 634 pc_i440fx_2_3_machine_options(m); 635 m->hw_version = "2.2.0"; 636 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 637 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); 638 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); 639 pcmc->rsdp_in_ram = false; 640 } 641 642 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, 643 pc_i440fx_2_2_machine_options); 644 645 static void pc_i440fx_2_1_machine_options(MachineClass *m) 646 { 647 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 648 649 pc_i440fx_2_2_machine_options(m); 650 m->hw_version = "2.1.0"; 651 m->default_display = NULL; 652 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len); 653 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len); 654 pcmc->smbios_uuid_encoded = false; 655 pcmc->enforce_aligned_dimm = false; 656 } 657 658 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, 659 pc_i440fx_2_1_machine_options); 660 661 static void pc_i440fx_2_0_machine_options(MachineClass *m) 662 { 663 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 664 665 pc_i440fx_2_1_machine_options(m); 666 m->hw_version = "2.0.0"; 667 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); 668 pcmc->smbios_legacy_mode = true; 669 pcmc->has_reserved_memory = false; 670 /* This value depends on the actual DSDT and SSDT compiled into 671 * the source QEMU; unfortunately it depends on the binary and 672 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 673 * both QEMU 1.7 and QEMU 2.0. 674 * 675 * Large variations cause migration to fail for more than one 676 * consecutive value of the "-smp" maxcpus option. 677 * 678 * For small variations of the kind caused by different iasl versions, 679 * the 4k rounding usually leaves slack. However, there could be still 680 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 681 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 682 * 683 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 684 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 685 */ 686 pcmc->legacy_acpi_table_size = 6652; 687 pcmc->acpi_data_size = 0x10000; 688 } 689 690 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, 691 pc_i440fx_2_0_machine_options); 692 693 static void pc_i440fx_1_7_machine_options(MachineClass *m) 694 { 695 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 696 697 pc_i440fx_2_0_machine_options(m); 698 m->hw_version = "1.7.0"; 699 m->default_machine_opts = NULL; 700 m->option_rom_has_mr = true; 701 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len); 702 pcmc->smbios_defaults = false; 703 pcmc->gigabyte_align = false; 704 pcmc->legacy_acpi_table_size = 6414; 705 } 706 707 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn, 708 pc_i440fx_1_7_machine_options); 709 710 static void pc_i440fx_1_6_machine_options(MachineClass *m) 711 { 712 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 713 714 pc_i440fx_1_7_machine_options(m); 715 m->hw_version = "1.6.0"; 716 m->rom_file_has_mr = false; 717 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len); 718 pcmc->has_acpi_build = false; 719 } 720 721 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn, 722 pc_i440fx_1_6_machine_options); 723 724 static void pc_i440fx_1_5_machine_options(MachineClass *m) 725 { 726 pc_i440fx_1_6_machine_options(m); 727 m->hw_version = "1.5.0"; 728 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len); 729 } 730 731 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn, 732 pc_i440fx_1_5_machine_options); 733 734 static void pc_i440fx_1_4_machine_options(MachineClass *m) 735 { 736 pc_i440fx_1_5_machine_options(m); 737 m->hw_version = "1.4.0"; 738 m->hot_add_cpu = NULL; 739 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len); 740 } 741 742 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn, 743 pc_i440fx_1_4_machine_options); 744 745 static void pc_i440fx_1_3_machine_options(MachineClass *m) 746 { 747 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 748 static GlobalProperty compat[] = { 749 PC_CPU_MODEL_IDS("1.3.0") 750 { "usb-tablet", "usb_version", "1" }, 751 { "virtio-net-pci", "ctrl_mac_addr", "off" }, 752 { "virtio-net-pci", "mq", "off" }, 753 { "e1000", "autonegotiation", "off" }, 754 }; 755 756 pc_i440fx_1_4_machine_options(m); 757 m->hw_version = "1.3.0"; 758 m->deprecation_reason = "use a newer machine type instead"; 759 x86mc->compat_apic_id_mode = true; 760 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 761 } 762 763 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3, 764 pc_i440fx_1_3_machine_options); 765 766 767 static void pc_i440fx_1_2_machine_options(MachineClass *m) 768 { 769 static GlobalProperty compat[] = { 770 PC_CPU_MODEL_IDS("1.2.0") 771 { "nec-usb-xhci", "msi", "off" }, 772 { "nec-usb-xhci", "msix", "off" }, 773 { "qxl", "revision", "3" }, 774 { "qxl-vga", "revision", "3" }, 775 { "VGA", "mmio", "off" }, 776 }; 777 778 pc_i440fx_1_3_machine_options(m); 779 m->hw_version = "1.2.0"; 780 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 781 } 782 783 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2, 784 pc_i440fx_1_2_machine_options); 785 786 787 static void pc_i440fx_1_1_machine_options(MachineClass *m) 788 { 789 static GlobalProperty compat[] = { 790 PC_CPU_MODEL_IDS("1.1.0") 791 { "virtio-scsi-pci", "hotplug", "off" }, 792 { "virtio-scsi-pci", "param_change", "off" }, 793 { "VGA", "vgamem_mb", "8" }, 794 { "vmware-svga", "vgamem_mb", "8" }, 795 { "qxl-vga", "vgamem_mb", "8" }, 796 { "qxl", "vgamem_mb", "8" }, 797 { "virtio-blk-pci", "config-wce", "off" }, 798 }; 799 800 pc_i440fx_1_2_machine_options(m); 801 m->hw_version = "1.1.0"; 802 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 803 } 804 805 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2, 806 pc_i440fx_1_1_machine_options); 807 808 static void pc_i440fx_1_0_machine_options(MachineClass *m) 809 { 810 static GlobalProperty compat[] = { 811 PC_CPU_MODEL_IDS("1.0") 812 { TYPE_ISA_FDC, "check_media_rate", "off" }, 813 { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) }, 814 { "apic-common", "vapic", "off" }, 815 { TYPE_USB_DEVICE, "full-path", "no" }, 816 }; 817 818 pc_i440fx_1_1_machine_options(m); 819 m->hw_version = "1.0"; 820 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat)); 821 } 822 823 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2, 824 pc_i440fx_1_0_machine_options); 825 826 827 typedef struct { 828 uint16_t gpu_device_id; 829 uint16_t pch_device_id; 830 uint8_t pch_revision_id; 831 } IGDDeviceIDInfo; 832 833 /* In real world different GPU should have different PCH. But actually 834 * the different PCH DIDs likely map to different PCH SKUs. We do the 835 * same thing for the GPU. For PCH, the different SKUs are going to be 836 * all the same silicon design and implementation, just different 837 * features turn on and off with fuses. The SW interfaces should be 838 * consistent across all SKUs in a given family (eg LPT). But just same 839 * features may not be supported. 840 * 841 * Most of these different PCH features probably don't matter to the 842 * Gfx driver, but obviously any difference in display port connections 843 * will so it should be fine with any PCH in case of passthrough. 844 * 845 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 846 * scenarios, 0x9cc3 for BDW(Broadwell). 847 */ 848 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 849 /* HSW Classic */ 850 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 851 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 852 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 853 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 854 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 855 /* HSW ULT */ 856 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 857 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 858 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 859 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 860 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 861 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 862 /* HSW CRW */ 863 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 864 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 865 /* HSW Server */ 866 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 867 /* HSW SRVR */ 868 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 869 /* BSW */ 870 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 871 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 872 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 873 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 874 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 875 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 876 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 877 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 878 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 879 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 880 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 881 }; 882 883 static void isa_bridge_class_init(ObjectClass *klass, void *data) 884 { 885 DeviceClass *dc = DEVICE_CLASS(klass); 886 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 887 888 dc->desc = "ISA bridge faked to support IGD PT"; 889 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 890 k->vendor_id = PCI_VENDOR_ID_INTEL; 891 k->class_id = PCI_CLASS_BRIDGE_ISA; 892 }; 893 894 static TypeInfo isa_bridge_info = { 895 .name = "igd-passthrough-isa-bridge", 896 .parent = TYPE_PCI_DEVICE, 897 .instance_size = sizeof(PCIDevice), 898 .class_init = isa_bridge_class_init, 899 .interfaces = (InterfaceInfo[]) { 900 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 901 { }, 902 }, 903 }; 904 905 static void pt_graphics_register_types(void) 906 { 907 type_register_static(&isa_bridge_info); 908 } 909 type_init(pt_graphics_register_types) 910 911 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 912 { 913 struct PCIDevice *bridge_dev; 914 int i, num; 915 uint16_t pch_dev_id = 0xffff; 916 uint8_t pch_rev_id; 917 918 num = ARRAY_SIZE(igd_combo_id_infos); 919 for (i = 0; i < num; i++) { 920 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 921 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 922 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 923 } 924 } 925 926 if (pch_dev_id == 0xffff) { 927 return; 928 } 929 930 /* Currently IGD drivers always need to access PCH by 1f.0. */ 931 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 932 "igd-passthrough-isa-bridge"); 933 934 /* 935 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 936 */ 937 if (!bridge_dev) { 938 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 939 return; 940 } 941 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 942 pci_config_set_revision(bridge_dev->config, pch_rev_id); 943 } 944 945 static void isapc_machine_options(MachineClass *m) 946 { 947 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 948 m->desc = "ISA-only PC"; 949 m->max_cpus = 1; 950 m->option_rom_has_mr = true; 951 m->rom_file_has_mr = false; 952 pcmc->pci_enabled = false; 953 pcmc->has_acpi_build = false; 954 pcmc->smbios_defaults = false; 955 pcmc->gigabyte_align = false; 956 pcmc->smbios_legacy_mode = true; 957 pcmc->has_reserved_memory = false; 958 pcmc->default_nic_model = "ne2k_isa"; 959 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 960 } 961 962 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 963 isapc_machine_options); 964 965 966 #ifdef CONFIG_XEN 967 static void xenfv_4_2_machine_options(MachineClass *m) 968 { 969 pc_i440fx_4_2_machine_options(m); 970 m->desc = "Xen Fully-virtualized PC"; 971 m->max_cpus = HVM_MAX_VCPUS; 972 m->default_machine_opts = "accel=xen"; 973 } 974 975 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, 976 xenfv_4_2_machine_options); 977 978 static void xenfv_3_1_machine_options(MachineClass *m) 979 { 980 pc_i440fx_3_1_machine_options(m); 981 m->desc = "Xen Fully-virtualized PC"; 982 m->alias = "xenfv"; 983 m->max_cpus = HVM_MAX_VCPUS; 984 m->default_machine_opts = "accel=xen"; 985 } 986 987 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, 988 xenfv_3_1_machine_options); 989 #endif 990