1a39c1d47SJan Kiszka /* 2a39c1d47SJan Kiszka * KVM in-kernel IOPIC support 3a39c1d47SJan Kiszka * 4a39c1d47SJan Kiszka * Copyright (c) 2011 Siemens AG 5a39c1d47SJan Kiszka * 6a39c1d47SJan Kiszka * Authors: 7a39c1d47SJan Kiszka * Jan Kiszka <jan.kiszka@siemens.com> 8a39c1d47SJan Kiszka * 9a39c1d47SJan Kiszka * This work is licensed under the terms of the GNU GPL version 2. 10a39c1d47SJan Kiszka * See the COPYING file in the top-level directory. 11a39c1d47SJan Kiszka */ 12a39c1d47SJan Kiszka 13*d665d696SPavel Butsykin #include "monitor/monitor.h" 140d09e41aSPaolo Bonzini #include "hw/i386/pc.h" 150d09e41aSPaolo Bonzini #include "hw/i386/ioapic_internal.h" 160d09e41aSPaolo Bonzini #include "hw/i386/apic_internal.h" 179c17d615SPaolo Bonzini #include "sysemu/kvm.h" 18a39c1d47SJan Kiszka 19d8ee0384SJason Baron /* PC Utility function */ 20d8ee0384SJason Baron void kvm_pc_setup_irq_routing(bool pci_enabled) 21d8ee0384SJason Baron { 22d8ee0384SJason Baron KVMState *s = kvm_state; 23d8ee0384SJason Baron int i; 24d8ee0384SJason Baron 25d8ee0384SJason Baron if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { 26d8ee0384SJason Baron for (i = 0; i < 8; ++i) { 27d8ee0384SJason Baron if (i == 2) { 28d8ee0384SJason Baron continue; 29d8ee0384SJason Baron } 30d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i); 31d8ee0384SJason Baron } 32d8ee0384SJason Baron for (i = 8; i < 16; ++i) { 33d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8); 34d8ee0384SJason Baron } 35d8ee0384SJason Baron if (pci_enabled) { 36d8ee0384SJason Baron for (i = 0; i < 24; ++i) { 37d8ee0384SJason Baron if (i == 0) { 38d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2); 39d8ee0384SJason Baron } else if (i != 2) { 40d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i); 41d8ee0384SJason Baron } 42d8ee0384SJason Baron } 43d8ee0384SJason Baron } 44cb925cf9SAlexander Graf kvm_irqchip_commit_routes(s); 45d8ee0384SJason Baron } 46d8ee0384SJason Baron } 47d8ee0384SJason Baron 48d8ee0384SJason Baron void kvm_pc_gsi_handler(void *opaque, int n, int level) 49d8ee0384SJason Baron { 50d8ee0384SJason Baron GSIState *s = opaque; 51d8ee0384SJason Baron 52d8ee0384SJason Baron if (n < ISA_NUM_IRQS) { 53d8ee0384SJason Baron /* Kernel will forward to both PIC and IOAPIC */ 54d8ee0384SJason Baron qemu_set_irq(s->i8259_irq[n], level); 55d8ee0384SJason Baron } else { 56d8ee0384SJason Baron qemu_set_irq(s->ioapic_irq[n], level); 57d8ee0384SJason Baron } 58d8ee0384SJason Baron } 59d8ee0384SJason Baron 60a39c1d47SJan Kiszka typedef struct KVMIOAPICState KVMIOAPICState; 61a39c1d47SJan Kiszka 62a39c1d47SJan Kiszka struct KVMIOAPICState { 63a39c1d47SJan Kiszka IOAPICCommonState ioapic; 64a39c1d47SJan Kiszka uint32_t kvm_gsi_base; 65a39c1d47SJan Kiszka }; 66a39c1d47SJan Kiszka 67a39c1d47SJan Kiszka static void kvm_ioapic_get(IOAPICCommonState *s) 68a39c1d47SJan Kiszka { 69a39c1d47SJan Kiszka struct kvm_irqchip chip; 70a39c1d47SJan Kiszka struct kvm_ioapic_state *kioapic; 71a39c1d47SJan Kiszka int ret, i; 72a39c1d47SJan Kiszka 73a39c1d47SJan Kiszka chip.chip_id = KVM_IRQCHIP_IOAPIC; 74a39c1d47SJan Kiszka ret = kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, &chip); 75a39c1d47SJan Kiszka if (ret < 0) { 76a39c1d47SJan Kiszka fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(ret)); 77a39c1d47SJan Kiszka abort(); 78a39c1d47SJan Kiszka } 79a39c1d47SJan Kiszka 80a39c1d47SJan Kiszka kioapic = &chip.chip.ioapic; 81a39c1d47SJan Kiszka 82a39c1d47SJan Kiszka s->id = kioapic->id; 83a39c1d47SJan Kiszka s->ioregsel = kioapic->ioregsel; 84a39c1d47SJan Kiszka s->irr = kioapic->irr; 85a39c1d47SJan Kiszka for (i = 0; i < IOAPIC_NUM_PINS; i++) { 86a39c1d47SJan Kiszka s->ioredtbl[i] = kioapic->redirtbl[i].bits; 87a39c1d47SJan Kiszka } 88a39c1d47SJan Kiszka } 89a39c1d47SJan Kiszka 90a39c1d47SJan Kiszka static void kvm_ioapic_put(IOAPICCommonState *s) 91a39c1d47SJan Kiszka { 92a39c1d47SJan Kiszka struct kvm_irqchip chip; 93a39c1d47SJan Kiszka struct kvm_ioapic_state *kioapic; 94a39c1d47SJan Kiszka int ret, i; 95a39c1d47SJan Kiszka 96a39c1d47SJan Kiszka chip.chip_id = KVM_IRQCHIP_IOAPIC; 97a39c1d47SJan Kiszka kioapic = &chip.chip.ioapic; 98a39c1d47SJan Kiszka 99a39c1d47SJan Kiszka kioapic->id = s->id; 100a39c1d47SJan Kiszka kioapic->ioregsel = s->ioregsel; 101a39c1d47SJan Kiszka kioapic->base_address = s->busdev.mmio[0].addr; 102a39c1d47SJan Kiszka kioapic->irr = s->irr; 103a39c1d47SJan Kiszka for (i = 0; i < IOAPIC_NUM_PINS; i++) { 104a39c1d47SJan Kiszka kioapic->redirtbl[i].bits = s->ioredtbl[i]; 105a39c1d47SJan Kiszka } 106a39c1d47SJan Kiszka 107a39c1d47SJan Kiszka ret = kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, &chip); 108a39c1d47SJan Kiszka if (ret < 0) { 109a39c1d47SJan Kiszka fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(ret)); 110a39c1d47SJan Kiszka abort(); 111a39c1d47SJan Kiszka } 112a39c1d47SJan Kiszka } 113a39c1d47SJan Kiszka 114*d665d696SPavel Butsykin void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict) 115*d665d696SPavel Butsykin { 116*d665d696SPavel Butsykin IOAPICCommonState s; 117*d665d696SPavel Butsykin 118*d665d696SPavel Butsykin kvm_ioapic_get(&s); 119*d665d696SPavel Butsykin 120*d665d696SPavel Butsykin ioapic_print_redtbl(mon, &s); 121*d665d696SPavel Butsykin } 122*d665d696SPavel Butsykin 123a39c1d47SJan Kiszka static void kvm_ioapic_reset(DeviceState *dev) 124a39c1d47SJan Kiszka { 125b3119631SAndreas Färber IOAPICCommonState *s = IOAPIC_COMMON(dev); 126a39c1d47SJan Kiszka 127a39c1d47SJan Kiszka ioapic_reset_common(dev); 128a39c1d47SJan Kiszka kvm_ioapic_put(s); 129a39c1d47SJan Kiszka } 130a39c1d47SJan Kiszka 131a39c1d47SJan Kiszka static void kvm_ioapic_set_irq(void *opaque, int irq, int level) 132a39c1d47SJan Kiszka { 133a39c1d47SJan Kiszka KVMIOAPICState *s = opaque; 134a39c1d47SJan Kiszka int delivered; 135a39c1d47SJan Kiszka 1363889c3faSPeter Maydell delivered = kvm_set_irq(kvm_state, s->kvm_gsi_base + irq, level); 137a39c1d47SJan Kiszka apic_report_irq_delivered(delivered); 138a39c1d47SJan Kiszka } 139a39c1d47SJan Kiszka 140db0f8888Sxiaoqiang zhao static void kvm_ioapic_realize(DeviceState *dev, Error **errp) 141a39c1d47SJan Kiszka { 142db0f8888Sxiaoqiang zhao IOAPICCommonState *s = IOAPIC_COMMON(dev); 143f9771858Sxiaoqiang zhao 1442c9b15caSPaolo Bonzini memory_region_init_reservation(&s->io_memory, NULL, "kvm-ioapic", 0x1000); 145a39c1d47SJan Kiszka 146f9771858Sxiaoqiang zhao qdev_init_gpio_in(dev, kvm_ioapic_set_irq, IOAPIC_NUM_PINS); 147a39c1d47SJan Kiszka } 148a39c1d47SJan Kiszka 14939bffca2SAnthony Liguori static Property kvm_ioapic_properties[] = { 15039bffca2SAnthony Liguori DEFINE_PROP_UINT32("gsi_base", KVMIOAPICState, kvm_gsi_base, 0), 15139bffca2SAnthony Liguori DEFINE_PROP_END_OF_LIST() 15239bffca2SAnthony Liguori }; 15339bffca2SAnthony Liguori 154999e12bbSAnthony Liguori static void kvm_ioapic_class_init(ObjectClass *klass, void *data) 155999e12bbSAnthony Liguori { 156999e12bbSAnthony Liguori IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass); 15739bffca2SAnthony Liguori DeviceClass *dc = DEVICE_CLASS(klass); 158999e12bbSAnthony Liguori 159db0f8888Sxiaoqiang zhao k->realize = kvm_ioapic_realize; 160999e12bbSAnthony Liguori k->pre_save = kvm_ioapic_get; 161999e12bbSAnthony Liguori k->post_load = kvm_ioapic_put; 16239bffca2SAnthony Liguori dc->reset = kvm_ioapic_reset; 16339bffca2SAnthony Liguori dc->props = kvm_ioapic_properties; 164999e12bbSAnthony Liguori } 165999e12bbSAnthony Liguori 1668c43a6f0SAndreas Färber static const TypeInfo kvm_ioapic_info = { 167999e12bbSAnthony Liguori .name = "kvm-ioapic", 16839bffca2SAnthony Liguori .parent = TYPE_IOAPIC_COMMON, 16939bffca2SAnthony Liguori .instance_size = sizeof(KVMIOAPICState), 170999e12bbSAnthony Liguori .class_init = kvm_ioapic_class_init, 171a39c1d47SJan Kiszka }; 172a39c1d47SJan Kiszka 17383f7d43aSAndreas Färber static void kvm_ioapic_register_types(void) 174a39c1d47SJan Kiszka { 17539bffca2SAnthony Liguori type_register_static(&kvm_ioapic_info); 176a39c1d47SJan Kiszka } 177a39c1d47SJan Kiszka 17883f7d43aSAndreas Färber type_init(kvm_ioapic_register_types) 179