1a39c1d47SJan Kiszka /* 2a39c1d47SJan Kiszka * KVM in-kernel IOPIC support 3a39c1d47SJan Kiszka * 4a39c1d47SJan Kiszka * Copyright (c) 2011 Siemens AG 5a39c1d47SJan Kiszka * 6a39c1d47SJan Kiszka * Authors: 7a39c1d47SJan Kiszka * Jan Kiszka <jan.kiszka@siemens.com> 8a39c1d47SJan Kiszka * 9a39c1d47SJan Kiszka * This work is licensed under the terms of the GNU GPL version 2. 10a39c1d47SJan Kiszka * See the COPYING file in the top-level directory. 11a39c1d47SJan Kiszka */ 12a39c1d47SJan Kiszka 13b6a0aa05SPeter Maydell #include "qemu/osdep.h" 14d665d696SPavel Butsykin #include "monitor/monitor.h" 1589a289c7SPaolo Bonzini #include "hw/i386/x86.h" 1664552b6bSMarkus Armbruster #include "hw/irq.h" 17a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 180d09e41aSPaolo Bonzini #include "hw/i386/ioapic_internal.h" 190d09e41aSPaolo Bonzini #include "hw/i386/apic_internal.h" 209c17d615SPaolo Bonzini #include "sysemu/kvm.h" 21a39c1d47SJan Kiszka 22d8ee0384SJason Baron /* PC Utility function */ 23d8ee0384SJason Baron void kvm_pc_setup_irq_routing(bool pci_enabled) 24d8ee0384SJason Baron { 25d8ee0384SJason Baron KVMState *s = kvm_state; 26d8ee0384SJason Baron int i; 27d8ee0384SJason Baron 28d8ee0384SJason Baron if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { 29d8ee0384SJason Baron for (i = 0; i < 8; ++i) { 30d8ee0384SJason Baron if (i == 2) { 31d8ee0384SJason Baron continue; 32d8ee0384SJason Baron } 33d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i); 34d8ee0384SJason Baron } 35d8ee0384SJason Baron for (i = 8; i < 16; ++i) { 36d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8); 37d8ee0384SJason Baron } 38d8ee0384SJason Baron if (pci_enabled) { 39d8ee0384SJason Baron for (i = 0; i < 24; ++i) { 40d8ee0384SJason Baron if (i == 0) { 41d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2); 42d8ee0384SJason Baron } else if (i != 2) { 43d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i); 44d8ee0384SJason Baron } 45d8ee0384SJason Baron } 46d8ee0384SJason Baron } 47cb925cf9SAlexander Graf kvm_irqchip_commit_routes(s); 48d8ee0384SJason Baron } 49d8ee0384SJason Baron } 50d8ee0384SJason Baron 51a39c1d47SJan Kiszka typedef struct KVMIOAPICState KVMIOAPICState; 52a39c1d47SJan Kiszka 53a39c1d47SJan Kiszka struct KVMIOAPICState { 54a39c1d47SJan Kiszka IOAPICCommonState ioapic; 55a39c1d47SJan Kiszka uint32_t kvm_gsi_base; 56a39c1d47SJan Kiszka }; 57a39c1d47SJan Kiszka 58a39c1d47SJan Kiszka static void kvm_ioapic_get(IOAPICCommonState *s) 59a39c1d47SJan Kiszka { 60a39c1d47SJan Kiszka struct kvm_irqchip chip; 61a39c1d47SJan Kiszka struct kvm_ioapic_state *kioapic; 62a39c1d47SJan Kiszka int ret, i; 63a39c1d47SJan Kiszka 64a39c1d47SJan Kiszka chip.chip_id = KVM_IRQCHIP_IOAPIC; 65a39c1d47SJan Kiszka ret = kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, &chip); 66a39c1d47SJan Kiszka if (ret < 0) { 67a39c1d47SJan Kiszka fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(ret)); 68a39c1d47SJan Kiszka abort(); 69a39c1d47SJan Kiszka } 70a39c1d47SJan Kiszka 71a39c1d47SJan Kiszka kioapic = &chip.chip.ioapic; 72a39c1d47SJan Kiszka 73a39c1d47SJan Kiszka s->id = kioapic->id; 74a39c1d47SJan Kiszka s->ioregsel = kioapic->ioregsel; 75a39c1d47SJan Kiszka s->irr = kioapic->irr; 76a39c1d47SJan Kiszka for (i = 0; i < IOAPIC_NUM_PINS; i++) { 77a39c1d47SJan Kiszka s->ioredtbl[i] = kioapic->redirtbl[i].bits; 78a39c1d47SJan Kiszka } 79a39c1d47SJan Kiszka } 80a39c1d47SJan Kiszka 81a39c1d47SJan Kiszka static void kvm_ioapic_put(IOAPICCommonState *s) 82a39c1d47SJan Kiszka { 83a39c1d47SJan Kiszka struct kvm_irqchip chip; 84a39c1d47SJan Kiszka struct kvm_ioapic_state *kioapic; 85a39c1d47SJan Kiszka int ret, i; 86a39c1d47SJan Kiszka 87a39c1d47SJan Kiszka chip.chip_id = KVM_IRQCHIP_IOAPIC; 88a39c1d47SJan Kiszka kioapic = &chip.chip.ioapic; 89a39c1d47SJan Kiszka 90a39c1d47SJan Kiszka kioapic->id = s->id; 91a39c1d47SJan Kiszka kioapic->ioregsel = s->ioregsel; 92a39c1d47SJan Kiszka kioapic->base_address = s->busdev.mmio[0].addr; 93a39c1d47SJan Kiszka kioapic->irr = s->irr; 94a39c1d47SJan Kiszka for (i = 0; i < IOAPIC_NUM_PINS; i++) { 95a39c1d47SJan Kiszka kioapic->redirtbl[i].bits = s->ioredtbl[i]; 96a39c1d47SJan Kiszka } 97a39c1d47SJan Kiszka 98a39c1d47SJan Kiszka ret = kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, &chip); 99a39c1d47SJan Kiszka if (ret < 0) { 100*b22c2a68SKenta Ishiguro fprintf(stderr, "KVM_SET_IRQCHIP failed: %s\n", strerror(ret)); 101a39c1d47SJan Kiszka abort(); 102a39c1d47SJan Kiszka } 103a39c1d47SJan Kiszka } 104a39c1d47SJan Kiszka 105a39c1d47SJan Kiszka static void kvm_ioapic_reset(DeviceState *dev) 106a39c1d47SJan Kiszka { 107b3119631SAndreas Färber IOAPICCommonState *s = IOAPIC_COMMON(dev); 108a39c1d47SJan Kiszka 109a39c1d47SJan Kiszka ioapic_reset_common(dev); 110a39c1d47SJan Kiszka kvm_ioapic_put(s); 111a39c1d47SJan Kiszka } 112a39c1d47SJan Kiszka 113a39c1d47SJan Kiszka static void kvm_ioapic_set_irq(void *opaque, int irq, int level) 114a39c1d47SJan Kiszka { 115a39c1d47SJan Kiszka KVMIOAPICState *s = opaque; 116cce5405eSPeter Xu IOAPICCommonState *common = IOAPIC_COMMON(s); 117a39c1d47SJan Kiszka int delivered; 118a39c1d47SJan Kiszka 119cce5405eSPeter Xu ioapic_stat_update_irq(common, irq, level); 1203889c3faSPeter Maydell delivered = kvm_set_irq(kvm_state, s->kvm_gsi_base + irq, level); 121a39c1d47SJan Kiszka apic_report_irq_delivered(delivered); 122a39c1d47SJan Kiszka } 123a39c1d47SJan Kiszka 124db0f8888Sxiaoqiang zhao static void kvm_ioapic_realize(DeviceState *dev, Error **errp) 125a39c1d47SJan Kiszka { 126db0f8888Sxiaoqiang zhao IOAPICCommonState *s = IOAPIC_COMMON(dev); 127f9771858Sxiaoqiang zhao 128257a7430SPaolo Bonzini memory_region_init_io(&s->io_memory, OBJECT(dev), NULL, NULL, "kvm-ioapic", 0x1000); 129b7a4104bSPeter Xu /* 130b7a4104bSPeter Xu * KVM ioapic only supports 0x11 now. This will only be used when 131b7a4104bSPeter Xu * we want to dump ioapic version. 132b7a4104bSPeter Xu */ 133b7a4104bSPeter Xu s->version = 0x11; 134a39c1d47SJan Kiszka 135f9771858Sxiaoqiang zhao qdev_init_gpio_in(dev, kvm_ioapic_set_irq, IOAPIC_NUM_PINS); 136a39c1d47SJan Kiszka } 137a39c1d47SJan Kiszka 13839bffca2SAnthony Liguori static Property kvm_ioapic_properties[] = { 13939bffca2SAnthony Liguori DEFINE_PROP_UINT32("gsi_base", KVMIOAPICState, kvm_gsi_base, 0), 14039bffca2SAnthony Liguori DEFINE_PROP_END_OF_LIST() 14139bffca2SAnthony Liguori }; 14239bffca2SAnthony Liguori 143999e12bbSAnthony Liguori static void kvm_ioapic_class_init(ObjectClass *klass, void *data) 144999e12bbSAnthony Liguori { 145999e12bbSAnthony Liguori IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass); 14639bffca2SAnthony Liguori DeviceClass *dc = DEVICE_CLASS(klass); 147999e12bbSAnthony Liguori 148db0f8888Sxiaoqiang zhao k->realize = kvm_ioapic_realize; 149999e12bbSAnthony Liguori k->pre_save = kvm_ioapic_get; 150999e12bbSAnthony Liguori k->post_load = kvm_ioapic_put; 15139bffca2SAnthony Liguori dc->reset = kvm_ioapic_reset; 1524f67d30bSMarc-André Lureau device_class_set_props(dc, kvm_ioapic_properties); 153999e12bbSAnthony Liguori } 154999e12bbSAnthony Liguori 1558c43a6f0SAndreas Färber static const TypeInfo kvm_ioapic_info = { 15634bec7a8SLi Qiang .name = TYPE_KVM_IOAPIC, 15739bffca2SAnthony Liguori .parent = TYPE_IOAPIC_COMMON, 15839bffca2SAnthony Liguori .instance_size = sizeof(KVMIOAPICState), 159999e12bbSAnthony Liguori .class_init = kvm_ioapic_class_init, 160a39c1d47SJan Kiszka }; 161a39c1d47SJan Kiszka 16283f7d43aSAndreas Färber static void kvm_ioapic_register_types(void) 163a39c1d47SJan Kiszka { 16439bffca2SAnthony Liguori type_register_static(&kvm_ioapic_info); 165a39c1d47SJan Kiszka } 166a39c1d47SJan Kiszka 16783f7d43aSAndreas Färber type_init(kvm_ioapic_register_types) 168