1a39c1d47SJan Kiszka /* 2a39c1d47SJan Kiszka * KVM in-kernel IOPIC support 3a39c1d47SJan Kiszka * 4a39c1d47SJan Kiszka * Copyright (c) 2011 Siemens AG 5a39c1d47SJan Kiszka * 6a39c1d47SJan Kiszka * Authors: 7a39c1d47SJan Kiszka * Jan Kiszka <jan.kiszka@siemens.com> 8a39c1d47SJan Kiszka * 9a39c1d47SJan Kiszka * This work is licensed under the terms of the GNU GPL version 2. 10a39c1d47SJan Kiszka * See the COPYING file in the top-level directory. 11a39c1d47SJan Kiszka */ 12a39c1d47SJan Kiszka 13b6a0aa05SPeter Maydell #include "qemu/osdep.h" 14d665d696SPavel Butsykin #include "monitor/monitor.h" 1589a289c7SPaolo Bonzini #include "hw/i386/x86.h" 1664552b6bSMarkus Armbruster #include "hw/irq.h" 17a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 180d09e41aSPaolo Bonzini #include "hw/i386/ioapic_internal.h" 190d09e41aSPaolo Bonzini #include "hw/i386/apic_internal.h" 209c17d615SPaolo Bonzini #include "sysemu/kvm.h" 21a39c1d47SJan Kiszka 22d8ee0384SJason Baron /* PC Utility function */ 23d8ee0384SJason Baron void kvm_pc_setup_irq_routing(bool pci_enabled) 24d8ee0384SJason Baron { 25d8ee0384SJason Baron KVMState *s = kvm_state; 26d8ee0384SJason Baron int i; 27d8ee0384SJason Baron 28*8981bae2SEduardo Habkost assert(kvm_has_gsi_routing()); 29d8ee0384SJason Baron for (i = 0; i < 8; ++i) { 30d8ee0384SJason Baron if (i == 2) { 31d8ee0384SJason Baron continue; 32d8ee0384SJason Baron } 33d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i); 34d8ee0384SJason Baron } 35d8ee0384SJason Baron for (i = 8; i < 16; ++i) { 36d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8); 37d8ee0384SJason Baron } 38d8ee0384SJason Baron if (pci_enabled) { 39d8ee0384SJason Baron for (i = 0; i < 24; ++i) { 40d8ee0384SJason Baron if (i == 0) { 41d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2); 42d8ee0384SJason Baron } else if (i != 2) { 43d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i); 44d8ee0384SJason Baron } 45d8ee0384SJason Baron } 46d8ee0384SJason Baron } 47cb925cf9SAlexander Graf kvm_irqchip_commit_routes(s); 48d8ee0384SJason Baron } 49d8ee0384SJason Baron 50a39c1d47SJan Kiszka typedef struct KVMIOAPICState KVMIOAPICState; 51a39c1d47SJan Kiszka 52a39c1d47SJan Kiszka struct KVMIOAPICState { 53a39c1d47SJan Kiszka IOAPICCommonState ioapic; 54a39c1d47SJan Kiszka uint32_t kvm_gsi_base; 55a39c1d47SJan Kiszka }; 56a39c1d47SJan Kiszka 57a39c1d47SJan Kiszka static void kvm_ioapic_get(IOAPICCommonState *s) 58a39c1d47SJan Kiszka { 59a39c1d47SJan Kiszka struct kvm_irqchip chip; 60a39c1d47SJan Kiszka struct kvm_ioapic_state *kioapic; 61a39c1d47SJan Kiszka int ret, i; 62a39c1d47SJan Kiszka 63a39c1d47SJan Kiszka chip.chip_id = KVM_IRQCHIP_IOAPIC; 64a39c1d47SJan Kiszka ret = kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, &chip); 65a39c1d47SJan Kiszka if (ret < 0) { 66a39c1d47SJan Kiszka fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(ret)); 67a39c1d47SJan Kiszka abort(); 68a39c1d47SJan Kiszka } 69a39c1d47SJan Kiszka 70a39c1d47SJan Kiszka kioapic = &chip.chip.ioapic; 71a39c1d47SJan Kiszka 72a39c1d47SJan Kiszka s->id = kioapic->id; 73a39c1d47SJan Kiszka s->ioregsel = kioapic->ioregsel; 74a39c1d47SJan Kiszka s->irr = kioapic->irr; 75a39c1d47SJan Kiszka for (i = 0; i < IOAPIC_NUM_PINS; i++) { 76a39c1d47SJan Kiszka s->ioredtbl[i] = kioapic->redirtbl[i].bits; 77a39c1d47SJan Kiszka } 78a39c1d47SJan Kiszka } 79a39c1d47SJan Kiszka 80a39c1d47SJan Kiszka static void kvm_ioapic_put(IOAPICCommonState *s) 81a39c1d47SJan Kiszka { 82a39c1d47SJan Kiszka struct kvm_irqchip chip; 83a39c1d47SJan Kiszka struct kvm_ioapic_state *kioapic; 84a39c1d47SJan Kiszka int ret, i; 85a39c1d47SJan Kiszka 86a39c1d47SJan Kiszka chip.chip_id = KVM_IRQCHIP_IOAPIC; 87a39c1d47SJan Kiszka kioapic = &chip.chip.ioapic; 88a39c1d47SJan Kiszka 89a39c1d47SJan Kiszka kioapic->id = s->id; 90a39c1d47SJan Kiszka kioapic->ioregsel = s->ioregsel; 91a39c1d47SJan Kiszka kioapic->base_address = s->busdev.mmio[0].addr; 92a39c1d47SJan Kiszka kioapic->irr = s->irr; 93a39c1d47SJan Kiszka for (i = 0; i < IOAPIC_NUM_PINS; i++) { 94a39c1d47SJan Kiszka kioapic->redirtbl[i].bits = s->ioredtbl[i]; 95a39c1d47SJan Kiszka } 96a39c1d47SJan Kiszka 97a39c1d47SJan Kiszka ret = kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, &chip); 98a39c1d47SJan Kiszka if (ret < 0) { 99b22c2a68SKenta Ishiguro fprintf(stderr, "KVM_SET_IRQCHIP failed: %s\n", strerror(ret)); 100a39c1d47SJan Kiszka abort(); 101a39c1d47SJan Kiszka } 102a39c1d47SJan Kiszka } 103a39c1d47SJan Kiszka 104a39c1d47SJan Kiszka static void kvm_ioapic_reset(DeviceState *dev) 105a39c1d47SJan Kiszka { 106b3119631SAndreas Färber IOAPICCommonState *s = IOAPIC_COMMON(dev); 107a39c1d47SJan Kiszka 108a39c1d47SJan Kiszka ioapic_reset_common(dev); 109a39c1d47SJan Kiszka kvm_ioapic_put(s); 110a39c1d47SJan Kiszka } 111a39c1d47SJan Kiszka 112a39c1d47SJan Kiszka static void kvm_ioapic_set_irq(void *opaque, int irq, int level) 113a39c1d47SJan Kiszka { 114a39c1d47SJan Kiszka KVMIOAPICState *s = opaque; 115cce5405eSPeter Xu IOAPICCommonState *common = IOAPIC_COMMON(s); 116a39c1d47SJan Kiszka int delivered; 117a39c1d47SJan Kiszka 118cce5405eSPeter Xu ioapic_stat_update_irq(common, irq, level); 1193889c3faSPeter Maydell delivered = kvm_set_irq(kvm_state, s->kvm_gsi_base + irq, level); 120a39c1d47SJan Kiszka apic_report_irq_delivered(delivered); 121a39c1d47SJan Kiszka } 122a39c1d47SJan Kiszka 123db0f8888Sxiaoqiang zhao static void kvm_ioapic_realize(DeviceState *dev, Error **errp) 124a39c1d47SJan Kiszka { 125db0f8888Sxiaoqiang zhao IOAPICCommonState *s = IOAPIC_COMMON(dev); 126f9771858Sxiaoqiang zhao 127257a7430SPaolo Bonzini memory_region_init_io(&s->io_memory, OBJECT(dev), NULL, NULL, "kvm-ioapic", 0x1000); 128b7a4104bSPeter Xu /* 129b7a4104bSPeter Xu * KVM ioapic only supports 0x11 now. This will only be used when 130b7a4104bSPeter Xu * we want to dump ioapic version. 131b7a4104bSPeter Xu */ 132b7a4104bSPeter Xu s->version = 0x11; 133a39c1d47SJan Kiszka 134f9771858Sxiaoqiang zhao qdev_init_gpio_in(dev, kvm_ioapic_set_irq, IOAPIC_NUM_PINS); 135a39c1d47SJan Kiszka } 136a39c1d47SJan Kiszka 13739bffca2SAnthony Liguori static Property kvm_ioapic_properties[] = { 13839bffca2SAnthony Liguori DEFINE_PROP_UINT32("gsi_base", KVMIOAPICState, kvm_gsi_base, 0), 13939bffca2SAnthony Liguori DEFINE_PROP_END_OF_LIST() 14039bffca2SAnthony Liguori }; 14139bffca2SAnthony Liguori 142999e12bbSAnthony Liguori static void kvm_ioapic_class_init(ObjectClass *klass, void *data) 143999e12bbSAnthony Liguori { 144999e12bbSAnthony Liguori IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass); 14539bffca2SAnthony Liguori DeviceClass *dc = DEVICE_CLASS(klass); 146999e12bbSAnthony Liguori 147db0f8888Sxiaoqiang zhao k->realize = kvm_ioapic_realize; 148999e12bbSAnthony Liguori k->pre_save = kvm_ioapic_get; 149999e12bbSAnthony Liguori k->post_load = kvm_ioapic_put; 15039bffca2SAnthony Liguori dc->reset = kvm_ioapic_reset; 1514f67d30bSMarc-André Lureau device_class_set_props(dc, kvm_ioapic_properties); 152999e12bbSAnthony Liguori } 153999e12bbSAnthony Liguori 1548c43a6f0SAndreas Färber static const TypeInfo kvm_ioapic_info = { 15534bec7a8SLi Qiang .name = TYPE_KVM_IOAPIC, 15639bffca2SAnthony Liguori .parent = TYPE_IOAPIC_COMMON, 15739bffca2SAnthony Liguori .instance_size = sizeof(KVMIOAPICState), 158999e12bbSAnthony Liguori .class_init = kvm_ioapic_class_init, 159a39c1d47SJan Kiszka }; 160a39c1d47SJan Kiszka 16183f7d43aSAndreas Färber static void kvm_ioapic_register_types(void) 162a39c1d47SJan Kiszka { 16339bffca2SAnthony Liguori type_register_static(&kvm_ioapic_info); 164a39c1d47SJan Kiszka } 165a39c1d47SJan Kiszka 16683f7d43aSAndreas Färber type_init(kvm_ioapic_register_types) 167