1a39c1d47SJan Kiszka /* 2a39c1d47SJan Kiszka * KVM in-kernel IOPIC support 3a39c1d47SJan Kiszka * 4a39c1d47SJan Kiszka * Copyright (c) 2011 Siemens AG 5a39c1d47SJan Kiszka * 6a39c1d47SJan Kiszka * Authors: 7a39c1d47SJan Kiszka * Jan Kiszka <jan.kiszka@siemens.com> 8a39c1d47SJan Kiszka * 9a39c1d47SJan Kiszka * This work is licensed under the terms of the GNU GPL version 2. 10a39c1d47SJan Kiszka * See the COPYING file in the top-level directory. 11a39c1d47SJan Kiszka */ 12a39c1d47SJan Kiszka 13b6a0aa05SPeter Maydell #include "qemu/osdep.h" 14d665d696SPavel Butsykin #include "monitor/monitor.h" 15a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 16*7f54640bSBernhard Beschow #include "hw/intc/ioapic_internal.h" 172b85e0cdSThomas Huth #include "hw/intc/kvm_irqcount.h" 189c17d615SPaolo Bonzini #include "sysemu/kvm.h" 19a39c1d47SJan Kiszka 20d8ee0384SJason Baron /* PC Utility function */ 21d8ee0384SJason Baron void kvm_pc_setup_irq_routing(bool pci_enabled) 22d8ee0384SJason Baron { 23d8ee0384SJason Baron KVMState *s = kvm_state; 24d8ee0384SJason Baron int i; 25d8ee0384SJason Baron 268981bae2SEduardo Habkost assert(kvm_has_gsi_routing()); 27d8ee0384SJason Baron for (i = 0; i < 8; ++i) { 28d8ee0384SJason Baron if (i == 2) { 29d8ee0384SJason Baron continue; 30d8ee0384SJason Baron } 31d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i); 32d8ee0384SJason Baron } 33d8ee0384SJason Baron for (i = 8; i < 16; ++i) { 34d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8); 35d8ee0384SJason Baron } 36d8ee0384SJason Baron if (pci_enabled) { 37d8ee0384SJason Baron for (i = 0; i < 24; ++i) { 38d8ee0384SJason Baron if (i == 0) { 39d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2); 40d8ee0384SJason Baron } else if (i != 2) { 41d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i); 42d8ee0384SJason Baron } 43d8ee0384SJason Baron } 44d8ee0384SJason Baron } 45cb925cf9SAlexander Graf kvm_irqchip_commit_routes(s); 46d8ee0384SJason Baron } 47d8ee0384SJason Baron 48a39c1d47SJan Kiszka typedef struct KVMIOAPICState KVMIOAPICState; 49a39c1d47SJan Kiszka 50a39c1d47SJan Kiszka struct KVMIOAPICState { 51a39c1d47SJan Kiszka IOAPICCommonState ioapic; 52a39c1d47SJan Kiszka uint32_t kvm_gsi_base; 53a39c1d47SJan Kiszka }; 54a39c1d47SJan Kiszka 55a39c1d47SJan Kiszka static void kvm_ioapic_get(IOAPICCommonState *s) 56a39c1d47SJan Kiszka { 57a39c1d47SJan Kiszka struct kvm_irqchip chip; 58a39c1d47SJan Kiszka struct kvm_ioapic_state *kioapic; 59a39c1d47SJan Kiszka int ret, i; 60a39c1d47SJan Kiszka 61a39c1d47SJan Kiszka chip.chip_id = KVM_IRQCHIP_IOAPIC; 62a39c1d47SJan Kiszka ret = kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, &chip); 63a39c1d47SJan Kiszka if (ret < 0) { 64d84451d3SDmitry Voronetskiy fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(-ret)); 65a39c1d47SJan Kiszka abort(); 66a39c1d47SJan Kiszka } 67a39c1d47SJan Kiszka 68a39c1d47SJan Kiszka kioapic = &chip.chip.ioapic; 69a39c1d47SJan Kiszka 70a39c1d47SJan Kiszka s->id = kioapic->id; 71a39c1d47SJan Kiszka s->ioregsel = kioapic->ioregsel; 72a39c1d47SJan Kiszka s->irr = kioapic->irr; 73a39c1d47SJan Kiszka for (i = 0; i < IOAPIC_NUM_PINS; i++) { 74a39c1d47SJan Kiszka s->ioredtbl[i] = kioapic->redirtbl[i].bits; 75a39c1d47SJan Kiszka } 76a39c1d47SJan Kiszka } 77a39c1d47SJan Kiszka 78a39c1d47SJan Kiszka static void kvm_ioapic_put(IOAPICCommonState *s) 79a39c1d47SJan Kiszka { 80a39c1d47SJan Kiszka struct kvm_irqchip chip; 81a39c1d47SJan Kiszka struct kvm_ioapic_state *kioapic; 82a39c1d47SJan Kiszka int ret, i; 83a39c1d47SJan Kiszka 84a39c1d47SJan Kiszka chip.chip_id = KVM_IRQCHIP_IOAPIC; 85a39c1d47SJan Kiszka kioapic = &chip.chip.ioapic; 86a39c1d47SJan Kiszka 87a39c1d47SJan Kiszka kioapic->id = s->id; 88a39c1d47SJan Kiszka kioapic->ioregsel = s->ioregsel; 89a39c1d47SJan Kiszka kioapic->base_address = s->busdev.mmio[0].addr; 90a39c1d47SJan Kiszka kioapic->irr = s->irr; 91a39c1d47SJan Kiszka for (i = 0; i < IOAPIC_NUM_PINS; i++) { 92a39c1d47SJan Kiszka kioapic->redirtbl[i].bits = s->ioredtbl[i]; 93a39c1d47SJan Kiszka } 94a39c1d47SJan Kiszka 95a39c1d47SJan Kiszka ret = kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, &chip); 96a39c1d47SJan Kiszka if (ret < 0) { 97d84451d3SDmitry Voronetskiy fprintf(stderr, "KVM_SET_IRQCHIP failed: %s\n", strerror(-ret)); 98a39c1d47SJan Kiszka abort(); 99a39c1d47SJan Kiszka } 100a39c1d47SJan Kiszka } 101a39c1d47SJan Kiszka 102a39c1d47SJan Kiszka static void kvm_ioapic_reset(DeviceState *dev) 103a39c1d47SJan Kiszka { 104b3119631SAndreas Färber IOAPICCommonState *s = IOAPIC_COMMON(dev); 105a39c1d47SJan Kiszka 106a39c1d47SJan Kiszka ioapic_reset_common(dev); 107a39c1d47SJan Kiszka kvm_ioapic_put(s); 108a39c1d47SJan Kiszka } 109a39c1d47SJan Kiszka 110a39c1d47SJan Kiszka static void kvm_ioapic_set_irq(void *opaque, int irq, int level) 111a39c1d47SJan Kiszka { 112a39c1d47SJan Kiszka KVMIOAPICState *s = opaque; 113cce5405eSPeter Xu IOAPICCommonState *common = IOAPIC_COMMON(s); 114a39c1d47SJan Kiszka int delivered; 115a39c1d47SJan Kiszka 116cce5405eSPeter Xu ioapic_stat_update_irq(common, irq, level); 1173889c3faSPeter Maydell delivered = kvm_set_irq(kvm_state, s->kvm_gsi_base + irq, level); 1182b85e0cdSThomas Huth kvm_report_irq_delivered(delivered); 119a39c1d47SJan Kiszka } 120a39c1d47SJan Kiszka 121db0f8888Sxiaoqiang zhao static void kvm_ioapic_realize(DeviceState *dev, Error **errp) 122a39c1d47SJan Kiszka { 123db0f8888Sxiaoqiang zhao IOAPICCommonState *s = IOAPIC_COMMON(dev); 124f9771858Sxiaoqiang zhao 125257a7430SPaolo Bonzini memory_region_init_io(&s->io_memory, OBJECT(dev), NULL, NULL, "kvm-ioapic", 0x1000); 126b7a4104bSPeter Xu /* 127b7a4104bSPeter Xu * KVM ioapic only supports 0x11 now. This will only be used when 128b7a4104bSPeter Xu * we want to dump ioapic version. 129b7a4104bSPeter Xu */ 130b7a4104bSPeter Xu s->version = 0x11; 131a39c1d47SJan Kiszka 132f9771858Sxiaoqiang zhao qdev_init_gpio_in(dev, kvm_ioapic_set_irq, IOAPIC_NUM_PINS); 133a39c1d47SJan Kiszka } 134a39c1d47SJan Kiszka 13539bffca2SAnthony Liguori static Property kvm_ioapic_properties[] = { 13639bffca2SAnthony Liguori DEFINE_PROP_UINT32("gsi_base", KVMIOAPICState, kvm_gsi_base, 0), 13739bffca2SAnthony Liguori DEFINE_PROP_END_OF_LIST() 13839bffca2SAnthony Liguori }; 13939bffca2SAnthony Liguori 140999e12bbSAnthony Liguori static void kvm_ioapic_class_init(ObjectClass *klass, void *data) 141999e12bbSAnthony Liguori { 142999e12bbSAnthony Liguori IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass); 14339bffca2SAnthony Liguori DeviceClass *dc = DEVICE_CLASS(klass); 144999e12bbSAnthony Liguori 145db0f8888Sxiaoqiang zhao k->realize = kvm_ioapic_realize; 146999e12bbSAnthony Liguori k->pre_save = kvm_ioapic_get; 147999e12bbSAnthony Liguori k->post_load = kvm_ioapic_put; 14839bffca2SAnthony Liguori dc->reset = kvm_ioapic_reset; 1494f67d30bSMarc-André Lureau device_class_set_props(dc, kvm_ioapic_properties); 150999e12bbSAnthony Liguori } 151999e12bbSAnthony Liguori 1528c43a6f0SAndreas Färber static const TypeInfo kvm_ioapic_info = { 15334bec7a8SLi Qiang .name = TYPE_KVM_IOAPIC, 15439bffca2SAnthony Liguori .parent = TYPE_IOAPIC_COMMON, 15539bffca2SAnthony Liguori .instance_size = sizeof(KVMIOAPICState), 156999e12bbSAnthony Liguori .class_init = kvm_ioapic_class_init, 157a39c1d47SJan Kiszka }; 158a39c1d47SJan Kiszka 15983f7d43aSAndreas Färber static void kvm_ioapic_register_types(void) 160a39c1d47SJan Kiszka { 16139bffca2SAnthony Liguori type_register_static(&kvm_ioapic_info); 162a39c1d47SJan Kiszka } 163a39c1d47SJan Kiszka 16483f7d43aSAndreas Färber type_init(kvm_ioapic_register_types) 165