1a39c1d47SJan Kiszka /*
2a39c1d47SJan Kiszka * KVM in-kernel IOPIC support
3a39c1d47SJan Kiszka *
4a39c1d47SJan Kiszka * Copyright (c) 2011 Siemens AG
5a39c1d47SJan Kiszka *
6a39c1d47SJan Kiszka * Authors:
7a39c1d47SJan Kiszka * Jan Kiszka <jan.kiszka@siemens.com>
8a39c1d47SJan Kiszka *
9a39c1d47SJan Kiszka * This work is licensed under the terms of the GNU GPL version 2.
10a39c1d47SJan Kiszka * See the COPYING file in the top-level directory.
11a39c1d47SJan Kiszka */
12a39c1d47SJan Kiszka
13b6a0aa05SPeter Maydell #include "qemu/osdep.h"
14d665d696SPavel Butsykin #include "monitor/monitor.h"
15a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h"
167f54640bSBernhard Beschow #include "hw/intc/ioapic_internal.h"
172b85e0cdSThomas Huth #include "hw/intc/kvm_irqcount.h"
1832cad1ffSPhilippe Mathieu-Daudé #include "system/kvm.h"
19bb781b94SPhilippe Mathieu-Daudé #include "kvm/kvm_i386.h"
20a39c1d47SJan Kiszka
21d8ee0384SJason Baron /* PC Utility function */
kvm_pc_setup_irq_routing(bool pci_enabled)22d8ee0384SJason Baron void kvm_pc_setup_irq_routing(bool pci_enabled)
23d8ee0384SJason Baron {
24d8ee0384SJason Baron KVMState *s = kvm_state;
25d8ee0384SJason Baron int i;
26d8ee0384SJason Baron
278981bae2SEduardo Habkost assert(kvm_has_gsi_routing());
28d8ee0384SJason Baron for (i = 0; i < 8; ++i) {
29d8ee0384SJason Baron if (i == 2) {
30d8ee0384SJason Baron continue;
31d8ee0384SJason Baron }
32d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i);
33d8ee0384SJason Baron }
34d8ee0384SJason Baron for (i = 8; i < 16; ++i) {
35d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
36d8ee0384SJason Baron }
37d8ee0384SJason Baron if (pci_enabled) {
386b29e372SPhilippe Mathieu-Daudé for (i = 0; i < KVM_IOAPIC_NUM_PINS; ++i) {
39d8ee0384SJason Baron if (i == 0) {
40d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2);
41d8ee0384SJason Baron } else if (i != 2) {
42d8ee0384SJason Baron kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i);
43d8ee0384SJason Baron }
44d8ee0384SJason Baron }
45d8ee0384SJason Baron }
46cb925cf9SAlexander Graf kvm_irqchip_commit_routes(s);
47d8ee0384SJason Baron }
48d8ee0384SJason Baron
49a39c1d47SJan Kiszka typedef struct KVMIOAPICState KVMIOAPICState;
50a39c1d47SJan Kiszka
51a39c1d47SJan Kiszka struct KVMIOAPICState {
52a39c1d47SJan Kiszka IOAPICCommonState ioapic;
53a39c1d47SJan Kiszka uint32_t kvm_gsi_base;
54a39c1d47SJan Kiszka };
55a39c1d47SJan Kiszka
kvm_ioapic_get(IOAPICCommonState * s)56a39c1d47SJan Kiszka static void kvm_ioapic_get(IOAPICCommonState *s)
57a39c1d47SJan Kiszka {
58a39c1d47SJan Kiszka struct kvm_irqchip chip;
59a39c1d47SJan Kiszka struct kvm_ioapic_state *kioapic;
60a39c1d47SJan Kiszka int ret, i;
61a39c1d47SJan Kiszka
62a39c1d47SJan Kiszka chip.chip_id = KVM_IRQCHIP_IOAPIC;
63a39c1d47SJan Kiszka ret = kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, &chip);
64a39c1d47SJan Kiszka if (ret < 0) {
65d84451d3SDmitry Voronetskiy fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(-ret));
66a39c1d47SJan Kiszka abort();
67a39c1d47SJan Kiszka }
68a39c1d47SJan Kiszka
69a39c1d47SJan Kiszka kioapic = &chip.chip.ioapic;
70a39c1d47SJan Kiszka
71a39c1d47SJan Kiszka s->id = kioapic->id;
72a39c1d47SJan Kiszka s->ioregsel = kioapic->ioregsel;
73a39c1d47SJan Kiszka s->irr = kioapic->irr;
74a39c1d47SJan Kiszka for (i = 0; i < IOAPIC_NUM_PINS; i++) {
75a39c1d47SJan Kiszka s->ioredtbl[i] = kioapic->redirtbl[i].bits;
76a39c1d47SJan Kiszka }
77a39c1d47SJan Kiszka }
78a39c1d47SJan Kiszka
kvm_ioapic_put(IOAPICCommonState * s)79a39c1d47SJan Kiszka static void kvm_ioapic_put(IOAPICCommonState *s)
80a39c1d47SJan Kiszka {
81a39c1d47SJan Kiszka struct kvm_irqchip chip;
82a39c1d47SJan Kiszka struct kvm_ioapic_state *kioapic;
83a39c1d47SJan Kiszka int ret, i;
84a39c1d47SJan Kiszka
85a39c1d47SJan Kiszka chip.chip_id = KVM_IRQCHIP_IOAPIC;
86a39c1d47SJan Kiszka kioapic = &chip.chip.ioapic;
87a39c1d47SJan Kiszka
88a39c1d47SJan Kiszka kioapic->id = s->id;
89a39c1d47SJan Kiszka kioapic->ioregsel = s->ioregsel;
90a39c1d47SJan Kiszka kioapic->base_address = s->busdev.mmio[0].addr;
91a39c1d47SJan Kiszka kioapic->irr = s->irr;
92a39c1d47SJan Kiszka for (i = 0; i < IOAPIC_NUM_PINS; i++) {
93a39c1d47SJan Kiszka kioapic->redirtbl[i].bits = s->ioredtbl[i];
94a39c1d47SJan Kiszka }
95a39c1d47SJan Kiszka
96a39c1d47SJan Kiszka ret = kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, &chip);
97a39c1d47SJan Kiszka if (ret < 0) {
98d84451d3SDmitry Voronetskiy fprintf(stderr, "KVM_SET_IRQCHIP failed: %s\n", strerror(-ret));
99a39c1d47SJan Kiszka abort();
100a39c1d47SJan Kiszka }
101a39c1d47SJan Kiszka }
102a39c1d47SJan Kiszka
kvm_ioapic_reset(DeviceState * dev)103a39c1d47SJan Kiszka static void kvm_ioapic_reset(DeviceState *dev)
104a39c1d47SJan Kiszka {
105b3119631SAndreas Färber IOAPICCommonState *s = IOAPIC_COMMON(dev);
106a39c1d47SJan Kiszka
107a39c1d47SJan Kiszka ioapic_reset_common(dev);
108a39c1d47SJan Kiszka kvm_ioapic_put(s);
109a39c1d47SJan Kiszka }
110a39c1d47SJan Kiszka
kvm_ioapic_set_irq(void * opaque,int irq,int level)111a39c1d47SJan Kiszka static void kvm_ioapic_set_irq(void *opaque, int irq, int level)
112a39c1d47SJan Kiszka {
113a39c1d47SJan Kiszka KVMIOAPICState *s = opaque;
114cce5405eSPeter Xu IOAPICCommonState *common = IOAPIC_COMMON(s);
115a39c1d47SJan Kiszka int delivered;
116a39c1d47SJan Kiszka
117cce5405eSPeter Xu ioapic_stat_update_irq(common, irq, level);
1183889c3faSPeter Maydell delivered = kvm_set_irq(kvm_state, s->kvm_gsi_base + irq, level);
1192b85e0cdSThomas Huth kvm_report_irq_delivered(delivered);
120a39c1d47SJan Kiszka }
121a39c1d47SJan Kiszka
kvm_ioapic_realize(DeviceState * dev,Error ** errp)122db0f8888Sxiaoqiang zhao static void kvm_ioapic_realize(DeviceState *dev, Error **errp)
123a39c1d47SJan Kiszka {
124db0f8888Sxiaoqiang zhao IOAPICCommonState *s = IOAPIC_COMMON(dev);
125f9771858Sxiaoqiang zhao
126257a7430SPaolo Bonzini memory_region_init_io(&s->io_memory, OBJECT(dev), NULL, NULL, "kvm-ioapic", 0x1000);
127b7a4104bSPeter Xu /*
128b7a4104bSPeter Xu * KVM ioapic only supports 0x11 now. This will only be used when
129b7a4104bSPeter Xu * we want to dump ioapic version.
130b7a4104bSPeter Xu */
131b7a4104bSPeter Xu s->version = 0x11;
132a39c1d47SJan Kiszka
133f9771858Sxiaoqiang zhao qdev_init_gpio_in(dev, kvm_ioapic_set_irq, IOAPIC_NUM_PINS);
134a39c1d47SJan Kiszka }
135a39c1d47SJan Kiszka
13690d45638SRichard Henderson static const Property kvm_ioapic_properties[] = {
13739bffca2SAnthony Liguori DEFINE_PROP_UINT32("gsi_base", KVMIOAPICState, kvm_gsi_base, 0),
13839bffca2SAnthony Liguori };
13939bffca2SAnthony Liguori
kvm_ioapic_class_init(ObjectClass * klass,const void * data)140*12d1a768SPhilippe Mathieu-Daudé static void kvm_ioapic_class_init(ObjectClass *klass, const void *data)
141999e12bbSAnthony Liguori {
142999e12bbSAnthony Liguori IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass);
14339bffca2SAnthony Liguori DeviceClass *dc = DEVICE_CLASS(klass);
144999e12bbSAnthony Liguori
145db0f8888Sxiaoqiang zhao k->realize = kvm_ioapic_realize;
146999e12bbSAnthony Liguori k->pre_save = kvm_ioapic_get;
147999e12bbSAnthony Liguori k->post_load = kvm_ioapic_put;
148e3d08143SPeter Maydell device_class_set_legacy_reset(dc, kvm_ioapic_reset);
1494f67d30bSMarc-André Lureau device_class_set_props(dc, kvm_ioapic_properties);
150999e12bbSAnthony Liguori }
151999e12bbSAnthony Liguori
1528c43a6f0SAndreas Färber static const TypeInfo kvm_ioapic_info = {
15334bec7a8SLi Qiang .name = TYPE_KVM_IOAPIC,
15439bffca2SAnthony Liguori .parent = TYPE_IOAPIC_COMMON,
15539bffca2SAnthony Liguori .instance_size = sizeof(KVMIOAPICState),
156999e12bbSAnthony Liguori .class_init = kvm_ioapic_class_init,
157a39c1d47SJan Kiszka };
158a39c1d47SJan Kiszka
kvm_ioapic_register_types(void)15983f7d43aSAndreas Färber static void kvm_ioapic_register_types(void)
160a39c1d47SJan Kiszka {
16139bffca2SAnthony Liguori type_register_static(&kvm_ioapic_info);
162a39c1d47SJan Kiszka }
163a39c1d47SJan Kiszka
16483f7d43aSAndreas Färber type_init(kvm_ioapic_register_types)
165