xref: /qemu/hw/i2c/smbus_slave.c (revision 01d9442a889f545a41151066f6a577822166d21e)
10ff596d0Spbrook /*
20ff596d0Spbrook  * QEMU SMBus device emulation.
30ff596d0Spbrook  *
493198b6cSCorey Minyard  * This code is a helper for SMBus device emulation.  It implements an
58fa21b80SMichael Tokarev  * I2C device interface and runs the SMBus protocol from the device
693198b6cSCorey Minyard  * point of view and maps those to simple calls to emulate.
793198b6cSCorey Minyard  *
80ff596d0Spbrook  * Copyright (c) 2007 CodeSourcery.
90ff596d0Spbrook  * Written by Paul Brook
100ff596d0Spbrook  *
118e31bf38SMatthew Fernandez  * This code is licensed under the LGPL.
120ff596d0Spbrook  */
130ff596d0Spbrook 
140ff596d0Spbrook /* TODO: Implement PEC.  */
150ff596d0Spbrook 
160430891cSPeter Maydell #include "qemu/osdep.h"
170d09e41aSPaolo Bonzini #include "hw/i2c/i2c.h"
1893198b6cSCorey Minyard #include "hw/i2c/smbus_slave.h"
19d6454270SMarkus Armbruster #include "migration/vmstate.h"
200b8fa32fSMarkus Armbruster #include "qemu/module.h"
210ff596d0Spbrook 
220ff596d0Spbrook //#define DEBUG_SMBUS 1
230ff596d0Spbrook 
240ff596d0Spbrook #ifdef DEBUG_SMBUS
25001faf32SBlue Swirl #define DPRINTF(fmt, ...) \
26001faf32SBlue Swirl do { printf("smbus(%02x): " fmt , dev->i2c.address, ## __VA_ARGS__); } while (0)
27001faf32SBlue Swirl #define BADF(fmt, ...) \
28001faf32SBlue Swirl do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
290ff596d0Spbrook #else
30001faf32SBlue Swirl #define DPRINTF(fmt, ...) do {} while(0)
31001faf32SBlue Swirl #define BADF(fmt, ...) \
32001faf32SBlue Swirl do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__);} while (0)
330ff596d0Spbrook #endif
340ff596d0Spbrook 
350ff596d0Spbrook enum {
360ff596d0Spbrook     SMBUS_IDLE,
370ff596d0Spbrook     SMBUS_WRITE_DATA,
380ff596d0Spbrook     SMBUS_READ_DATA,
390ff596d0Spbrook     SMBUS_DONE,
400ff596d0Spbrook     SMBUS_CONFUSED = -1
410ff596d0Spbrook };
420ff596d0Spbrook 
430ff596d0Spbrook static void smbus_do_quick_cmd(SMBusDevice *dev, int recv)
440ff596d0Spbrook {
45b5ea9327SAnthony Liguori     SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
461ea96673SPaul Brook 
470ff596d0Spbrook     DPRINTF("Quick Command %d\n", recv);
48b5ea9327SAnthony Liguori     if (sc->quick_cmd) {
49b5ea9327SAnthony Liguori         sc->quick_cmd(dev, recv);
50b5ea9327SAnthony Liguori     }
510ff596d0Spbrook }
520ff596d0Spbrook 
530ff596d0Spbrook static void smbus_do_write(SMBusDevice *dev)
540ff596d0Spbrook {
55b5ea9327SAnthony Liguori     SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
561ea96673SPaul Brook 
579cf27d74SCorey Minyard     DPRINTF("Command %d len %d\n", dev->data_buf[0], dev->data_len);
58b5ea9327SAnthony Liguori     if (sc->write_data) {
599cf27d74SCorey Minyard         sc->write_data(dev, dev->data_buf, dev->data_len);
600ff596d0Spbrook     }
610ff596d0Spbrook }
620ff596d0Spbrook 
63d307c28cSCorey Minyard static int smbus_i2c_event(I2CSlave *s, enum i2c_event event)
640ff596d0Spbrook {
65b5ea9327SAnthony Liguori     SMBusDevice *dev = SMBUS_DEVICE(s);
661ea96673SPaul Brook 
670ff596d0Spbrook     switch (event) {
680ff596d0Spbrook     case I2C_START_SEND:
690ff596d0Spbrook         switch (dev->mode) {
700ff596d0Spbrook         case SMBUS_IDLE:
710ff596d0Spbrook             DPRINTF("Incoming data\n");
720ff596d0Spbrook             dev->mode = SMBUS_WRITE_DATA;
730ff596d0Spbrook             break;
748b38e532SCorey Minyard 
750ff596d0Spbrook         default:
760ff596d0Spbrook             BADF("Unexpected send start condition in state %d\n", dev->mode);
770ff596d0Spbrook             dev->mode = SMBUS_CONFUSED;
780ff596d0Spbrook             break;
790ff596d0Spbrook         }
800ff596d0Spbrook         break;
810ff596d0Spbrook 
820ff596d0Spbrook     case I2C_START_RECV:
830ff596d0Spbrook         switch (dev->mode) {
840ff596d0Spbrook         case SMBUS_IDLE:
850ff596d0Spbrook             DPRINTF("Read mode\n");
86031ac498SCorey Minyard             dev->mode = SMBUS_READ_DATA;
870ff596d0Spbrook             break;
888b38e532SCorey Minyard 
890ff596d0Spbrook         case SMBUS_WRITE_DATA:
900ff596d0Spbrook             if (dev->data_len == 0) {
910ff596d0Spbrook                 BADF("Read after write with no data\n");
920ff596d0Spbrook                 dev->mode = SMBUS_CONFUSED;
930ff596d0Spbrook             } else {
940ff596d0Spbrook                 smbus_do_write(dev);
950ff596d0Spbrook                 DPRINTF("Read mode\n");
960ff596d0Spbrook                 dev->mode = SMBUS_READ_DATA;
970ff596d0Spbrook             }
980ff596d0Spbrook             break;
998b38e532SCorey Minyard 
1000ff596d0Spbrook         default:
1010ff596d0Spbrook             BADF("Unexpected recv start condition in state %d\n", dev->mode);
1020ff596d0Spbrook             dev->mode = SMBUS_CONFUSED;
1030ff596d0Spbrook             break;
1040ff596d0Spbrook         }
1050ff596d0Spbrook         break;
1060ff596d0Spbrook 
1070ff596d0Spbrook     case I2C_FINISH:
108905cec6dSCorey Minyard         if (dev->data_len == 0) {
109905cec6dSCorey Minyard             if (dev->mode == SMBUS_WRITE_DATA || dev->mode == SMBUS_READ_DATA) {
110905cec6dSCorey Minyard                 smbus_do_quick_cmd(dev, dev->mode == SMBUS_READ_DATA);
111905cec6dSCorey Minyard             }
112905cec6dSCorey Minyard         } else {
1130ff596d0Spbrook             switch (dev->mode) {
1140ff596d0Spbrook             case SMBUS_WRITE_DATA:
1150ff596d0Spbrook                 smbus_do_write(dev);
1160ff596d0Spbrook                 break;
117905cec6dSCorey Minyard 
1180ff596d0Spbrook             case SMBUS_READ_DATA:
1190ff596d0Spbrook                 BADF("Unexpected stop during receive\n");
1200ff596d0Spbrook                 break;
121905cec6dSCorey Minyard 
1220ff596d0Spbrook             default:
1230ff596d0Spbrook                 /* Nothing to do.  */
1240ff596d0Spbrook                 break;
1250ff596d0Spbrook             }
126905cec6dSCorey Minyard         }
1270ff596d0Spbrook         dev->mode = SMBUS_IDLE;
1280ff596d0Spbrook         dev->data_len = 0;
1290ff596d0Spbrook         break;
1300ff596d0Spbrook 
1310ff596d0Spbrook     case I2C_NACK:
1320ff596d0Spbrook         switch (dev->mode) {
1330ff596d0Spbrook         case SMBUS_DONE:
1340ff596d0Spbrook             /* Nothing to do.  */
1350ff596d0Spbrook             break;
1368b38e532SCorey Minyard 
1370ff596d0Spbrook         case SMBUS_READ_DATA:
1380ff596d0Spbrook             dev->mode = SMBUS_DONE;
1390ff596d0Spbrook             break;
1408b38e532SCorey Minyard 
1410ff596d0Spbrook         default:
1420ff596d0Spbrook             BADF("Unexpected NACK in state %d\n", dev->mode);
1430ff596d0Spbrook             dev->mode = SMBUS_CONFUSED;
1440ff596d0Spbrook             break;
1450ff596d0Spbrook         }
146a78e9839SKlaus Jensen         break;
147a78e9839SKlaus Jensen 
148a78e9839SKlaus Jensen     default:
149a78e9839SKlaus Jensen         return -1;
1500ff596d0Spbrook     }
151d307c28cSCorey Minyard 
152d307c28cSCorey Minyard     return 0;
1530ff596d0Spbrook }
1540ff596d0Spbrook 
1552ac4c5f4SCorey Minyard static uint8_t smbus_i2c_recv(I2CSlave *s)
1560ff596d0Spbrook {
157b5ea9327SAnthony Liguori     SMBusDevice *dev = SMBUS_DEVICE(s);
158b5ea9327SAnthony Liguori     SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
159031ac498SCorey Minyard     uint8_t ret = 0xff;
1600ff596d0Spbrook 
1610ff596d0Spbrook     switch (dev->mode) {
162031ac498SCorey Minyard     case SMBUS_READ_DATA:
163b5ea9327SAnthony Liguori         if (sc->receive_byte) {
164b5ea9327SAnthony Liguori             ret = sc->receive_byte(dev);
1650ff596d0Spbrook         }
1660ff596d0Spbrook         DPRINTF("Read data %02x\n", ret);
1670ff596d0Spbrook         break;
1688b38e532SCorey Minyard 
1690ff596d0Spbrook     default:
1700ff596d0Spbrook         BADF("Unexpected read in state %d\n", dev->mode);
1710ff596d0Spbrook         dev->mode = SMBUS_CONFUSED;
1720ff596d0Spbrook         break;
1730ff596d0Spbrook     }
1748b38e532SCorey Minyard 
1750ff596d0Spbrook     return ret;
1760ff596d0Spbrook }
1770ff596d0Spbrook 
1789e07bdf8SAnthony Liguori static int smbus_i2c_send(I2CSlave *s, uint8_t data)
1790ff596d0Spbrook {
180b5ea9327SAnthony Liguori     SMBusDevice *dev = SMBUS_DEVICE(s);
1811ea96673SPaul Brook 
1820ff596d0Spbrook     switch (dev->mode) {
1830ff596d0Spbrook     case SMBUS_WRITE_DATA:
1840ff596d0Spbrook         DPRINTF("Write data %02x\n", data);
185629457a1SCorey Minyard         if (dev->data_len >= sizeof(dev->data_buf)) {
186629457a1SCorey Minyard             BADF("Too many bytes sent\n");
187629457a1SCorey Minyard         } else {
1880ff596d0Spbrook             dev->data_buf[dev->data_len++] = data;
189629457a1SCorey Minyard         }
1900ff596d0Spbrook         break;
1918b38e532SCorey Minyard 
1920ff596d0Spbrook     default:
1930ff596d0Spbrook         BADF("Unexpected write in state %d\n", dev->mode);
1940ff596d0Spbrook         break;
1950ff596d0Spbrook     }
1968b38e532SCorey Minyard 
1970ff596d0Spbrook     return 0;
1980ff596d0Spbrook }
1990ff596d0Spbrook 
200b5ea9327SAnthony Liguori static void smbus_device_class_init(ObjectClass *klass, void *data)
201b5ea9327SAnthony Liguori {
202b5ea9327SAnthony Liguori     I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
203b5ea9327SAnthony Liguori 
204b5ea9327SAnthony Liguori     sc->event = smbus_i2c_event;
205b5ea9327SAnthony Liguori     sc->recv = smbus_i2c_recv;
206b5ea9327SAnthony Liguori     sc->send = smbus_i2c_send;
207b5ea9327SAnthony Liguori }
208b5ea9327SAnthony Liguori 
209547db24aSCorey Minyard bool smbus_vmstate_needed(SMBusDevice *dev)
210547db24aSCorey Minyard {
211547db24aSCorey Minyard     return dev->mode != SMBUS_IDLE;
212547db24aSCorey Minyard }
213547db24aSCorey Minyard 
214547db24aSCorey Minyard const VMStateDescription vmstate_smbus_device = {
215547db24aSCorey Minyard     .name = TYPE_SMBUS_DEVICE,
216547db24aSCorey Minyard     .version_id = 1,
217547db24aSCorey Minyard     .minimum_version_id = 1,
218*01d9442aSRichard Henderson     .fields = (const VMStateField[]) {
219547db24aSCorey Minyard         VMSTATE_I2C_SLAVE(i2c, SMBusDevice),
220547db24aSCorey Minyard         VMSTATE_INT32(mode, SMBusDevice),
221547db24aSCorey Minyard         VMSTATE_INT32(data_len, SMBusDevice),
222547db24aSCorey Minyard         VMSTATE_UINT8_ARRAY(data_buf, SMBusDevice, SMBUS_DATA_MAX_LEN),
223547db24aSCorey Minyard         VMSTATE_END_OF_LIST()
224547db24aSCorey Minyard     }
225547db24aSCorey Minyard };
226547db24aSCorey Minyard 
2278c43a6f0SAndreas Färber static const TypeInfo smbus_device_type_info = {
228b5ea9327SAnthony Liguori     .name = TYPE_SMBUS_DEVICE,
229b5ea9327SAnthony Liguori     .parent = TYPE_I2C_SLAVE,
230b5ea9327SAnthony Liguori     .instance_size = sizeof(SMBusDevice),
231b5ea9327SAnthony Liguori     .abstract = true,
232b5ea9327SAnthony Liguori     .class_size = sizeof(SMBusDeviceClass),
233b5ea9327SAnthony Liguori     .class_init = smbus_device_class_init,
234b5ea9327SAnthony Liguori };
235b5ea9327SAnthony Liguori 
23683f7d43aSAndreas Färber static void smbus_device_register_types(void)
237b5ea9327SAnthony Liguori {
238b5ea9327SAnthony Liguori     type_register_static(&smbus_device_type_info);
239b5ea9327SAnthony Liguori }
240b5ea9327SAnthony Liguori 
24183f7d43aSAndreas Färber type_init(smbus_device_register_types)
242