1d1157ca4SOskar Andero /* 2d1157ca4SOskar Andero * ARM Versatile I2C controller 3d1157ca4SOskar Andero * 4d1157ca4SOskar Andero * Copyright (c) 2006-2007 CodeSourcery. 5d1157ca4SOskar Andero * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com> 6d1157ca4SOskar Andero * 7d1157ca4SOskar Andero * This file is derived from hw/realview.c by Paul Brook 8d1157ca4SOskar Andero * 9d1157ca4SOskar Andero * This program is free software; you can redistribute it and/or 10d1157ca4SOskar Andero * modify it under the terms of the GNU General Public License 11d1157ca4SOskar Andero * as published by the Free Software Foundation; either version 2 12d1157ca4SOskar Andero * of the License, or (at your option) any later version. 13d1157ca4SOskar Andero * 14d1157ca4SOskar Andero * This program is distributed in the hope that it will be useful, 15d1157ca4SOskar Andero * but WITHOUT ANY WARRANTY; without even the implied warranty of 16d1157ca4SOskar Andero * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17d1157ca4SOskar Andero * GNU General Public License for more details. 18d1157ca4SOskar Andero * 19d1157ca4SOskar Andero * You should have received a copy of the GNU General Public License 20d1157ca4SOskar Andero * along with this program; if not, see <http://www.gnu.org/licenses/>. 21d1157ca4SOskar Andero * 22d1157ca4SOskar Andero */ 23d1157ca4SOskar Andero 248ef94f0bSPeter Maydell #include "qemu/osdep.h" 2583c9f4caSPaolo Bonzini #include "hw/sysbus.h" 26d718b747SBALATON Zoltan #include "hw/i2c/bitbang_i2c.h" 2703dd024fSPaolo Bonzini #include "qemu/log.h" 280b8fa32fSMarkus Armbruster #include "qemu/module.h" 29d1157ca4SOskar Andero 3093e7f5f4SAndreas Färber #define TYPE_VERSATILE_I2C "versatile_i2c" 3193e7f5f4SAndreas Färber #define VERSATILE_I2C(obj) \ 3293e7f5f4SAndreas Färber OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C) 3393e7f5f4SAndreas Färber 3493e7f5f4SAndreas Färber typedef struct VersatileI2CState { 3593e7f5f4SAndreas Färber SysBusDevice parent_obj; 3693e7f5f4SAndreas Färber 37d1157ca4SOskar Andero MemoryRegion iomem; 38d1157ca4SOskar Andero bitbang_i2c_interface *bitbang; 39d1157ca4SOskar Andero int out; 40d1157ca4SOskar Andero int in; 41d1157ca4SOskar Andero } VersatileI2CState; 42d1157ca4SOskar Andero 43a8170e5eSAvi Kivity static uint64_t versatile_i2c_read(void *opaque, hwaddr offset, 44d1157ca4SOskar Andero unsigned size) 45d1157ca4SOskar Andero { 46d1157ca4SOskar Andero VersatileI2CState *s = (VersatileI2CState *)opaque; 47d1157ca4SOskar Andero 48d1157ca4SOskar Andero if (offset == 0) { 49d1157ca4SOskar Andero return (s->out & 1) | (s->in << 1); 50d1157ca4SOskar Andero } else { 515170d661SPeter Maydell qemu_log_mask(LOG_GUEST_ERROR, 525170d661SPeter Maydell "%s: Bad offset 0x%x\n", __func__, (int)offset); 53d1157ca4SOskar Andero return -1; 54d1157ca4SOskar Andero } 55d1157ca4SOskar Andero } 56d1157ca4SOskar Andero 57a8170e5eSAvi Kivity static void versatile_i2c_write(void *opaque, hwaddr offset, 58d1157ca4SOskar Andero uint64_t value, unsigned size) 59d1157ca4SOskar Andero { 60d1157ca4SOskar Andero VersatileI2CState *s = (VersatileI2CState *)opaque; 61d1157ca4SOskar Andero 62d1157ca4SOskar Andero switch (offset) { 63d1157ca4SOskar Andero case 0: 64d1157ca4SOskar Andero s->out |= value & 3; 65d1157ca4SOskar Andero break; 66d1157ca4SOskar Andero case 4: 67d1157ca4SOskar Andero s->out &= ~value; 68d1157ca4SOskar Andero break; 69d1157ca4SOskar Andero default: 705170d661SPeter Maydell qemu_log_mask(LOG_GUEST_ERROR, 715170d661SPeter Maydell "%s: Bad offset 0x%x\n", __func__, (int)offset); 72d1157ca4SOskar Andero } 73d1157ca4SOskar Andero bitbang_i2c_set(s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0); 74d1157ca4SOskar Andero s->in = bitbang_i2c_set(s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0); 75d1157ca4SOskar Andero } 76d1157ca4SOskar Andero 77d1157ca4SOskar Andero static const MemoryRegionOps versatile_i2c_ops = { 78d1157ca4SOskar Andero .read = versatile_i2c_read, 79d1157ca4SOskar Andero .write = versatile_i2c_write, 80d1157ca4SOskar Andero .endianness = DEVICE_NATIVE_ENDIAN, 81d1157ca4SOskar Andero }; 82d1157ca4SOskar Andero 838ce26fcdSxiaoqiang zhao static void versatile_i2c_init(Object *obj) 84d1157ca4SOskar Andero { 858ce26fcdSxiaoqiang zhao DeviceState *dev = DEVICE(obj); 868ce26fcdSxiaoqiang zhao VersatileI2CState *s = VERSATILE_I2C(obj); 878ce26fcdSxiaoqiang zhao SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 88a5c82852SAndreas Färber I2CBus *bus; 89d1157ca4SOskar Andero 9093e7f5f4SAndreas Färber bus = i2c_init_bus(dev, "i2c"); 91d1157ca4SOskar Andero s->bitbang = bitbang_i2c_init(bus); 928ce26fcdSxiaoqiang zhao memory_region_init_io(&s->iomem, obj, &versatile_i2c_ops, s, 93d1157ca4SOskar Andero "versatile_i2c", 0x1000); 9493e7f5f4SAndreas Färber sysbus_init_mmio(sbd, &s->iomem); 95d1157ca4SOskar Andero } 96d1157ca4SOskar Andero 97d1157ca4SOskar Andero static const TypeInfo versatile_i2c_info = { 9893e7f5f4SAndreas Färber .name = TYPE_VERSATILE_I2C, 99d1157ca4SOskar Andero .parent = TYPE_SYS_BUS_DEVICE, 100d1157ca4SOskar Andero .instance_size = sizeof(VersatileI2CState), 1018ce26fcdSxiaoqiang zhao .instance_init = versatile_i2c_init, 102d1157ca4SOskar Andero }; 103d1157ca4SOskar Andero 104d1157ca4SOskar Andero static void versatile_i2c_register_types(void) 105d1157ca4SOskar Andero { 106d1157ca4SOskar Andero type_register_static(&versatile_i2c_info); 107d1157ca4SOskar Andero } 108d1157ca4SOskar Andero 109d1157ca4SOskar Andero type_init(versatile_i2c_register_types) 110