xref: /qemu/hw/i2c/arm_sbcon_i2c.c (revision 8ef94f0bc9167f246b41cb1188bf80dcd84b49fe)
1d1157ca4SOskar Andero /*
2d1157ca4SOskar Andero  * ARM Versatile I2C controller
3d1157ca4SOskar Andero  *
4d1157ca4SOskar Andero  * Copyright (c) 2006-2007 CodeSourcery.
5d1157ca4SOskar Andero  * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
6d1157ca4SOskar Andero  *
7d1157ca4SOskar Andero  * This file is derived from hw/realview.c by Paul Brook
8d1157ca4SOskar Andero  *
9d1157ca4SOskar Andero  * This program is free software; you can redistribute it and/or
10d1157ca4SOskar Andero  * modify it under the terms of the GNU General Public License
11d1157ca4SOskar Andero  * as published by the Free Software Foundation; either version 2
12d1157ca4SOskar Andero  * of the License, or (at your option) any later version.
13d1157ca4SOskar Andero  *
14d1157ca4SOskar Andero  * This program is distributed in the hope that it will be useful,
15d1157ca4SOskar Andero  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16d1157ca4SOskar Andero  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17d1157ca4SOskar Andero  * GNU General Public License for more details.
18d1157ca4SOskar Andero  *
19d1157ca4SOskar Andero  * You should have received a copy of the GNU General Public License
20d1157ca4SOskar Andero  * along with this program; if not, see <http://www.gnu.org/licenses/>.
21d1157ca4SOskar Andero  *
22d1157ca4SOskar Andero  */
23d1157ca4SOskar Andero 
248ef94f0bSPeter Maydell #include "qemu/osdep.h"
2583c9f4caSPaolo Bonzini #include "hw/sysbus.h"
2647b43a1fSPaolo Bonzini #include "bitbang_i2c.h"
27d1157ca4SOskar Andero 
2893e7f5f4SAndreas Färber #define TYPE_VERSATILE_I2C "versatile_i2c"
2993e7f5f4SAndreas Färber #define VERSATILE_I2C(obj) \
3093e7f5f4SAndreas Färber     OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C)
3193e7f5f4SAndreas Färber 
3293e7f5f4SAndreas Färber typedef struct VersatileI2CState {
3393e7f5f4SAndreas Färber     SysBusDevice parent_obj;
3493e7f5f4SAndreas Färber 
35d1157ca4SOskar Andero     MemoryRegion iomem;
36d1157ca4SOskar Andero     bitbang_i2c_interface *bitbang;
37d1157ca4SOskar Andero     int out;
38d1157ca4SOskar Andero     int in;
39d1157ca4SOskar Andero } VersatileI2CState;
40d1157ca4SOskar Andero 
41a8170e5eSAvi Kivity static uint64_t versatile_i2c_read(void *opaque, hwaddr offset,
42d1157ca4SOskar Andero                                    unsigned size)
43d1157ca4SOskar Andero {
44d1157ca4SOskar Andero     VersatileI2CState *s = (VersatileI2CState *)opaque;
45d1157ca4SOskar Andero 
46d1157ca4SOskar Andero     if (offset == 0) {
47d1157ca4SOskar Andero         return (s->out & 1) | (s->in << 1);
48d1157ca4SOskar Andero     } else {
495170d661SPeter Maydell         qemu_log_mask(LOG_GUEST_ERROR,
505170d661SPeter Maydell                       "%s: Bad offset 0x%x\n", __func__, (int)offset);
51d1157ca4SOskar Andero         return -1;
52d1157ca4SOskar Andero     }
53d1157ca4SOskar Andero }
54d1157ca4SOskar Andero 
55a8170e5eSAvi Kivity static void versatile_i2c_write(void *opaque, hwaddr offset,
56d1157ca4SOskar Andero                                 uint64_t value, unsigned size)
57d1157ca4SOskar Andero {
58d1157ca4SOskar Andero     VersatileI2CState *s = (VersatileI2CState *)opaque;
59d1157ca4SOskar Andero 
60d1157ca4SOskar Andero     switch (offset) {
61d1157ca4SOskar Andero     case 0:
62d1157ca4SOskar Andero         s->out |= value & 3;
63d1157ca4SOskar Andero         break;
64d1157ca4SOskar Andero     case 4:
65d1157ca4SOskar Andero         s->out &= ~value;
66d1157ca4SOskar Andero         break;
67d1157ca4SOskar Andero     default:
685170d661SPeter Maydell         qemu_log_mask(LOG_GUEST_ERROR,
695170d661SPeter Maydell                       "%s: Bad offset 0x%x\n", __func__, (int)offset);
70d1157ca4SOskar Andero     }
71d1157ca4SOskar Andero     bitbang_i2c_set(s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0);
72d1157ca4SOskar Andero     s->in = bitbang_i2c_set(s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0);
73d1157ca4SOskar Andero }
74d1157ca4SOskar Andero 
75d1157ca4SOskar Andero static const MemoryRegionOps versatile_i2c_ops = {
76d1157ca4SOskar Andero     .read = versatile_i2c_read,
77d1157ca4SOskar Andero     .write = versatile_i2c_write,
78d1157ca4SOskar Andero     .endianness = DEVICE_NATIVE_ENDIAN,
79d1157ca4SOskar Andero };
80d1157ca4SOskar Andero 
8193e7f5f4SAndreas Färber static int versatile_i2c_init(SysBusDevice *sbd)
82d1157ca4SOskar Andero {
8393e7f5f4SAndreas Färber     DeviceState *dev = DEVICE(sbd);
8493e7f5f4SAndreas Färber     VersatileI2CState *s = VERSATILE_I2C(dev);
85a5c82852SAndreas Färber     I2CBus *bus;
86d1157ca4SOskar Andero 
8793e7f5f4SAndreas Färber     bus = i2c_init_bus(dev, "i2c");
88d1157ca4SOskar Andero     s->bitbang = bitbang_i2c_init(bus);
891437c94bSPaolo Bonzini     memory_region_init_io(&s->iomem, OBJECT(s), &versatile_i2c_ops, s,
90d1157ca4SOskar Andero                           "versatile_i2c", 0x1000);
9193e7f5f4SAndreas Färber     sysbus_init_mmio(sbd, &s->iomem);
92d1157ca4SOskar Andero     return 0;
93d1157ca4SOskar Andero }
94d1157ca4SOskar Andero 
95d1157ca4SOskar Andero static void versatile_i2c_class_init(ObjectClass *klass, void *data)
96d1157ca4SOskar Andero {
97d1157ca4SOskar Andero     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
98d1157ca4SOskar Andero 
99d1157ca4SOskar Andero     k->init = versatile_i2c_init;
100d1157ca4SOskar Andero }
101d1157ca4SOskar Andero 
102d1157ca4SOskar Andero static const TypeInfo versatile_i2c_info = {
10393e7f5f4SAndreas Färber     .name          = TYPE_VERSATILE_I2C,
104d1157ca4SOskar Andero     .parent        = TYPE_SYS_BUS_DEVICE,
105d1157ca4SOskar Andero     .instance_size = sizeof(VersatileI2CState),
106d1157ca4SOskar Andero     .class_init    = versatile_i2c_class_init,
107d1157ca4SOskar Andero };
108d1157ca4SOskar Andero 
109d1157ca4SOskar Andero static void versatile_i2c_register_types(void)
110d1157ca4SOskar Andero {
111d1157ca4SOskar Andero     type_register_static(&versatile_i2c_info);
112d1157ca4SOskar Andero }
113d1157ca4SOskar Andero 
114d1157ca4SOskar Andero type_init(versatile_i2c_register_types)
115