1 #include "qemu/osdep.h" 2 #include "hw/hw.h" 3 #include "hw/pci/pci.h" 4 #include "vga_int.h" 5 #include "hw/virtio/virtio-pci.h" 6 #include "hw/virtio/virtio-gpu.h" 7 #include "qapi/error.h" 8 9 /* 10 * virtio-vga: This extends VirtioPCIProxy. 11 */ 12 #define TYPE_VIRTIO_VGA "virtio-vga" 13 #define VIRTIO_VGA(obj) \ 14 OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA) 15 #define VIRTIO_VGA_GET_CLASS(obj) \ 16 OBJECT_GET_CLASS(VirtIOVGAClass, obj, TYPE_VIRTIO_VGA) 17 #define VIRTIO_VGA_CLASS(klass) \ 18 OBJECT_CLASS_CHECK(VirtIOVGAClass, klass, TYPE_VIRTIO_VGA) 19 20 typedef struct VirtIOVGA { 21 VirtIOPCIProxy parent_obj; 22 VirtIOGPU vdev; 23 VGACommonState vga; 24 MemoryRegion vga_mrs[3]; 25 } VirtIOVGA; 26 27 typedef struct VirtIOVGAClass { 28 VirtioPCIClass parent_class; 29 DeviceReset parent_reset; 30 } VirtIOVGAClass; 31 32 static void virtio_vga_invalidate_display(void *opaque) 33 { 34 VirtIOVGA *vvga = opaque; 35 VirtIOGPUBase *g = VIRTIO_GPU_BASE(&vvga->vdev); 36 37 if (g->enable) { 38 virtio_gpu_ops.invalidate(&vvga->vdev); 39 } else { 40 vvga->vga.hw_ops->invalidate(&vvga->vga); 41 } 42 } 43 44 static void virtio_vga_update_display(void *opaque) 45 { 46 VirtIOVGA *vvga = opaque; 47 VirtIOGPUBase *g = VIRTIO_GPU_BASE(&vvga->vdev); 48 49 if (g->enable) { 50 virtio_gpu_ops.gfx_update(&vvga->vdev); 51 } else { 52 vvga->vga.hw_ops->gfx_update(&vvga->vga); 53 } 54 } 55 56 static void virtio_vga_text_update(void *opaque, console_ch_t *chardata) 57 { 58 VirtIOVGA *vvga = opaque; 59 VirtIOGPUBase *g = VIRTIO_GPU_BASE(&vvga->vdev); 60 61 if (g->enable) { 62 if (virtio_gpu_ops.text_update) { 63 virtio_gpu_ops.text_update(&vvga->vdev, chardata); 64 } 65 } else { 66 if (vvga->vga.hw_ops->text_update) { 67 vvga->vga.hw_ops->text_update(&vvga->vga, chardata); 68 } 69 } 70 } 71 72 static int virtio_vga_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info) 73 { 74 VirtIOVGA *vvga = opaque; 75 76 if (virtio_gpu_ops.ui_info) { 77 return virtio_gpu_ops.ui_info(&vvga->vdev, idx, info); 78 } 79 return -1; 80 } 81 82 static void virtio_vga_gl_block(void *opaque, bool block) 83 { 84 VirtIOVGA *vvga = opaque; 85 86 if (virtio_gpu_ops.gl_block) { 87 virtio_gpu_ops.gl_block(&vvga->vdev, block); 88 } 89 } 90 91 static const GraphicHwOps virtio_vga_ops = { 92 .invalidate = virtio_vga_invalidate_display, 93 .gfx_update = virtio_vga_update_display, 94 .text_update = virtio_vga_text_update, 95 .ui_info = virtio_vga_ui_info, 96 .gl_block = virtio_vga_gl_block, 97 }; 98 99 static const VMStateDescription vmstate_virtio_vga = { 100 .name = "virtio-vga", 101 .version_id = 2, 102 .minimum_version_id = 2, 103 .fields = (VMStateField[]) { 104 /* no pci stuff here, saving the virtio device will handle that */ 105 VMSTATE_STRUCT(vga, VirtIOVGA, 0, vmstate_vga_common, VGACommonState), 106 VMSTATE_END_OF_LIST() 107 } 108 }; 109 110 /* VGA device wrapper around PCI device around virtio GPU */ 111 static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 112 { 113 VirtIOVGA *vvga = VIRTIO_VGA(vpci_dev); 114 VirtIOGPUBase *g = VIRTIO_GPU_BASE(&vvga->vdev); 115 VGACommonState *vga = &vvga->vga; 116 Error *err = NULL; 117 uint32_t offset; 118 int i; 119 120 /* init vga compat bits */ 121 vga->vram_size_mb = 8; 122 vga_common_init(vga, OBJECT(vpci_dev)); 123 vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev), 124 pci_address_space_io(&vpci_dev->pci_dev), true); 125 pci_register_bar(&vpci_dev->pci_dev, 0, 126 PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); 127 128 /* 129 * Configure virtio bar and regions 130 * 131 * We use bar #2 for the mmio regions, to be compatible with stdvga. 132 * virtio regions are moved to the end of bar #2, to make room for 133 * the stdvga mmio registers at the start of bar #2. 134 */ 135 vpci_dev->modern_mem_bar_idx = 2; 136 vpci_dev->msix_bar_idx = 4; 137 138 if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { 139 /* 140 * with page-per-vq=off there is no padding space we can use 141 * for the stdvga registers. Make the common and isr regions 142 * smaller then. 143 */ 144 vpci_dev->common.size /= 2; 145 vpci_dev->isr.size /= 2; 146 } 147 148 offset = memory_region_size(&vpci_dev->modern_bar); 149 offset -= vpci_dev->notify.size; 150 vpci_dev->notify.offset = offset; 151 offset -= vpci_dev->device.size; 152 vpci_dev->device.offset = offset; 153 offset -= vpci_dev->isr.size; 154 vpci_dev->isr.offset = offset; 155 offset -= vpci_dev->common.size; 156 vpci_dev->common.offset = offset; 157 158 /* init virtio bits */ 159 qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus)); 160 if (!virtio_pci_force_virtio_1(vpci_dev, errp)) { 161 return; 162 } 163 object_property_set_bool(OBJECT(g), true, "realized", &err); 164 if (err) { 165 error_propagate(errp, err); 166 return; 167 } 168 169 /* add stdvga mmio regions */ 170 pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar, 171 vvga->vga_mrs, true, false); 172 173 vga->con = g->scanout[0].con; 174 graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga); 175 176 for (i = 0; i < g->conf.max_outputs; i++) { 177 object_property_set_link(OBJECT(g->scanout[i].con), 178 OBJECT(vpci_dev), 179 "device", errp); 180 } 181 } 182 183 static void virtio_vga_reset(DeviceState *dev) 184 { 185 VirtIOVGAClass *klass = VIRTIO_VGA_GET_CLASS(dev); 186 VirtIOVGA *vvga = VIRTIO_VGA(dev); 187 188 /* reset virtio-gpu */ 189 klass->parent_reset(dev); 190 191 /* reset vga */ 192 vga_common_reset(&vvga->vga); 193 vga_dirty_log_start(&vvga->vga); 194 } 195 196 static Property virtio_vga_properties[] = { 197 DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy), 198 DEFINE_PROP_END_OF_LIST(), 199 }; 200 201 static void virtio_vga_class_init(ObjectClass *klass, void *data) 202 { 203 DeviceClass *dc = DEVICE_CLASS(klass); 204 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 205 VirtIOVGAClass *v = VIRTIO_VGA_CLASS(klass); 206 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 207 208 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); 209 dc->props = virtio_vga_properties; 210 dc->vmsd = &vmstate_virtio_vga; 211 dc->hotpluggable = false; 212 device_class_set_parent_reset(dc, virtio_vga_reset, 213 &v->parent_reset); 214 215 k->realize = virtio_vga_realize; 216 pcidev_k->romfile = "vgabios-virtio.bin"; 217 pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA; 218 } 219 220 static void virtio_vga_inst_initfn(Object *obj) 221 { 222 VirtIOVGA *dev = VIRTIO_VGA(obj); 223 224 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 225 TYPE_VIRTIO_GPU); 226 } 227 228 static VirtioPCIDeviceTypeInfo virtio_vga_info = { 229 .generic_name = TYPE_VIRTIO_VGA, 230 .instance_size = sizeof(struct VirtIOVGA), 231 .instance_init = virtio_vga_inst_initfn, 232 .class_size = sizeof(struct VirtIOVGAClass), 233 .class_init = virtio_vga_class_init, 234 }; 235 236 static void virtio_vga_register_types(void) 237 { 238 virtio_pci_types_register(&virtio_vga_info); 239 } 240 241 type_init(virtio_vga_register_types) 242