xref: /qemu/hw/display/virtio-vga.c (revision 93abfc88bd649de1933588bfc7175605331b3ea9)
19b8bfe21SPeter Maydell #include "qemu/osdep.h"
2c5d4dac8SGerd Hoffmann #include "hw/hw.h"
3c5d4dac8SGerd Hoffmann #include "hw/pci/pci.h"
4c5d4dac8SGerd Hoffmann #include "vga_int.h"
5c5d4dac8SGerd Hoffmann #include "hw/virtio/virtio-pci.h"
6d0f0c865SMarc-André Lureau #include "qapi/error.h"
7c5d4dac8SGerd Hoffmann 
8c5d4dac8SGerd Hoffmann /*
9c5d4dac8SGerd Hoffmann  * virtio-vga: This extends VirtioPCIProxy.
10c5d4dac8SGerd Hoffmann  */
11c5d4dac8SGerd Hoffmann #define TYPE_VIRTIO_VGA "virtio-vga"
12c5d4dac8SGerd Hoffmann #define VIRTIO_VGA(obj) \
13c5d4dac8SGerd Hoffmann         OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA)
14c5d4dac8SGerd Hoffmann 
15c5d4dac8SGerd Hoffmann typedef struct VirtIOVGA {
16c5d4dac8SGerd Hoffmann     VirtIOPCIProxy parent_obj;
17c5d4dac8SGerd Hoffmann     VirtIOGPU      vdev;
18c5d4dac8SGerd Hoffmann     VGACommonState vga;
19c5d4dac8SGerd Hoffmann     MemoryRegion   vga_mrs[3];
20c5d4dac8SGerd Hoffmann } VirtIOVGA;
21c5d4dac8SGerd Hoffmann 
22c5d4dac8SGerd Hoffmann static void virtio_vga_invalidate_display(void *opaque)
23c5d4dac8SGerd Hoffmann {
24c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = opaque;
25c5d4dac8SGerd Hoffmann 
26c5d4dac8SGerd Hoffmann     if (vvga->vdev.enable) {
27c5d4dac8SGerd Hoffmann         virtio_gpu_ops.invalidate(&vvga->vdev);
28c5d4dac8SGerd Hoffmann     } else {
29c5d4dac8SGerd Hoffmann         vvga->vga.hw_ops->invalidate(&vvga->vga);
30c5d4dac8SGerd Hoffmann     }
31c5d4dac8SGerd Hoffmann }
32c5d4dac8SGerd Hoffmann 
33c5d4dac8SGerd Hoffmann static void virtio_vga_update_display(void *opaque)
34c5d4dac8SGerd Hoffmann {
35c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = opaque;
36c5d4dac8SGerd Hoffmann 
37c5d4dac8SGerd Hoffmann     if (vvga->vdev.enable) {
38c5d4dac8SGerd Hoffmann         virtio_gpu_ops.gfx_update(&vvga->vdev);
39c5d4dac8SGerd Hoffmann     } else {
40c5d4dac8SGerd Hoffmann         vvga->vga.hw_ops->gfx_update(&vvga->vga);
41c5d4dac8SGerd Hoffmann     }
42c5d4dac8SGerd Hoffmann }
43c5d4dac8SGerd Hoffmann 
44c5d4dac8SGerd Hoffmann static void virtio_vga_text_update(void *opaque, console_ch_t *chardata)
45c5d4dac8SGerd Hoffmann {
46c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = opaque;
47c5d4dac8SGerd Hoffmann 
48c5d4dac8SGerd Hoffmann     if (vvga->vdev.enable) {
49c5d4dac8SGerd Hoffmann         if (virtio_gpu_ops.text_update) {
50c5d4dac8SGerd Hoffmann             virtio_gpu_ops.text_update(&vvga->vdev, chardata);
51c5d4dac8SGerd Hoffmann         }
52c5d4dac8SGerd Hoffmann     } else {
53c5d4dac8SGerd Hoffmann         if (vvga->vga.hw_ops->text_update) {
54c5d4dac8SGerd Hoffmann             vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
55c5d4dac8SGerd Hoffmann         }
56c5d4dac8SGerd Hoffmann     }
57c5d4dac8SGerd Hoffmann }
58c5d4dac8SGerd Hoffmann 
59c5d4dac8SGerd Hoffmann static int virtio_vga_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
60c5d4dac8SGerd Hoffmann {
61c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = opaque;
62c5d4dac8SGerd Hoffmann 
63c5d4dac8SGerd Hoffmann     if (virtio_gpu_ops.ui_info) {
64c5d4dac8SGerd Hoffmann         return virtio_gpu_ops.ui_info(&vvga->vdev, idx, info);
65c5d4dac8SGerd Hoffmann     }
66c5d4dac8SGerd Hoffmann     return -1;
67c5d4dac8SGerd Hoffmann }
68c5d4dac8SGerd Hoffmann 
69321c9adbSGerd Hoffmann static void virtio_vga_gl_block(void *opaque, bool block)
70321c9adbSGerd Hoffmann {
71321c9adbSGerd Hoffmann     VirtIOVGA *vvga = opaque;
72321c9adbSGerd Hoffmann 
73321c9adbSGerd Hoffmann     if (virtio_gpu_ops.gl_block) {
74321c9adbSGerd Hoffmann         virtio_gpu_ops.gl_block(&vvga->vdev, block);
75321c9adbSGerd Hoffmann     }
76321c9adbSGerd Hoffmann }
77321c9adbSGerd Hoffmann 
78c5d4dac8SGerd Hoffmann static const GraphicHwOps virtio_vga_ops = {
79c5d4dac8SGerd Hoffmann     .invalidate = virtio_vga_invalidate_display,
80c5d4dac8SGerd Hoffmann     .gfx_update = virtio_vga_update_display,
81c5d4dac8SGerd Hoffmann     .text_update = virtio_vga_text_update,
82c5d4dac8SGerd Hoffmann     .ui_info = virtio_vga_ui_info,
83321c9adbSGerd Hoffmann     .gl_block = virtio_vga_gl_block,
84c5d4dac8SGerd Hoffmann };
85c5d4dac8SGerd Hoffmann 
860c244e50SGerd Hoffmann static const VMStateDescription vmstate_virtio_vga = {
870c244e50SGerd Hoffmann     .name = "virtio-vga",
880c244e50SGerd Hoffmann     .version_id = 2,
890c244e50SGerd Hoffmann     .minimum_version_id = 2,
900c244e50SGerd Hoffmann     .fields = (VMStateField[]) {
910c244e50SGerd Hoffmann         /* no pci stuff here, saving the virtio device will handle that */
920c244e50SGerd Hoffmann         VMSTATE_STRUCT(vga, VirtIOVGA, 0, vmstate_vga_common, VGACommonState),
930c244e50SGerd Hoffmann         VMSTATE_END_OF_LIST()
940c244e50SGerd Hoffmann     }
950c244e50SGerd Hoffmann };
960c244e50SGerd Hoffmann 
97c5d4dac8SGerd Hoffmann /* VGA device wrapper around PCI device around virtio GPU */
98c5d4dac8SGerd Hoffmann static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
99c5d4dac8SGerd Hoffmann {
100c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = VIRTIO_VGA(vpci_dev);
101c5d4dac8SGerd Hoffmann     VirtIOGPU *g = &vvga->vdev;
102c5d4dac8SGerd Hoffmann     VGACommonState *vga = &vvga->vga;
103d0f0c865SMarc-André Lureau     Error *err = NULL;
104c5d4dac8SGerd Hoffmann     uint32_t offset;
105e1888295SGerd Hoffmann     int i;
106c5d4dac8SGerd Hoffmann 
107c5d4dac8SGerd Hoffmann     /* init vga compat bits */
108c5d4dac8SGerd Hoffmann     vga->vram_size_mb = 8;
109c5d4dac8SGerd Hoffmann     vga_common_init(vga, OBJECT(vpci_dev), false);
110c5d4dac8SGerd Hoffmann     vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
111c5d4dac8SGerd Hoffmann              pci_address_space_io(&vpci_dev->pci_dev), true);
112c5d4dac8SGerd Hoffmann     pci_register_bar(&vpci_dev->pci_dev, 0,
113c5d4dac8SGerd Hoffmann                      PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
114c5d4dac8SGerd Hoffmann 
115c5d4dac8SGerd Hoffmann     /*
116c5d4dac8SGerd Hoffmann      * Configure virtio bar and regions
117c5d4dac8SGerd Hoffmann      *
118c5d4dac8SGerd Hoffmann      * We use bar #2 for the mmio regions, to be compatible with stdvga.
119c5d4dac8SGerd Hoffmann      * virtio regions are moved to the end of bar #2, to make room for
120c5d4dac8SGerd Hoffmann      * the stdvga mmio registers at the start of bar #2.
121c5d4dac8SGerd Hoffmann      */
1227a25126dSChen Fan     vpci_dev->modern_mem_bar_idx = 2;
1237a25126dSChen Fan     vpci_dev->msix_bar_idx = 4;
124c2843e93SGerd Hoffmann 
125c2843e93SGerd Hoffmann     if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
126c2843e93SGerd Hoffmann         /*
127c2843e93SGerd Hoffmann          * with page-per-vq=off there is no padding space we can use
128c2843e93SGerd Hoffmann          * for the stdvga registers.  Make the common and isr regions
129c2843e93SGerd Hoffmann          * smaller then.
130c2843e93SGerd Hoffmann          */
131c2843e93SGerd Hoffmann         vpci_dev->common.size /= 2;
132c2843e93SGerd Hoffmann         vpci_dev->isr.size /= 2;
133c2843e93SGerd Hoffmann     }
134c2843e93SGerd Hoffmann 
135c5d4dac8SGerd Hoffmann     offset = memory_region_size(&vpci_dev->modern_bar);
136c5d4dac8SGerd Hoffmann     offset -= vpci_dev->notify.size;
137c5d4dac8SGerd Hoffmann     vpci_dev->notify.offset = offset;
138c5d4dac8SGerd Hoffmann     offset -= vpci_dev->device.size;
139c5d4dac8SGerd Hoffmann     vpci_dev->device.offset = offset;
140c5d4dac8SGerd Hoffmann     offset -= vpci_dev->isr.size;
141c5d4dac8SGerd Hoffmann     vpci_dev->isr.offset = offset;
142c5d4dac8SGerd Hoffmann     offset -= vpci_dev->common.size;
143c5d4dac8SGerd Hoffmann     vpci_dev->common.offset = offset;
144c5d4dac8SGerd Hoffmann 
145c5d4dac8SGerd Hoffmann     /* init virtio bits */
146c5d4dac8SGerd Hoffmann     qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus));
1479a4c0e22SMarcel Apfelbaum     virtio_pci_force_virtio_1(vpci_dev);
148d0f0c865SMarc-André Lureau     object_property_set_bool(OBJECT(g), true, "realized", &err);
149d0f0c865SMarc-André Lureau     if (err) {
150d0f0c865SMarc-André Lureau         error_propagate(errp, err);
151d0f0c865SMarc-André Lureau         return;
152d0f0c865SMarc-André Lureau     }
153c5d4dac8SGerd Hoffmann 
154c5d4dac8SGerd Hoffmann     /* add stdvga mmio regions */
155*93abfc88SGerd Hoffmann     pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
156c5d4dac8SGerd Hoffmann                                  vvga->vga_mrs, true);
157c5d4dac8SGerd Hoffmann 
158c5d4dac8SGerd Hoffmann     vga->con = g->scanout[0].con;
159c5d4dac8SGerd Hoffmann     graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga);
160e1888295SGerd Hoffmann 
161e1888295SGerd Hoffmann     for (i = 0; i < g->conf.max_outputs; i++) {
162e1888295SGerd Hoffmann         object_property_set_link(OBJECT(g->scanout[i].con),
163e1888295SGerd Hoffmann                                  OBJECT(vpci_dev),
164e1888295SGerd Hoffmann                                  "device", errp);
165e1888295SGerd Hoffmann     }
166c5d4dac8SGerd Hoffmann }
167c5d4dac8SGerd Hoffmann 
168c5d4dac8SGerd Hoffmann static void virtio_vga_reset(DeviceState *dev)
169c5d4dac8SGerd Hoffmann {
170c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = VIRTIO_VGA(dev);
171c5d4dac8SGerd Hoffmann     vvga->vdev.enable = 0;
172c5d4dac8SGerd Hoffmann 
173c5d4dac8SGerd Hoffmann     vga_dirty_log_start(&vvga->vga);
174c5d4dac8SGerd Hoffmann }
175c5d4dac8SGerd Hoffmann 
176c5d4dac8SGerd Hoffmann static Property virtio_vga_properties[] = {
177c5d4dac8SGerd Hoffmann     DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
178c5d4dac8SGerd Hoffmann     DEFINE_PROP_END_OF_LIST(),
179c5d4dac8SGerd Hoffmann };
180c5d4dac8SGerd Hoffmann 
181c5d4dac8SGerd Hoffmann static void virtio_vga_class_init(ObjectClass *klass, void *data)
182c5d4dac8SGerd Hoffmann {
183c5d4dac8SGerd Hoffmann     DeviceClass *dc = DEVICE_CLASS(klass);
184c5d4dac8SGerd Hoffmann     VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
185c5d4dac8SGerd Hoffmann     PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
186c5d4dac8SGerd Hoffmann 
187c5d4dac8SGerd Hoffmann     set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
188c5d4dac8SGerd Hoffmann     dc->props = virtio_vga_properties;
189c5d4dac8SGerd Hoffmann     dc->reset = virtio_vga_reset;
1900c244e50SGerd Hoffmann     dc->vmsd = &vmstate_virtio_vga;
191c5d4dac8SGerd Hoffmann     dc->hotpluggable = false;
192c5d4dac8SGerd Hoffmann 
193c5d4dac8SGerd Hoffmann     k->realize = virtio_vga_realize;
194c5d4dac8SGerd Hoffmann     pcidev_k->romfile = "vgabios-virtio.bin";
195c5d4dac8SGerd Hoffmann     pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
196c5d4dac8SGerd Hoffmann }
197c5d4dac8SGerd Hoffmann 
198c5d4dac8SGerd Hoffmann static void virtio_vga_inst_initfn(Object *obj)
199c5d4dac8SGerd Hoffmann {
200c5d4dac8SGerd Hoffmann     VirtIOVGA *dev = VIRTIO_VGA(obj);
201b3409a31SGerd Hoffmann 
202b3409a31SGerd Hoffmann     virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
203b3409a31SGerd Hoffmann                                 TYPE_VIRTIO_GPU);
204c5d4dac8SGerd Hoffmann }
205c5d4dac8SGerd Hoffmann 
206c5d4dac8SGerd Hoffmann static TypeInfo virtio_vga_info = {
207c5d4dac8SGerd Hoffmann     .name          = TYPE_VIRTIO_VGA,
208c5d4dac8SGerd Hoffmann     .parent        = TYPE_VIRTIO_PCI,
209c5d4dac8SGerd Hoffmann     .instance_size = sizeof(struct VirtIOVGA),
210c5d4dac8SGerd Hoffmann     .instance_init = virtio_vga_inst_initfn,
211c5d4dac8SGerd Hoffmann     .class_init    = virtio_vga_class_init,
212c5d4dac8SGerd Hoffmann };
213c5d4dac8SGerd Hoffmann 
214c5d4dac8SGerd Hoffmann static void virtio_vga_register_types(void)
215c5d4dac8SGerd Hoffmann {
216c5d4dac8SGerd Hoffmann     type_register_static(&virtio_vga_info);
217c5d4dac8SGerd Hoffmann }
218c5d4dac8SGerd Hoffmann 
219c5d4dac8SGerd Hoffmann type_init(virtio_vga_register_types)
220