xref: /qemu/hw/display/virtio-vga.c (revision 7ecb381fcf514fd5e083eb3c9eab4eb557eba593)
19b8bfe21SPeter Maydell #include "qemu/osdep.h"
2c5d4dac8SGerd Hoffmann #include "hw/hw.h"
3c5d4dac8SGerd Hoffmann #include "hw/pci/pci.h"
4c5d4dac8SGerd Hoffmann #include "vga_int.h"
5c5d4dac8SGerd Hoffmann #include "hw/virtio/virtio-pci.h"
6*7ecb381fSJuan Quintela #include "hw/virtio/virtio-gpu.h"
7d0f0c865SMarc-André Lureau #include "qapi/error.h"
8c5d4dac8SGerd Hoffmann 
9c5d4dac8SGerd Hoffmann /*
10c5d4dac8SGerd Hoffmann  * virtio-vga: This extends VirtioPCIProxy.
11c5d4dac8SGerd Hoffmann  */
12c5d4dac8SGerd Hoffmann #define TYPE_VIRTIO_VGA "virtio-vga"
13c5d4dac8SGerd Hoffmann #define VIRTIO_VGA(obj) \
14c5d4dac8SGerd Hoffmann         OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA)
15c5d4dac8SGerd Hoffmann 
16c5d4dac8SGerd Hoffmann typedef struct VirtIOVGA {
17c5d4dac8SGerd Hoffmann     VirtIOPCIProxy parent_obj;
18c5d4dac8SGerd Hoffmann     VirtIOGPU      vdev;
19c5d4dac8SGerd Hoffmann     VGACommonState vga;
20c5d4dac8SGerd Hoffmann     MemoryRegion   vga_mrs[3];
21c5d4dac8SGerd Hoffmann } VirtIOVGA;
22c5d4dac8SGerd Hoffmann 
23c5d4dac8SGerd Hoffmann static void virtio_vga_invalidate_display(void *opaque)
24c5d4dac8SGerd Hoffmann {
25c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = opaque;
26c5d4dac8SGerd Hoffmann 
27c5d4dac8SGerd Hoffmann     if (vvga->vdev.enable) {
28c5d4dac8SGerd Hoffmann         virtio_gpu_ops.invalidate(&vvga->vdev);
29c5d4dac8SGerd Hoffmann     } else {
30c5d4dac8SGerd Hoffmann         vvga->vga.hw_ops->invalidate(&vvga->vga);
31c5d4dac8SGerd Hoffmann     }
32c5d4dac8SGerd Hoffmann }
33c5d4dac8SGerd Hoffmann 
34c5d4dac8SGerd Hoffmann static void virtio_vga_update_display(void *opaque)
35c5d4dac8SGerd Hoffmann {
36c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = opaque;
37c5d4dac8SGerd Hoffmann 
38c5d4dac8SGerd Hoffmann     if (vvga->vdev.enable) {
39c5d4dac8SGerd Hoffmann         virtio_gpu_ops.gfx_update(&vvga->vdev);
40c5d4dac8SGerd Hoffmann     } else {
41c5d4dac8SGerd Hoffmann         vvga->vga.hw_ops->gfx_update(&vvga->vga);
42c5d4dac8SGerd Hoffmann     }
43c5d4dac8SGerd Hoffmann }
44c5d4dac8SGerd Hoffmann 
45c5d4dac8SGerd Hoffmann static void virtio_vga_text_update(void *opaque, console_ch_t *chardata)
46c5d4dac8SGerd Hoffmann {
47c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = opaque;
48c5d4dac8SGerd Hoffmann 
49c5d4dac8SGerd Hoffmann     if (vvga->vdev.enable) {
50c5d4dac8SGerd Hoffmann         if (virtio_gpu_ops.text_update) {
51c5d4dac8SGerd Hoffmann             virtio_gpu_ops.text_update(&vvga->vdev, chardata);
52c5d4dac8SGerd Hoffmann         }
53c5d4dac8SGerd Hoffmann     } else {
54c5d4dac8SGerd Hoffmann         if (vvga->vga.hw_ops->text_update) {
55c5d4dac8SGerd Hoffmann             vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
56c5d4dac8SGerd Hoffmann         }
57c5d4dac8SGerd Hoffmann     }
58c5d4dac8SGerd Hoffmann }
59c5d4dac8SGerd Hoffmann 
60c5d4dac8SGerd Hoffmann static int virtio_vga_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
61c5d4dac8SGerd Hoffmann {
62c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = opaque;
63c5d4dac8SGerd Hoffmann 
64c5d4dac8SGerd Hoffmann     if (virtio_gpu_ops.ui_info) {
65c5d4dac8SGerd Hoffmann         return virtio_gpu_ops.ui_info(&vvga->vdev, idx, info);
66c5d4dac8SGerd Hoffmann     }
67c5d4dac8SGerd Hoffmann     return -1;
68c5d4dac8SGerd Hoffmann }
69c5d4dac8SGerd Hoffmann 
70321c9adbSGerd Hoffmann static void virtio_vga_gl_block(void *opaque, bool block)
71321c9adbSGerd Hoffmann {
72321c9adbSGerd Hoffmann     VirtIOVGA *vvga = opaque;
73321c9adbSGerd Hoffmann 
74321c9adbSGerd Hoffmann     if (virtio_gpu_ops.gl_block) {
75321c9adbSGerd Hoffmann         virtio_gpu_ops.gl_block(&vvga->vdev, block);
76321c9adbSGerd Hoffmann     }
77321c9adbSGerd Hoffmann }
78321c9adbSGerd Hoffmann 
79c5d4dac8SGerd Hoffmann static const GraphicHwOps virtio_vga_ops = {
80c5d4dac8SGerd Hoffmann     .invalidate = virtio_vga_invalidate_display,
81c5d4dac8SGerd Hoffmann     .gfx_update = virtio_vga_update_display,
82c5d4dac8SGerd Hoffmann     .text_update = virtio_vga_text_update,
83c5d4dac8SGerd Hoffmann     .ui_info = virtio_vga_ui_info,
84321c9adbSGerd Hoffmann     .gl_block = virtio_vga_gl_block,
85c5d4dac8SGerd Hoffmann };
86c5d4dac8SGerd Hoffmann 
870c244e50SGerd Hoffmann static const VMStateDescription vmstate_virtio_vga = {
880c244e50SGerd Hoffmann     .name = "virtio-vga",
890c244e50SGerd Hoffmann     .version_id = 2,
900c244e50SGerd Hoffmann     .minimum_version_id = 2,
910c244e50SGerd Hoffmann     .fields = (VMStateField[]) {
920c244e50SGerd Hoffmann         /* no pci stuff here, saving the virtio device will handle that */
930c244e50SGerd Hoffmann         VMSTATE_STRUCT(vga, VirtIOVGA, 0, vmstate_vga_common, VGACommonState),
940c244e50SGerd Hoffmann         VMSTATE_END_OF_LIST()
950c244e50SGerd Hoffmann     }
960c244e50SGerd Hoffmann };
970c244e50SGerd Hoffmann 
98c5d4dac8SGerd Hoffmann /* VGA device wrapper around PCI device around virtio GPU */
99c5d4dac8SGerd Hoffmann static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
100c5d4dac8SGerd Hoffmann {
101c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = VIRTIO_VGA(vpci_dev);
102c5d4dac8SGerd Hoffmann     VirtIOGPU *g = &vvga->vdev;
103c5d4dac8SGerd Hoffmann     VGACommonState *vga = &vvga->vga;
104d0f0c865SMarc-André Lureau     Error *err = NULL;
105c5d4dac8SGerd Hoffmann     uint32_t offset;
106e1888295SGerd Hoffmann     int i;
107c5d4dac8SGerd Hoffmann 
108c5d4dac8SGerd Hoffmann     /* init vga compat bits */
109c5d4dac8SGerd Hoffmann     vga->vram_size_mb = 8;
1101fcfdc43SGerd Hoffmann     vga_common_init(vga, OBJECT(vpci_dev));
111c5d4dac8SGerd Hoffmann     vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
112c5d4dac8SGerd Hoffmann              pci_address_space_io(&vpci_dev->pci_dev), true);
113c5d4dac8SGerd Hoffmann     pci_register_bar(&vpci_dev->pci_dev, 0,
114c5d4dac8SGerd Hoffmann                      PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
115c5d4dac8SGerd Hoffmann 
116c5d4dac8SGerd Hoffmann     /*
117c5d4dac8SGerd Hoffmann      * Configure virtio bar and regions
118c5d4dac8SGerd Hoffmann      *
119c5d4dac8SGerd Hoffmann      * We use bar #2 for the mmio regions, to be compatible with stdvga.
120c5d4dac8SGerd Hoffmann      * virtio regions are moved to the end of bar #2, to make room for
121c5d4dac8SGerd Hoffmann      * the stdvga mmio registers at the start of bar #2.
122c5d4dac8SGerd Hoffmann      */
1237a25126dSChen Fan     vpci_dev->modern_mem_bar_idx = 2;
1247a25126dSChen Fan     vpci_dev->msix_bar_idx = 4;
125c2843e93SGerd Hoffmann 
126c2843e93SGerd Hoffmann     if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
127c2843e93SGerd Hoffmann         /*
128c2843e93SGerd Hoffmann          * with page-per-vq=off there is no padding space we can use
129c2843e93SGerd Hoffmann          * for the stdvga registers.  Make the common and isr regions
130c2843e93SGerd Hoffmann          * smaller then.
131c2843e93SGerd Hoffmann          */
132c2843e93SGerd Hoffmann         vpci_dev->common.size /= 2;
133c2843e93SGerd Hoffmann         vpci_dev->isr.size /= 2;
134c2843e93SGerd Hoffmann     }
135c2843e93SGerd Hoffmann 
136c5d4dac8SGerd Hoffmann     offset = memory_region_size(&vpci_dev->modern_bar);
137c5d4dac8SGerd Hoffmann     offset -= vpci_dev->notify.size;
138c5d4dac8SGerd Hoffmann     vpci_dev->notify.offset = offset;
139c5d4dac8SGerd Hoffmann     offset -= vpci_dev->device.size;
140c5d4dac8SGerd Hoffmann     vpci_dev->device.offset = offset;
141c5d4dac8SGerd Hoffmann     offset -= vpci_dev->isr.size;
142c5d4dac8SGerd Hoffmann     vpci_dev->isr.offset = offset;
143c5d4dac8SGerd Hoffmann     offset -= vpci_dev->common.size;
144c5d4dac8SGerd Hoffmann     vpci_dev->common.offset = offset;
145c5d4dac8SGerd Hoffmann 
146c5d4dac8SGerd Hoffmann     /* init virtio bits */
147c5d4dac8SGerd Hoffmann     qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus));
1489a4c0e22SMarcel Apfelbaum     virtio_pci_force_virtio_1(vpci_dev);
149d0f0c865SMarc-André Lureau     object_property_set_bool(OBJECT(g), true, "realized", &err);
150d0f0c865SMarc-André Lureau     if (err) {
151d0f0c865SMarc-André Lureau         error_propagate(errp, err);
152d0f0c865SMarc-André Lureau         return;
153d0f0c865SMarc-André Lureau     }
154c5d4dac8SGerd Hoffmann 
155c5d4dac8SGerd Hoffmann     /* add stdvga mmio regions */
15693abfc88SGerd Hoffmann     pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
157d46b40fcSGerd Hoffmann                                  vvga->vga_mrs, true, false);
158c5d4dac8SGerd Hoffmann 
159c5d4dac8SGerd Hoffmann     vga->con = g->scanout[0].con;
160c5d4dac8SGerd Hoffmann     graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga);
161e1888295SGerd Hoffmann 
162e1888295SGerd Hoffmann     for (i = 0; i < g->conf.max_outputs; i++) {
163e1888295SGerd Hoffmann         object_property_set_link(OBJECT(g->scanout[i].con),
164e1888295SGerd Hoffmann                                  OBJECT(vpci_dev),
165e1888295SGerd Hoffmann                                  "device", errp);
166e1888295SGerd Hoffmann     }
167c5d4dac8SGerd Hoffmann }
168c5d4dac8SGerd Hoffmann 
169c5d4dac8SGerd Hoffmann static void virtio_vga_reset(DeviceState *dev)
170c5d4dac8SGerd Hoffmann {
171c5d4dac8SGerd Hoffmann     VirtIOVGA *vvga = VIRTIO_VGA(dev);
172c5d4dac8SGerd Hoffmann 
17343e4dbe2SGerd Hoffmann     /* reset virtio-gpu */
17443e4dbe2SGerd Hoffmann     virtio_gpu_reset(VIRTIO_DEVICE(&vvga->vdev));
17543e4dbe2SGerd Hoffmann 
17643e4dbe2SGerd Hoffmann     /* reset vga */
17743e4dbe2SGerd Hoffmann     vga_common_reset(&vvga->vga);
178c5d4dac8SGerd Hoffmann     vga_dirty_log_start(&vvga->vga);
179c5d4dac8SGerd Hoffmann }
180c5d4dac8SGerd Hoffmann 
181c5d4dac8SGerd Hoffmann static Property virtio_vga_properties[] = {
182c5d4dac8SGerd Hoffmann     DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
183c5d4dac8SGerd Hoffmann     DEFINE_PROP_END_OF_LIST(),
184c5d4dac8SGerd Hoffmann };
185c5d4dac8SGerd Hoffmann 
186c5d4dac8SGerd Hoffmann static void virtio_vga_class_init(ObjectClass *klass, void *data)
187c5d4dac8SGerd Hoffmann {
188c5d4dac8SGerd Hoffmann     DeviceClass *dc = DEVICE_CLASS(klass);
189c5d4dac8SGerd Hoffmann     VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
190c5d4dac8SGerd Hoffmann     PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
191c5d4dac8SGerd Hoffmann 
192c5d4dac8SGerd Hoffmann     set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
193c5d4dac8SGerd Hoffmann     dc->props = virtio_vga_properties;
194c5d4dac8SGerd Hoffmann     dc->reset = virtio_vga_reset;
1950c244e50SGerd Hoffmann     dc->vmsd = &vmstate_virtio_vga;
196c5d4dac8SGerd Hoffmann     dc->hotpluggable = false;
197c5d4dac8SGerd Hoffmann 
198c5d4dac8SGerd Hoffmann     k->realize = virtio_vga_realize;
199c5d4dac8SGerd Hoffmann     pcidev_k->romfile = "vgabios-virtio.bin";
200c5d4dac8SGerd Hoffmann     pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
201c5d4dac8SGerd Hoffmann }
202c5d4dac8SGerd Hoffmann 
203c5d4dac8SGerd Hoffmann static void virtio_vga_inst_initfn(Object *obj)
204c5d4dac8SGerd Hoffmann {
205c5d4dac8SGerd Hoffmann     VirtIOVGA *dev = VIRTIO_VGA(obj);
206b3409a31SGerd Hoffmann 
207b3409a31SGerd Hoffmann     virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
208b3409a31SGerd Hoffmann                                 TYPE_VIRTIO_GPU);
209c5d4dac8SGerd Hoffmann }
210c5d4dac8SGerd Hoffmann 
211a4ee4c8bSEduardo Habkost static VirtioPCIDeviceTypeInfo virtio_vga_info = {
212a4ee4c8bSEduardo Habkost     .generic_name  = TYPE_VIRTIO_VGA,
213c5d4dac8SGerd Hoffmann     .instance_size = sizeof(struct VirtIOVGA),
214c5d4dac8SGerd Hoffmann     .instance_init = virtio_vga_inst_initfn,
215c5d4dac8SGerd Hoffmann     .class_init    = virtio_vga_class_init,
216c5d4dac8SGerd Hoffmann };
217c5d4dac8SGerd Hoffmann 
218c5d4dac8SGerd Hoffmann static void virtio_vga_register_types(void)
219c5d4dac8SGerd Hoffmann {
220a4ee4c8bSEduardo Habkost     virtio_pci_types_register(&virtio_vga_info);
221c5d4dac8SGerd Hoffmann }
222c5d4dac8SGerd Hoffmann 
223c5d4dac8SGerd Hoffmann type_init(virtio_vga_register_types)
224