179b97bf2SJuan Quintela /* 23ac25236SPhilippe Mathieu-Daudé * QEMU MMIO VGA Emulator. 379b97bf2SJuan Quintela * 479b97bf2SJuan Quintela * Copyright (c) 2003 Fabrice Bellard 579b97bf2SJuan Quintela * 679b97bf2SJuan Quintela * Permission is hereby granted, free of charge, to any person obtaining a copy 779b97bf2SJuan Quintela * of this software and associated documentation files (the "Software"), to deal 879b97bf2SJuan Quintela * in the Software without restriction, including without limitation the rights 979b97bf2SJuan Quintela * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 1079b97bf2SJuan Quintela * copies of the Software, and to permit persons to whom the Software is 1179b97bf2SJuan Quintela * furnished to do so, subject to the following conditions: 1279b97bf2SJuan Quintela * 1379b97bf2SJuan Quintela * The above copyright notice and this permission notice shall be included in 1479b97bf2SJuan Quintela * all copies or substantial portions of the Software. 1579b97bf2SJuan Quintela * 1679b97bf2SJuan Quintela * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1779b97bf2SJuan Quintela * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1879b97bf2SJuan Quintela * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1979b97bf2SJuan Quintela * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 2079b97bf2SJuan Quintela * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 2179b97bf2SJuan Quintela * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 2279b97bf2SJuan Quintela * THE SOFTWARE. 2379b97bf2SJuan Quintela */ 24d6454270SMarkus Armbruster 2547df5154SPeter Maydell #include "qemu/osdep.h" 2623f6e3b1SPhilippe Mathieu-Daudé #include "qapi/error.h" 2723f6e3b1SPhilippe Mathieu-Daudé #include "hw/sysbus.h" 2823f6e3b1SPhilippe Mathieu-Daudé #include "hw/display/vga.h" 2923f6e3b1SPhilippe Mathieu-Daudé #include "hw/qdev-properties.h" 3047b43a1fSPaolo Bonzini #include "vga_int.h" 3179b97bf2SJuan Quintela 3223f6e3b1SPhilippe Mathieu-Daudé /* 3323f6e3b1SPhilippe Mathieu-Daudé * QEMU interface: 3423f6e3b1SPhilippe Mathieu-Daudé * + sysbus MMIO region 0: VGA I/O registers 3523f6e3b1SPhilippe Mathieu-Daudé * + sysbus MMIO region 1: VGA MMIO registers 3623f6e3b1SPhilippe Mathieu-Daudé * + sysbus MMIO region 2: VGA memory 3723f6e3b1SPhilippe Mathieu-Daudé */ 384a1e244eSGerd Hoffmann 3923f6e3b1SPhilippe Mathieu-Daudé OBJECT_DECLARE_SIMPLE_TYPE(VGAMmioState, VGA_MMIO) 4023f6e3b1SPhilippe Mathieu-Daudé 4123f6e3b1SPhilippe Mathieu-Daudé struct VGAMmioState { 4223f6e3b1SPhilippe Mathieu-Daudé /*< private >*/ 4323f6e3b1SPhilippe Mathieu-Daudé SysBusDevice parent_obj; 4423f6e3b1SPhilippe Mathieu-Daudé 4523f6e3b1SPhilippe Mathieu-Daudé /*< public >*/ 4679b97bf2SJuan Quintela VGACommonState vga; 4723f6e3b1SPhilippe Mathieu-Daudé MemoryRegion iomem; 4823f6e3b1SPhilippe Mathieu-Daudé MemoryRegion lowmem; 4979b97bf2SJuan Quintela 5023f6e3b1SPhilippe Mathieu-Daudé uint8_t it_shift; 5123f6e3b1SPhilippe Mathieu-Daudé }; 5223f6e3b1SPhilippe Mathieu-Daudé 535f927998SPeter Maydell static uint64_t vga_mm_read(void *opaque, hwaddr addr, unsigned size) 5479b97bf2SJuan Quintela { 553ac25236SPhilippe Mathieu-Daudé VGAMmioState *s = opaque; 5679b97bf2SJuan Quintela 575f927998SPeter Maydell return vga_ioport_read(&s->vga, addr >> s->it_shift) & 585f927998SPeter Maydell MAKE_64BIT_MASK(0, size * 8); 5979b97bf2SJuan Quintela } 6079b97bf2SJuan Quintela 615f927998SPeter Maydell static void vga_mm_write(void *opaque, hwaddr addr, uint64_t value, 625f927998SPeter Maydell unsigned size) 6379b97bf2SJuan Quintela { 643ac25236SPhilippe Mathieu-Daudé VGAMmioState *s = opaque; 6579b97bf2SJuan Quintela 665f927998SPeter Maydell vga_ioport_write(&s->vga, addr >> s->it_shift, 675f927998SPeter Maydell value & MAKE_64BIT_MASK(0, size * 8)); 6879b97bf2SJuan Quintela } 6979b97bf2SJuan Quintela 70b1950430SAvi Kivity static const MemoryRegionOps vga_mm_ctrl_ops = { 715f927998SPeter Maydell .read = vga_mm_read, 725f927998SPeter Maydell .write = vga_mm_write, 735f927998SPeter Maydell .valid.min_access_size = 1, 745f927998SPeter Maydell .valid.max_access_size = 4, 755f927998SPeter Maydell .impl.min_access_size = 1, 765f927998SPeter Maydell .impl.max_access_size = 4, 77b1950430SAvi Kivity .endianness = DEVICE_NATIVE_ENDIAN, 7879b97bf2SJuan Quintela }; 7979b97bf2SJuan Quintela 8023f6e3b1SPhilippe Mathieu-Daudé static void vga_mmio_reset(DeviceState *dev) 8123f6e3b1SPhilippe Mathieu-Daudé { 8223f6e3b1SPhilippe Mathieu-Daudé VGAMmioState *s = VGA_MMIO(dev); 8323f6e3b1SPhilippe Mathieu-Daudé 8423f6e3b1SPhilippe Mathieu-Daudé vga_common_reset(&s->vga); 8523f6e3b1SPhilippe Mathieu-Daudé } 8623f6e3b1SPhilippe Mathieu-Daudé 8723f6e3b1SPhilippe Mathieu-Daudé static void vga_mmio_realizefn(DeviceState *dev, Error **errp) 8823f6e3b1SPhilippe Mathieu-Daudé { 8923f6e3b1SPhilippe Mathieu-Daudé VGAMmioState *s = VGA_MMIO(dev); 9023f6e3b1SPhilippe Mathieu-Daudé SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 9123f6e3b1SPhilippe Mathieu-Daudé 9223f6e3b1SPhilippe Mathieu-Daudé memory_region_init_io(&s->iomem, OBJECT(dev), &vga_mm_ctrl_ops, s, 9323f6e3b1SPhilippe Mathieu-Daudé "vga-mmio", 0x100000); 9423f6e3b1SPhilippe Mathieu-Daudé memory_region_set_flush_coalesced(&s->iomem); 9523f6e3b1SPhilippe Mathieu-Daudé sysbus_init_mmio(sbd, &s->iomem); 9623f6e3b1SPhilippe Mathieu-Daudé 9723f6e3b1SPhilippe Mathieu-Daudé /* XXX: endianness? */ 9823f6e3b1SPhilippe Mathieu-Daudé memory_region_init_io(&s->lowmem, OBJECT(dev), &vga_mem_ops, &s->vga, 9923f6e3b1SPhilippe Mathieu-Daudé "vga-lowmem", 0x20000); 10023f6e3b1SPhilippe Mathieu-Daudé memory_region_set_coalescing(&s->lowmem); 10123f6e3b1SPhilippe Mathieu-Daudé sysbus_init_mmio(sbd, &s->lowmem); 10223f6e3b1SPhilippe Mathieu-Daudé 10323f6e3b1SPhilippe Mathieu-Daudé s->vga.bank_offset = 0; 10423f6e3b1SPhilippe Mathieu-Daudé s->vga.global_vmstate = true; 105*6832deb8SThomas Huth if (!vga_common_init(&s->vga, OBJECT(dev), errp)) { 106*6832deb8SThomas Huth return; 107*6832deb8SThomas Huth } 108*6832deb8SThomas Huth 10923f6e3b1SPhilippe Mathieu-Daudé sysbus_init_mmio(sbd, &s->vga.vram); 11023f6e3b1SPhilippe Mathieu-Daudé s->vga.con = graphic_console_init(dev, 0, s->vga.hw_ops, &s->vga); 11123f6e3b1SPhilippe Mathieu-Daudé } 11223f6e3b1SPhilippe Mathieu-Daudé 11323f6e3b1SPhilippe Mathieu-Daudé static Property vga_mmio_properties[] = { 11423f6e3b1SPhilippe Mathieu-Daudé DEFINE_PROP_UINT8("it_shift", VGAMmioState, it_shift, 0), 11523f6e3b1SPhilippe Mathieu-Daudé DEFINE_PROP_UINT32("vgamem_mb", VGAMmioState, vga.vram_size_mb, 8), 11623f6e3b1SPhilippe Mathieu-Daudé DEFINE_PROP_END_OF_LIST(), 11723f6e3b1SPhilippe Mathieu-Daudé }; 11823f6e3b1SPhilippe Mathieu-Daudé 11923f6e3b1SPhilippe Mathieu-Daudé static void vga_mmio_class_initfn(ObjectClass *klass, void *data) 12023f6e3b1SPhilippe Mathieu-Daudé { 12123f6e3b1SPhilippe Mathieu-Daudé DeviceClass *dc = DEVICE_CLASS(klass); 12223f6e3b1SPhilippe Mathieu-Daudé 12323f6e3b1SPhilippe Mathieu-Daudé dc->realize = vga_mmio_realizefn; 12423f6e3b1SPhilippe Mathieu-Daudé dc->reset = vga_mmio_reset; 12523f6e3b1SPhilippe Mathieu-Daudé dc->vmsd = &vmstate_vga_common; 12623f6e3b1SPhilippe Mathieu-Daudé device_class_set_props(dc, vga_mmio_properties); 12723f6e3b1SPhilippe Mathieu-Daudé set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); 12823f6e3b1SPhilippe Mathieu-Daudé } 12923f6e3b1SPhilippe Mathieu-Daudé 13023f6e3b1SPhilippe Mathieu-Daudé static const TypeInfo vga_mmio_info = { 13123f6e3b1SPhilippe Mathieu-Daudé .name = TYPE_VGA_MMIO, 13223f6e3b1SPhilippe Mathieu-Daudé .parent = TYPE_SYS_BUS_DEVICE, 13323f6e3b1SPhilippe Mathieu-Daudé .instance_size = sizeof(VGAMmioState), 13423f6e3b1SPhilippe Mathieu-Daudé .class_init = vga_mmio_class_initfn, 13523f6e3b1SPhilippe Mathieu-Daudé }; 13623f6e3b1SPhilippe Mathieu-Daudé 13723f6e3b1SPhilippe Mathieu-Daudé static void vga_mmio_register_types(void) 13823f6e3b1SPhilippe Mathieu-Daudé { 13923f6e3b1SPhilippe Mathieu-Daudé type_register_static(&vga_mmio_info); 14023f6e3b1SPhilippe Mathieu-Daudé } 14123f6e3b1SPhilippe Mathieu-Daudé 14223f6e3b1SPhilippe Mathieu-Daudé type_init(vga_mmio_register_types) 143