xref: /qemu/hw/display/vga-mmio.c (revision 23f6e3b11be74abae77584a069ec710d719ac5a1)
179b97bf2SJuan Quintela /*
23ac25236SPhilippe Mathieu-Daudé  * QEMU MMIO VGA Emulator.
379b97bf2SJuan Quintela  *
479b97bf2SJuan Quintela  * Copyright (c) 2003 Fabrice Bellard
579b97bf2SJuan Quintela  *
679b97bf2SJuan Quintela  * Permission is hereby granted, free of charge, to any person obtaining a copy
779b97bf2SJuan Quintela  * of this software and associated documentation files (the "Software"), to deal
879b97bf2SJuan Quintela  * in the Software without restriction, including without limitation the rights
979b97bf2SJuan Quintela  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
1079b97bf2SJuan Quintela  * copies of the Software, and to permit persons to whom the Software is
1179b97bf2SJuan Quintela  * furnished to do so, subject to the following conditions:
1279b97bf2SJuan Quintela  *
1379b97bf2SJuan Quintela  * The above copyright notice and this permission notice shall be included in
1479b97bf2SJuan Quintela  * all copies or substantial portions of the Software.
1579b97bf2SJuan Quintela  *
1679b97bf2SJuan Quintela  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1779b97bf2SJuan Quintela  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1879b97bf2SJuan Quintela  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
1979b97bf2SJuan Quintela  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
2079b97bf2SJuan Quintela  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
2179b97bf2SJuan Quintela  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
2279b97bf2SJuan Quintela  * THE SOFTWARE.
2379b97bf2SJuan Quintela  */
24d6454270SMarkus Armbruster 
2547df5154SPeter Maydell #include "qemu/osdep.h"
26*23f6e3b1SPhilippe Mathieu-Daudé #include "qapi/error.h"
27866e2b37SPhilippe Mathieu-Daudé #include "hw/display/vga.h"
28*23f6e3b1SPhilippe Mathieu-Daudé #include "hw/sysbus.h"
29*23f6e3b1SPhilippe Mathieu-Daudé #include "hw/display/vga.h"
30*23f6e3b1SPhilippe Mathieu-Daudé #include "hw/qdev-properties.h"
3147b43a1fSPaolo Bonzini #include "vga_int.h"
3279b97bf2SJuan Quintela 
33*23f6e3b1SPhilippe Mathieu-Daudé /*
34*23f6e3b1SPhilippe Mathieu-Daudé  * QEMU interface:
35*23f6e3b1SPhilippe Mathieu-Daudé  *  + sysbus MMIO region 0: VGA I/O registers
36*23f6e3b1SPhilippe Mathieu-Daudé  *  + sysbus MMIO region 1: VGA MMIO registers
37*23f6e3b1SPhilippe Mathieu-Daudé  *  + sysbus MMIO region 2: VGA memory
38*23f6e3b1SPhilippe Mathieu-Daudé  */
394a1e244eSGerd Hoffmann 
40*23f6e3b1SPhilippe Mathieu-Daudé OBJECT_DECLARE_SIMPLE_TYPE(VGAMmioState, VGA_MMIO)
41*23f6e3b1SPhilippe Mathieu-Daudé 
42*23f6e3b1SPhilippe Mathieu-Daudé struct VGAMmioState {
43*23f6e3b1SPhilippe Mathieu-Daudé     /*< private >*/
44*23f6e3b1SPhilippe Mathieu-Daudé     SysBusDevice parent_obj;
45*23f6e3b1SPhilippe Mathieu-Daudé 
46*23f6e3b1SPhilippe Mathieu-Daudé     /*< public >*/
4779b97bf2SJuan Quintela     VGACommonState vga;
48*23f6e3b1SPhilippe Mathieu-Daudé     MemoryRegion iomem;
49*23f6e3b1SPhilippe Mathieu-Daudé     MemoryRegion lowmem;
5079b97bf2SJuan Quintela 
51*23f6e3b1SPhilippe Mathieu-Daudé     uint8_t it_shift;
52*23f6e3b1SPhilippe Mathieu-Daudé };
53*23f6e3b1SPhilippe Mathieu-Daudé 
545f927998SPeter Maydell static uint64_t vga_mm_read(void *opaque, hwaddr addr, unsigned size)
5579b97bf2SJuan Quintela {
563ac25236SPhilippe Mathieu-Daudé     VGAMmioState *s = opaque;
5779b97bf2SJuan Quintela 
585f927998SPeter Maydell     return vga_ioport_read(&s->vga, addr >> s->it_shift) &
595f927998SPeter Maydell         MAKE_64BIT_MASK(0, size * 8);
6079b97bf2SJuan Quintela }
6179b97bf2SJuan Quintela 
625f927998SPeter Maydell static void vga_mm_write(void *opaque, hwaddr addr, uint64_t value,
635f927998SPeter Maydell                          unsigned size)
6479b97bf2SJuan Quintela {
653ac25236SPhilippe Mathieu-Daudé     VGAMmioState *s = opaque;
6679b97bf2SJuan Quintela 
675f927998SPeter Maydell     vga_ioport_write(&s->vga, addr >> s->it_shift,
685f927998SPeter Maydell                      value & MAKE_64BIT_MASK(0, size * 8));
6979b97bf2SJuan Quintela }
7079b97bf2SJuan Quintela 
71b1950430SAvi Kivity static const MemoryRegionOps vga_mm_ctrl_ops = {
725f927998SPeter Maydell     .read = vga_mm_read,
735f927998SPeter Maydell     .write = vga_mm_write,
745f927998SPeter Maydell     .valid.min_access_size = 1,
755f927998SPeter Maydell     .valid.max_access_size = 4,
765f927998SPeter Maydell     .impl.min_access_size = 1,
775f927998SPeter Maydell     .impl.max_access_size = 4,
78b1950430SAvi Kivity     .endianness = DEVICE_NATIVE_ENDIAN,
7979b97bf2SJuan Quintela };
8079b97bf2SJuan Quintela 
81*23f6e3b1SPhilippe Mathieu-Daudé static void vga_mmio_reset(DeviceState *dev)
82*23f6e3b1SPhilippe Mathieu-Daudé {
83*23f6e3b1SPhilippe Mathieu-Daudé     VGAMmioState *s = VGA_MMIO(dev);
84*23f6e3b1SPhilippe Mathieu-Daudé 
85*23f6e3b1SPhilippe Mathieu-Daudé     vga_common_reset(&s->vga);
86*23f6e3b1SPhilippe Mathieu-Daudé }
87*23f6e3b1SPhilippe Mathieu-Daudé 
886bd06f77SPhilippe Mathieu-Daudé int vga_mmio_init(hwaddr vram_base, hwaddr ctrl_base,
896bd06f77SPhilippe Mathieu-Daudé                   int it_shift, MemoryRegion *address_space)
9079b97bf2SJuan Quintela {
91*23f6e3b1SPhilippe Mathieu-Daudé     DeviceState *dev;
92*23f6e3b1SPhilippe Mathieu-Daudé     SysBusDevice *s;
9379b97bf2SJuan Quintela 
94*23f6e3b1SPhilippe Mathieu-Daudé     dev = qdev_new(TYPE_VGA_MMIO);
95*23f6e3b1SPhilippe Mathieu-Daudé     qdev_prop_set_uint8(dev, "it_shift", it_shift);
96*23f6e3b1SPhilippe Mathieu-Daudé     s = SYS_BUS_DEVICE(dev);
97*23f6e3b1SPhilippe Mathieu-Daudé     sysbus_realize_and_unref(s, &error_fatal);
986bd06f77SPhilippe Mathieu-Daudé 
99*23f6e3b1SPhilippe Mathieu-Daudé     sysbus_mmio_map(s, 0, ctrl_base);
100*23f6e3b1SPhilippe Mathieu-Daudé     sysbus_mmio_map(s, 1, vram_base + 0x000a0000);
101*23f6e3b1SPhilippe Mathieu-Daudé     sysbus_mmio_map(s, 2, VBE_DISPI_LFB_PHYSICAL_ADDRESS);
102e2328a11SPaolo Bonzini 
10379b97bf2SJuan Quintela     return 0;
10479b97bf2SJuan Quintela }
105*23f6e3b1SPhilippe Mathieu-Daudé 
106*23f6e3b1SPhilippe Mathieu-Daudé static void vga_mmio_realizefn(DeviceState *dev, Error **errp)
107*23f6e3b1SPhilippe Mathieu-Daudé {
108*23f6e3b1SPhilippe Mathieu-Daudé     VGAMmioState *s = VGA_MMIO(dev);
109*23f6e3b1SPhilippe Mathieu-Daudé     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
110*23f6e3b1SPhilippe Mathieu-Daudé 
111*23f6e3b1SPhilippe Mathieu-Daudé     memory_region_init_io(&s->iomem, OBJECT(dev), &vga_mm_ctrl_ops, s,
112*23f6e3b1SPhilippe Mathieu-Daudé                           "vga-mmio", 0x100000);
113*23f6e3b1SPhilippe Mathieu-Daudé     memory_region_set_flush_coalesced(&s->iomem);
114*23f6e3b1SPhilippe Mathieu-Daudé     sysbus_init_mmio(sbd, &s->iomem);
115*23f6e3b1SPhilippe Mathieu-Daudé 
116*23f6e3b1SPhilippe Mathieu-Daudé     /* XXX: endianness? */
117*23f6e3b1SPhilippe Mathieu-Daudé     memory_region_init_io(&s->lowmem, OBJECT(dev), &vga_mem_ops, &s->vga,
118*23f6e3b1SPhilippe Mathieu-Daudé                           "vga-lowmem", 0x20000);
119*23f6e3b1SPhilippe Mathieu-Daudé     memory_region_set_coalescing(&s->lowmem);
120*23f6e3b1SPhilippe Mathieu-Daudé     sysbus_init_mmio(sbd, &s->lowmem);
121*23f6e3b1SPhilippe Mathieu-Daudé 
122*23f6e3b1SPhilippe Mathieu-Daudé     s->vga.bank_offset = 0;
123*23f6e3b1SPhilippe Mathieu-Daudé     s->vga.global_vmstate = true;
124*23f6e3b1SPhilippe Mathieu-Daudé     vga_common_init(&s->vga, OBJECT(dev));
125*23f6e3b1SPhilippe Mathieu-Daudé     sysbus_init_mmio(sbd, &s->vga.vram);
126*23f6e3b1SPhilippe Mathieu-Daudé     s->vga.con = graphic_console_init(dev, 0, s->vga.hw_ops, &s->vga);
127*23f6e3b1SPhilippe Mathieu-Daudé }
128*23f6e3b1SPhilippe Mathieu-Daudé 
129*23f6e3b1SPhilippe Mathieu-Daudé static Property vga_mmio_properties[] = {
130*23f6e3b1SPhilippe Mathieu-Daudé     DEFINE_PROP_UINT8("it_shift", VGAMmioState, it_shift, 0),
131*23f6e3b1SPhilippe Mathieu-Daudé     DEFINE_PROP_UINT32("vgamem_mb", VGAMmioState, vga.vram_size_mb, 8),
132*23f6e3b1SPhilippe Mathieu-Daudé     DEFINE_PROP_END_OF_LIST(),
133*23f6e3b1SPhilippe Mathieu-Daudé };
134*23f6e3b1SPhilippe Mathieu-Daudé 
135*23f6e3b1SPhilippe Mathieu-Daudé static void vga_mmio_class_initfn(ObjectClass *klass, void *data)
136*23f6e3b1SPhilippe Mathieu-Daudé {
137*23f6e3b1SPhilippe Mathieu-Daudé     DeviceClass *dc = DEVICE_CLASS(klass);
138*23f6e3b1SPhilippe Mathieu-Daudé 
139*23f6e3b1SPhilippe Mathieu-Daudé     dc->realize = vga_mmio_realizefn;
140*23f6e3b1SPhilippe Mathieu-Daudé     dc->reset = vga_mmio_reset;
141*23f6e3b1SPhilippe Mathieu-Daudé     dc->vmsd = &vmstate_vga_common;
142*23f6e3b1SPhilippe Mathieu-Daudé     device_class_set_props(dc, vga_mmio_properties);
143*23f6e3b1SPhilippe Mathieu-Daudé     set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
144*23f6e3b1SPhilippe Mathieu-Daudé }
145*23f6e3b1SPhilippe Mathieu-Daudé 
146*23f6e3b1SPhilippe Mathieu-Daudé static const TypeInfo vga_mmio_info = {
147*23f6e3b1SPhilippe Mathieu-Daudé     .name          = TYPE_VGA_MMIO,
148*23f6e3b1SPhilippe Mathieu-Daudé     .parent        = TYPE_SYS_BUS_DEVICE,
149*23f6e3b1SPhilippe Mathieu-Daudé     .instance_size = sizeof(VGAMmioState),
150*23f6e3b1SPhilippe Mathieu-Daudé     .class_init    = vga_mmio_class_initfn,
151*23f6e3b1SPhilippe Mathieu-Daudé };
152*23f6e3b1SPhilippe Mathieu-Daudé 
153*23f6e3b1SPhilippe Mathieu-Daudé static void vga_mmio_register_types(void)
154*23f6e3b1SPhilippe Mathieu-Daudé {
155*23f6e3b1SPhilippe Mathieu-Daudé     type_register_static(&vga_mmio_info);
156*23f6e3b1SPhilippe Mathieu-Daudé }
157*23f6e3b1SPhilippe Mathieu-Daudé 
158*23f6e3b1SPhilippe Mathieu-Daudé type_init(vga_mmio_register_types)
159