1 /* 2 * QEMU G364 framebuffer Emulator. 3 * 4 * Copyright (c) 2007-2011 Herve Poussineau 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "hw.h" 21 #include "console.h" 22 #include "pixel_ops.h" 23 #include "trace.h" 24 #include "sysbus.h" 25 26 typedef struct G364State { 27 /* hardware */ 28 uint8_t *vram; 29 uint32_t vram_size; 30 qemu_irq irq; 31 MemoryRegion mem_vram; 32 MemoryRegion mem_ctrl; 33 /* registers */ 34 uint8_t color_palette[256][3]; 35 uint8_t cursor_palette[3][3]; 36 uint16_t cursor[512]; 37 uint32_t cursor_position; 38 uint32_t ctla; 39 uint32_t top_of_screen; 40 uint32_t width, height; /* in pixels */ 41 /* display refresh support */ 42 DisplayState *ds; 43 int depth; 44 int blanked; 45 } G364State; 46 47 #define REG_BOOT 0x000000 48 #define REG_DISPLAY 0x000118 49 #define REG_VDISPLAY 0x000150 50 #define REG_CTLA 0x000300 51 #define REG_TOP 0x000400 52 #define REG_CURS_PAL 0x000508 53 #define REG_CURS_POS 0x000638 54 #define REG_CLR_PAL 0x000800 55 #define REG_CURS_PAT 0x001000 56 #define REG_RESET 0x100000 57 58 #define CTLA_FORCE_BLANK 0x00000400 59 #define CTLA_NO_CURSOR 0x00800000 60 61 #define G364_PAGE_SIZE 4096 62 63 static inline int check_dirty(G364State *s, ram_addr_t page) 64 { 65 return memory_region_get_dirty(&s->mem_vram, page, G364_PAGE_SIZE, 66 DIRTY_MEMORY_VGA); 67 } 68 69 static inline void reset_dirty(G364State *s, 70 ram_addr_t page_min, ram_addr_t page_max) 71 { 72 memory_region_reset_dirty(&s->mem_vram, 73 page_min, 74 page_max + G364_PAGE_SIZE - page_min - 1, 75 DIRTY_MEMORY_VGA); 76 } 77 78 static void g364fb_draw_graphic8(G364State *s) 79 { 80 int i, w; 81 uint8_t *vram; 82 uint8_t *data_display, *dd; 83 ram_addr_t page, page_min, page_max; 84 int x, y; 85 int xmin, xmax; 86 int ymin, ymax; 87 int xcursor, ycursor; 88 unsigned int (*rgb_to_pixel)(unsigned int r, unsigned int g, unsigned int b); 89 90 switch (ds_get_bits_per_pixel(s->ds)) { 91 case 8: 92 rgb_to_pixel = rgb_to_pixel8; 93 w = 1; 94 break; 95 case 15: 96 rgb_to_pixel = rgb_to_pixel15; 97 w = 2; 98 break; 99 case 16: 100 rgb_to_pixel = rgb_to_pixel16; 101 w = 2; 102 break; 103 case 32: 104 rgb_to_pixel = rgb_to_pixel32; 105 w = 4; 106 break; 107 default: 108 hw_error("g364: unknown host depth %d", 109 ds_get_bits_per_pixel(s->ds)); 110 return; 111 } 112 113 page = 0; 114 page_min = (ram_addr_t)-1; 115 page_max = 0; 116 117 x = y = 0; 118 xmin = s->width; 119 xmax = 0; 120 ymin = s->height; 121 ymax = 0; 122 123 if (!(s->ctla & CTLA_NO_CURSOR)) { 124 xcursor = s->cursor_position >> 12; 125 ycursor = s->cursor_position & 0xfff; 126 } else { 127 xcursor = ycursor = -65; 128 } 129 130 vram = s->vram + s->top_of_screen; 131 /* XXX: out of range in vram? */ 132 data_display = dd = ds_get_data(s->ds); 133 while (y < s->height) { 134 if (check_dirty(s, page)) { 135 if (y < ymin) 136 ymin = ymax = y; 137 if (page_min == (ram_addr_t)-1) 138 page_min = page; 139 page_max = page; 140 if (x < xmin) 141 xmin = x; 142 for (i = 0; i < G364_PAGE_SIZE; i++) { 143 uint8_t index; 144 unsigned int color; 145 if (unlikely((y >= ycursor && y < ycursor + 64) && 146 (x >= xcursor && x < xcursor + 64))) { 147 /* pointer area */ 148 int xdiff = x - xcursor; 149 uint16_t curs = s->cursor[(y - ycursor) * 8 + xdiff / 8]; 150 int op = (curs >> ((xdiff & 7) * 2)) & 3; 151 if (likely(op == 0)) { 152 /* transparent */ 153 index = *vram; 154 color = (*rgb_to_pixel)( 155 s->color_palette[index][0], 156 s->color_palette[index][1], 157 s->color_palette[index][2]); 158 } else { 159 /* get cursor color */ 160 index = op - 1; 161 color = (*rgb_to_pixel)( 162 s->cursor_palette[index][0], 163 s->cursor_palette[index][1], 164 s->cursor_palette[index][2]); 165 } 166 } else { 167 /* normal area */ 168 index = *vram; 169 color = (*rgb_to_pixel)( 170 s->color_palette[index][0], 171 s->color_palette[index][1], 172 s->color_palette[index][2]); 173 } 174 memcpy(dd, &color, w); 175 dd += w; 176 x++; 177 vram++; 178 if (x == s->width) { 179 xmax = s->width - 1; 180 y++; 181 if (y == s->height) { 182 ymax = s->height - 1; 183 goto done; 184 } 185 data_display = dd = data_display + ds_get_linesize(s->ds); 186 xmin = 0; 187 x = 0; 188 } 189 } 190 if (x > xmax) 191 xmax = x; 192 if (y > ymax) 193 ymax = y; 194 } else { 195 int dy; 196 if (page_min != (ram_addr_t)-1) { 197 reset_dirty(s, page_min, page_max); 198 page_min = (ram_addr_t)-1; 199 page_max = 0; 200 dpy_gfx_update(s->ds, xmin, ymin, 201 xmax - xmin + 1, ymax - ymin + 1); 202 xmin = s->width; 203 xmax = 0; 204 ymin = s->height; 205 ymax = 0; 206 } 207 x += G364_PAGE_SIZE; 208 dy = x / s->width; 209 x = x % s->width; 210 y += dy; 211 vram += G364_PAGE_SIZE; 212 data_display += dy * ds_get_linesize(s->ds); 213 dd = data_display + x * w; 214 } 215 page += G364_PAGE_SIZE; 216 } 217 218 done: 219 if (page_min != (ram_addr_t)-1) { 220 dpy_gfx_update(s->ds, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); 221 reset_dirty(s, page_min, page_max); 222 } 223 } 224 225 static void g364fb_draw_blank(G364State *s) 226 { 227 int i, w; 228 uint8_t *d; 229 230 if (s->blanked) { 231 /* Screen is already blank. No need to redraw it */ 232 return; 233 } 234 235 w = s->width * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3); 236 d = ds_get_data(s->ds); 237 for (i = 0; i < s->height; i++) { 238 memset(d, 0, w); 239 d += ds_get_linesize(s->ds); 240 } 241 242 dpy_gfx_update(s->ds, 0, 0, s->width, s->height); 243 s->blanked = 1; 244 } 245 246 static void g364fb_update_display(void *opaque) 247 { 248 G364State *s = opaque; 249 250 qemu_flush_coalesced_mmio_buffer(); 251 252 if (s->width == 0 || s->height == 0) 253 return; 254 255 if (s->width != ds_get_width(s->ds) || s->height != ds_get_height(s->ds)) { 256 qemu_console_resize(s->ds, s->width, s->height); 257 } 258 259 if (s->ctla & CTLA_FORCE_BLANK) { 260 g364fb_draw_blank(s); 261 } else if (s->depth == 8) { 262 g364fb_draw_graphic8(s); 263 } else { 264 error_report("g364: unknown guest depth %d", s->depth); 265 } 266 267 qemu_irq_raise(s->irq); 268 } 269 270 static inline void g364fb_invalidate_display(void *opaque) 271 { 272 G364State *s = opaque; 273 274 s->blanked = 0; 275 memory_region_set_dirty(&s->mem_vram, 0, s->vram_size); 276 } 277 278 static void g364fb_reset(G364State *s) 279 { 280 qemu_irq_lower(s->irq); 281 282 memset(s->color_palette, 0, sizeof(s->color_palette)); 283 memset(s->cursor_palette, 0, sizeof(s->cursor_palette)); 284 memset(s->cursor, 0, sizeof(s->cursor)); 285 s->cursor_position = 0; 286 s->ctla = 0; 287 s->top_of_screen = 0; 288 s->width = s->height = 0; 289 memset(s->vram, 0, s->vram_size); 290 g364fb_invalidate_display(s); 291 } 292 293 static void g364fb_screen_dump(void *opaque, const char *filename, bool cswitch, 294 Error **errp) 295 { 296 G364State *s = opaque; 297 int ret, y, x; 298 uint8_t index; 299 uint8_t *data_buffer; 300 FILE *f; 301 302 qemu_flush_coalesced_mmio_buffer(); 303 304 if (s->depth != 8) { 305 error_setg(errp, "g364: unknown guest depth %d", s->depth); 306 return; 307 } 308 309 f = fopen(filename, "wb"); 310 if (!f) { 311 error_setg(errp, "failed to open file '%s': %s", filename, 312 strerror(errno)); 313 return; 314 } 315 316 if (s->ctla & CTLA_FORCE_BLANK) { 317 /* blank screen */ 318 ret = fprintf(f, "P4\n%d %d\n", s->width, s->height); 319 if (ret < 0) { 320 goto write_err; 321 } 322 for (y = 0; y < s->height; y++) 323 for (x = 0; x < s->width; x++) { 324 ret = fputc(0, f); 325 if (ret == EOF) { 326 goto write_err; 327 } 328 } 329 } else { 330 data_buffer = s->vram + s->top_of_screen; 331 ret = fprintf(f, "P6\n%d %d\n%d\n", s->width, s->height, 255); 332 if (ret < 0) { 333 goto write_err; 334 } 335 for (y = 0; y < s->height; y++) 336 for (x = 0; x < s->width; x++, data_buffer++) { 337 index = *data_buffer; 338 ret = fputc(s->color_palette[index][0], f); 339 if (ret == EOF) { 340 goto write_err; 341 } 342 ret = fputc(s->color_palette[index][1], f); 343 if (ret == EOF) { 344 goto write_err; 345 } 346 ret = fputc(s->color_palette[index][2], f); 347 if (ret == EOF) { 348 goto write_err; 349 } 350 } 351 } 352 353 out: 354 fclose(f); 355 return; 356 357 write_err: 358 error_setg(errp, "failed to write to file '%s': %s", filename, 359 strerror(errno)); 360 unlink(filename); 361 goto out; 362 } 363 364 /* called for accesses to io ports */ 365 static uint64_t g364fb_ctrl_read(void *opaque, 366 hwaddr addr, 367 unsigned int size) 368 { 369 G364State *s = opaque; 370 uint32_t val; 371 372 if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) { 373 /* cursor pattern */ 374 int idx = (addr - REG_CURS_PAT) >> 3; 375 val = s->cursor[idx]; 376 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) { 377 /* cursor palette */ 378 int idx = (addr - REG_CURS_PAL) >> 3; 379 val = ((uint32_t)s->cursor_palette[idx][0] << 16); 380 val |= ((uint32_t)s->cursor_palette[idx][1] << 8); 381 val |= ((uint32_t)s->cursor_palette[idx][2] << 0); 382 } else { 383 switch (addr) { 384 case REG_DISPLAY: 385 val = s->width / 4; 386 break; 387 case REG_VDISPLAY: 388 val = s->height * 2; 389 break; 390 case REG_CTLA: 391 val = s->ctla; 392 break; 393 default: 394 { 395 error_report("g364: invalid read at [" TARGET_FMT_plx "]", 396 addr); 397 val = 0; 398 break; 399 } 400 } 401 } 402 403 trace_g364fb_read(addr, val); 404 405 return val; 406 } 407 408 static void g364fb_update_depth(G364State *s) 409 { 410 static const int depths[8] = { 1, 2, 4, 8, 15, 16, 0 }; 411 s->depth = depths[(s->ctla & 0x00700000) >> 20]; 412 } 413 414 static void g364_invalidate_cursor_position(G364State *s) 415 { 416 int ymin, ymax, start, end; 417 418 /* invalidate only near the cursor */ 419 ymin = s->cursor_position & 0xfff; 420 ymax = MIN(s->height, ymin + 64); 421 start = ymin * ds_get_linesize(s->ds); 422 end = (ymax + 1) * ds_get_linesize(s->ds); 423 424 memory_region_set_dirty(&s->mem_vram, start, end - start); 425 } 426 427 static void g364fb_ctrl_write(void *opaque, 428 hwaddr addr, 429 uint64_t val, 430 unsigned int size) 431 { 432 G364State *s = opaque; 433 434 trace_g364fb_write(addr, val); 435 436 if (addr >= REG_CLR_PAL && addr < REG_CLR_PAL + 0x800) { 437 /* color palette */ 438 int idx = (addr - REG_CLR_PAL) >> 3; 439 s->color_palette[idx][0] = (val >> 16) & 0xff; 440 s->color_palette[idx][1] = (val >> 8) & 0xff; 441 s->color_palette[idx][2] = val & 0xff; 442 g364fb_invalidate_display(s); 443 } else if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) { 444 /* cursor pattern */ 445 int idx = (addr - REG_CURS_PAT) >> 3; 446 s->cursor[idx] = val; 447 g364fb_invalidate_display(s); 448 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) { 449 /* cursor palette */ 450 int idx = (addr - REG_CURS_PAL) >> 3; 451 s->cursor_palette[idx][0] = (val >> 16) & 0xff; 452 s->cursor_palette[idx][1] = (val >> 8) & 0xff; 453 s->cursor_palette[idx][2] = val & 0xff; 454 g364fb_invalidate_display(s); 455 } else { 456 switch (addr) { 457 case REG_BOOT: /* Boot timing */ 458 case 0x00108: /* Line timing: half sync */ 459 case 0x00110: /* Line timing: back porch */ 460 case 0x00120: /* Line timing: short display */ 461 case 0x00128: /* Frame timing: broad pulse */ 462 case 0x00130: /* Frame timing: v sync */ 463 case 0x00138: /* Frame timing: v preequalise */ 464 case 0x00140: /* Frame timing: v postequalise */ 465 case 0x00148: /* Frame timing: v blank */ 466 case 0x00158: /* Line timing: line time */ 467 case 0x00160: /* Frame store: line start */ 468 case 0x00168: /* vram cycle: mem init */ 469 case 0x00170: /* vram cycle: transfer delay */ 470 case 0x00200: /* vram cycle: mask register */ 471 /* ignore */ 472 break; 473 case REG_TOP: 474 s->top_of_screen = val; 475 g364fb_invalidate_display(s); 476 break; 477 case REG_DISPLAY: 478 s->width = val * 4; 479 break; 480 case REG_VDISPLAY: 481 s->height = val / 2; 482 break; 483 case REG_CTLA: 484 s->ctla = val; 485 g364fb_update_depth(s); 486 g364fb_invalidate_display(s); 487 break; 488 case REG_CURS_POS: 489 g364_invalidate_cursor_position(s); 490 s->cursor_position = val; 491 g364_invalidate_cursor_position(s); 492 break; 493 case REG_RESET: 494 g364fb_reset(s); 495 break; 496 default: 497 error_report("g364: invalid write of 0x%" PRIx64 498 " at [" TARGET_FMT_plx "]", val, addr); 499 break; 500 } 501 } 502 qemu_irq_lower(s->irq); 503 } 504 505 static const MemoryRegionOps g364fb_ctrl_ops = { 506 .read = g364fb_ctrl_read, 507 .write = g364fb_ctrl_write, 508 .endianness = DEVICE_LITTLE_ENDIAN, 509 .impl.min_access_size = 4, 510 .impl.max_access_size = 4, 511 }; 512 513 static int g364fb_post_load(void *opaque, int version_id) 514 { 515 G364State *s = opaque; 516 517 /* force refresh */ 518 g364fb_update_depth(s); 519 g364fb_invalidate_display(s); 520 521 return 0; 522 } 523 524 static const VMStateDescription vmstate_g364fb = { 525 .name = "g364fb", 526 .version_id = 1, 527 .minimum_version_id = 1, 528 .minimum_version_id_old = 1, 529 .post_load = g364fb_post_load, 530 .fields = (VMStateField[]) { 531 VMSTATE_VBUFFER_UINT32(vram, G364State, 1, NULL, 0, vram_size), 532 VMSTATE_BUFFER_UNSAFE(color_palette, G364State, 0, 256 * 3), 533 VMSTATE_BUFFER_UNSAFE(cursor_palette, G364State, 0, 9), 534 VMSTATE_UINT16_ARRAY(cursor, G364State, 512), 535 VMSTATE_UINT32(cursor_position, G364State), 536 VMSTATE_UINT32(ctla, G364State), 537 VMSTATE_UINT32(top_of_screen, G364State), 538 VMSTATE_UINT32(width, G364State), 539 VMSTATE_UINT32(height, G364State), 540 VMSTATE_END_OF_LIST() 541 } 542 }; 543 544 static void g364fb_init(DeviceState *dev, G364State *s) 545 { 546 s->vram = g_malloc0(s->vram_size); 547 548 s->ds = graphic_console_init(g364fb_update_display, 549 g364fb_invalidate_display, 550 g364fb_screen_dump, NULL, s); 551 552 memory_region_init_io(&s->mem_ctrl, &g364fb_ctrl_ops, s, "ctrl", 0x180000); 553 memory_region_init_ram_ptr(&s->mem_vram, "vram", 554 s->vram_size, s->vram); 555 vmstate_register_ram(&s->mem_vram, dev); 556 memory_region_set_coalescing(&s->mem_vram); 557 } 558 559 typedef struct { 560 SysBusDevice busdev; 561 G364State g364; 562 } G364SysBusState; 563 564 static int g364fb_sysbus_init(SysBusDevice *dev) 565 { 566 G364State *s = &FROM_SYSBUS(G364SysBusState, dev)->g364; 567 568 g364fb_init(&dev->qdev, s); 569 sysbus_init_irq(dev, &s->irq); 570 sysbus_init_mmio(dev, &s->mem_ctrl); 571 sysbus_init_mmio(dev, &s->mem_vram); 572 573 return 0; 574 } 575 576 static void g364fb_sysbus_reset(DeviceState *d) 577 { 578 G364SysBusState *s = DO_UPCAST(G364SysBusState, busdev.qdev, d); 579 g364fb_reset(&s->g364); 580 } 581 582 static Property g364fb_sysbus_properties[] = { 583 DEFINE_PROP_HEX32("vram_size", G364SysBusState, g364.vram_size, 584 8 * 1024 * 1024), 585 DEFINE_PROP_END_OF_LIST(), 586 }; 587 588 static void g364fb_sysbus_class_init(ObjectClass *klass, void *data) 589 { 590 DeviceClass *dc = DEVICE_CLASS(klass); 591 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); 592 593 k->init = g364fb_sysbus_init; 594 dc->desc = "G364 framebuffer"; 595 dc->reset = g364fb_sysbus_reset; 596 dc->vmsd = &vmstate_g364fb; 597 dc->props = g364fb_sysbus_properties; 598 } 599 600 static TypeInfo g364fb_sysbus_info = { 601 .name = "sysbus-g364", 602 .parent = TYPE_SYS_BUS_DEVICE, 603 .instance_size = sizeof(G364SysBusState), 604 .class_init = g364fb_sysbus_class_init, 605 }; 606 607 static void g364fb_register_types(void) 608 { 609 type_register_static(&g364fb_sysbus_info); 610 } 611 612 type_init(g364fb_register_types) 613