xref: /qemu/hw/display/ati_int.h (revision db1015e92e04835c9eb50c29625fe566d1202dbd)
1 /*
2  * QEMU ATI SVGA emulation
3  *
4  * Copyright (c) 2019 BALATON Zoltan
5  *
6  * This work is licensed under the GNU GPL license version 2 or later.
7  */
8 
9 #ifndef ATI_INT_H
10 #define ATI_INT_H
11 
12 #include "qemu/timer.h"
13 #include "hw/pci/pci.h"
14 #include "hw/i2c/bitbang_i2c.h"
15 #include "vga_int.h"
16 #include "qom/object.h"
17 
18 /*#define DEBUG_ATI*/
19 
20 #ifdef DEBUG_ATI
21 #define DPRINTF(fmt, ...) printf("%s: " fmt, __func__, ## __VA_ARGS__)
22 #else
23 #define DPRINTF(fmt, ...) do {} while (0)
24 #endif
25 
26 #define PCI_VENDOR_ID_ATI 0x1002
27 /* Rage128 Pro GL */
28 #define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046
29 /* Radeon RV100 (VE) */
30 #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159
31 
32 #define TYPE_ATI_VGA "ati-vga"
33 typedef struct ATIVGAState ATIVGAState;
34 #define ATI_VGA(obj) OBJECT_CHECK(ATIVGAState, (obj), TYPE_ATI_VGA)
35 
36 typedef struct ATIVGARegs {
37     uint32_t mm_index;
38     uint32_t bios_scratch[8];
39     uint32_t gen_int_cntl;
40     uint32_t gen_int_status;
41     uint32_t crtc_gen_cntl;
42     uint32_t crtc_ext_cntl;
43     uint32_t dac_cntl;
44     uint32_t gpio_vga_ddc;
45     uint32_t gpio_dvi_ddc;
46     uint32_t gpio_monid;
47     uint32_t config_cntl;
48     uint32_t crtc_h_total_disp;
49     uint32_t crtc_h_sync_strt_wid;
50     uint32_t crtc_v_total_disp;
51     uint32_t crtc_v_sync_strt_wid;
52     uint32_t crtc_offset;
53     uint32_t crtc_offset_cntl;
54     uint32_t crtc_pitch;
55     uint32_t cur_offset;
56     uint32_t cur_hv_pos;
57     uint32_t cur_hv_offs;
58     uint32_t cur_color0;
59     uint32_t cur_color1;
60     uint32_t dst_offset;
61     uint32_t dst_pitch;
62     uint32_t dst_tile;
63     uint32_t dst_width;
64     uint32_t dst_height;
65     uint32_t src_offset;
66     uint32_t src_pitch;
67     uint32_t src_tile;
68     uint32_t src_x;
69     uint32_t src_y;
70     uint32_t dst_x;
71     uint32_t dst_y;
72     uint32_t dp_gui_master_cntl;
73     uint32_t dp_brush_bkgd_clr;
74     uint32_t dp_brush_frgd_clr;
75     uint32_t dp_src_frgd_clr;
76     uint32_t dp_src_bkgd_clr;
77     uint32_t dp_cntl;
78     uint32_t dp_datatype;
79     uint32_t dp_mix;
80     uint32_t dp_write_mask;
81     uint32_t default_offset;
82     uint32_t default_pitch;
83     uint32_t default_tile;
84     uint32_t default_sc_bottom_right;
85 } ATIVGARegs;
86 
87 struct ATIVGAState {
88     PCIDevice dev;
89     VGACommonState vga;
90     char *model;
91     uint16_t dev_id;
92     uint8_t mode;
93     bool cursor_guest_mode;
94     uint16_t cursor_size;
95     uint32_t cursor_offset;
96     QEMUCursor *cursor;
97     QEMUTimer vblank_timer;
98     bitbang_i2c_interface bbi2c;
99     MemoryRegion io;
100     MemoryRegion mm;
101     ATIVGARegs regs;
102 };
103 
104 const char *ati_reg_name(int num);
105 
106 void ati_2d_blt(ATIVGAState *s);
107 
108 #endif /* ATI_INT_H */
109