1 /* 2 * QEMU Machine 3 * 4 * Copyright (C) 2014 Red Hat Inc 5 * 6 * Authors: 7 * Marcel Apfelbaum <marcel.a@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/units.h" 15 #include "qemu/accel.h" 16 #include "system/replay.h" 17 #include "hw/boards.h" 18 #include "hw/loader.h" 19 #include "qemu/error-report.h" 20 #include "qapi/error.h" 21 #include "qapi/qapi-visit-machine.h" 22 #include "qemu/madvise.h" 23 #include "qom/object_interfaces.h" 24 #include "system/cpus.h" 25 #include "system/system.h" 26 #include "system/reset.h" 27 #include "system/runstate.h" 28 #include "system/xen.h" 29 #include "system/qtest.h" 30 #include "hw/pci/pci_bridge.h" 31 #include "hw/mem/nvdimm.h" 32 #include "migration/global_state.h" 33 #include "system/confidential-guest-support.h" 34 #include "hw/virtio/virtio-pci.h" 35 #include "hw/virtio/virtio-net.h" 36 #include "hw/virtio/virtio-iommu.h" 37 #include "audio/audio.h" 38 39 GlobalProperty hw_compat_9_2[] = { 40 {"arm-cpu", "backcompat-pauth-default-use-qarma5", "true"}, 41 { "virtio-balloon-pci", "vectors", "0" }, 42 { "virtio-balloon-pci-transitional", "vectors", "0" }, 43 { "virtio-balloon-pci-non-transitional", "vectors", "0" }, 44 }; 45 const size_t hw_compat_9_2_len = G_N_ELEMENTS(hw_compat_9_2); 46 47 GlobalProperty hw_compat_9_1[] = { 48 { TYPE_PCI_DEVICE, "x-pcie-ext-tag", "false" }, 49 }; 50 const size_t hw_compat_9_1_len = G_N_ELEMENTS(hw_compat_9_1); 51 52 GlobalProperty hw_compat_9_0[] = { 53 {"arm-cpu", "backcompat-cntfrq", "true" }, 54 { "scsi-hd", "migrate-emulated-scsi-request", "false" }, 55 { "scsi-cd", "migrate-emulated-scsi-request", "false" }, 56 {"vfio-pci", "skip-vsc-check", "false" }, 57 { "virtio-pci", "x-pcie-pm-no-soft-reset", "off" }, 58 {"sd-card", "spec_version", "2" }, 59 }; 60 const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0); 61 62 GlobalProperty hw_compat_8_2[] = { 63 { "migration", "zero-page-detection", "legacy"}, 64 { TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" }, 65 { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" }, 66 { "virtio-gpu-device", "x-scanout-vmstate-version", "1" }, 67 }; 68 const size_t hw_compat_8_2_len = G_N_ELEMENTS(hw_compat_8_2); 69 70 GlobalProperty hw_compat_8_1[] = { 71 { TYPE_PCI_BRIDGE, "x-pci-express-writeable-slt-bug", "true" }, 72 { "ramfb", "x-migrate", "off" }, 73 { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" }, 74 { "igb", "x-pcie-flr-init", "off" }, 75 { TYPE_VIRTIO_NET, "host_uso", "off"}, 76 { TYPE_VIRTIO_NET, "guest_uso4", "off"}, 77 { TYPE_VIRTIO_NET, "guest_uso6", "off"}, 78 }; 79 const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1); 80 81 GlobalProperty hw_compat_8_0[] = { 82 { "migration", "multifd-flush-after-each-section", "on"}, 83 { TYPE_PCI_DEVICE, "x-pcie-ari-nextfn-1", "on" }, 84 }; 85 const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0); 86 87 GlobalProperty hw_compat_7_2[] = { 88 { "e1000e", "migrate-timadj", "off" }, 89 { "virtio-mem", "x-early-migration", "false" }, 90 { "migration", "x-preempt-pre-7-2", "true" }, 91 { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" }, 92 }; 93 const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2); 94 95 GlobalProperty hw_compat_7_1[] = { 96 { "virtio-device", "queue_reset", "false" }, 97 { "virtio-rng-pci", "vectors", "0" }, 98 { "virtio-rng-pci-transitional", "vectors", "0" }, 99 { "virtio-rng-pci-non-transitional", "vectors", "0" }, 100 }; 101 const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1); 102 103 GlobalProperty hw_compat_7_0[] = { 104 { "arm-gicv3-common", "force-8-bit-prio", "on" }, 105 { "nvme-ns", "eui64-default", "on"}, 106 }; 107 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0); 108 109 GlobalProperty hw_compat_6_2[] = { 110 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"}, 111 }; 112 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2); 113 114 GlobalProperty hw_compat_6_1[] = { 115 { "vhost-user-vsock-device", "seqpacket", "off" }, 116 { "nvme-ns", "shared", "off" }, 117 }; 118 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); 119 120 GlobalProperty hw_compat_6_0[] = { 121 { "gpex-pcihost", "allow-unmapped-accesses", "false" }, 122 { "i8042", "extended-state", "false"}, 123 { "nvme-ns", "eui64-default", "off"}, 124 { "e1000", "init-vet", "off" }, 125 { "e1000e", "init-vet", "off" }, 126 { "vhost-vsock-device", "seqpacket", "off" }, 127 }; 128 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); 129 130 GlobalProperty hw_compat_5_2[] = { 131 { "ICH9-LPC", "smm-compat", "on"}, 132 { "PIIX4_PM", "smm-compat", "on"}, 133 { "virtio-blk-device", "report-discard-granularity", "off" }, 134 { "virtio-net-pci-base", "vectors", "3"}, 135 { "nvme", "msix-exclusive-bar", "on"}, 136 }; 137 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); 138 139 GlobalProperty hw_compat_5_1[] = { 140 { "vhost-scsi", "num_queues", "1"}, 141 { "vhost-user-blk", "num-queues", "1"}, 142 { "vhost-user-scsi", "num_queues", "1"}, 143 { "virtio-blk-device", "num-queues", "1"}, 144 { "virtio-scsi-device", "num_queues", "1"}, 145 { "nvme", "use-intel-id", "on"}, 146 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ 147 { "pl011", "migrate-clk", "off" }, 148 { "virtio-pci", "x-ats-page-aligned", "off"}, 149 }; 150 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); 151 152 GlobalProperty hw_compat_5_0[] = { 153 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, 154 { "virtio-balloon-device", "page-poison", "false" }, 155 { "vmport", "x-read-set-eax", "off" }, 156 { "vmport", "x-signal-unsupported-cmd", "off" }, 157 { "vmport", "x-report-vmx-type", "off" }, 158 { "vmport", "x-cmds-v2", "off" }, 159 { "virtio-device", "x-disable-legacy-check", "true" }, 160 }; 161 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); 162 163 GlobalProperty hw_compat_4_2[] = { 164 { "virtio-blk-device", "queue-size", "128"}, 165 { "virtio-scsi-device", "virtqueue_size", "128"}, 166 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, 167 { "virtio-blk-device", "seg-max-adjust", "off"}, 168 { "virtio-scsi-device", "seg_max_adjust", "off"}, 169 { "vhost-blk-device", "seg_max_adjust", "off"}, 170 { "usb-host", "suppress-remote-wake", "off" }, 171 { "usb-redir", "suppress-remote-wake", "off" }, 172 { "qxl", "revision", "4" }, 173 { "qxl-vga", "revision", "4" }, 174 { "fw_cfg", "acpi-mr-restore", "false" }, 175 { "virtio-device", "use-disabled-flag", "false" }, 176 }; 177 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); 178 179 GlobalProperty hw_compat_4_1[] = { 180 { "virtio-pci", "x-pcie-flr-init", "off" }, 181 }; 182 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); 183 184 GlobalProperty hw_compat_4_0[] = { 185 { "VGA", "edid", "false" }, 186 { "secondary-vga", "edid", "false" }, 187 { "bochs-display", "edid", "false" }, 188 { "virtio-vga", "edid", "false" }, 189 { "virtio-gpu-device", "edid", "false" }, 190 { "virtio-device", "use-started", "false" }, 191 { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, 192 { "pl031", "migrate-tick-offset", "false" }, 193 }; 194 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); 195 196 GlobalProperty hw_compat_3_1[] = { 197 { "pcie-root-port", "x-speed", "2_5" }, 198 { "pcie-root-port", "x-width", "1" }, 199 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, 200 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, 201 { "tpm-crb", "ppi", "false" }, 202 { "tpm-tis", "ppi", "false" }, 203 { "usb-kbd", "serial", "42" }, 204 { "usb-mouse", "serial", "42" }, 205 { "usb-tablet", "serial", "42" }, 206 { "virtio-blk-device", "discard", "false" }, 207 { "virtio-blk-device", "write-zeroes", "false" }, 208 { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, 209 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ 210 }; 211 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); 212 213 GlobalProperty hw_compat_3_0[] = {}; 214 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); 215 216 GlobalProperty hw_compat_2_12[] = { 217 { "hda-audio", "use-timer", "false" }, 218 { "cirrus-vga", "global-vmstate", "true" }, 219 { "VGA", "global-vmstate", "true" }, 220 { "vmware-svga", "global-vmstate", "true" }, 221 { "qxl-vga", "global-vmstate", "true" }, 222 }; 223 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); 224 225 GlobalProperty hw_compat_2_11[] = { 226 { "hpet", "hpet-offset-saved", "false" }, 227 { "virtio-blk-pci", "vectors", "2" }, 228 { "vhost-user-blk-pci", "vectors", "2" }, 229 { "e1000", "migrate_tso_props", "off" }, 230 }; 231 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); 232 233 GlobalProperty hw_compat_2_10[] = { 234 { "virtio-mouse-device", "wheel-axis", "false" }, 235 { "virtio-tablet-device", "wheel-axis", "false" }, 236 }; 237 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); 238 239 GlobalProperty hw_compat_2_9[] = { 240 { "pci-bridge", "shpc", "off" }, 241 { "intel-iommu", "pt", "off" }, 242 { "virtio-net-device", "x-mtu-bypass-backend", "off" }, 243 { "pcie-root-port", "x-migrate-msix", "false" }, 244 }; 245 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); 246 247 GlobalProperty hw_compat_2_8[] = { 248 { "fw_cfg_mem", "x-file-slots", "0x10" }, 249 { "fw_cfg_io", "x-file-slots", "0x10" }, 250 { "pflash_cfi01", "old-multiple-chip-handling", "on" }, 251 { "pci-bridge", "shpc", "on" }, 252 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, 253 { "virtio-pci", "x-pcie-deverr-init", "off" }, 254 { "virtio-pci", "x-pcie-lnkctl-init", "off" }, 255 { "virtio-pci", "x-pcie-pm-init", "off" }, 256 { "cirrus-vga", "vgamem_mb", "8" }, 257 { "isa-cirrus-vga", "vgamem_mb", "8" }, 258 }; 259 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); 260 261 GlobalProperty hw_compat_2_7[] = { 262 { "virtio-pci", "page-per-vq", "on" }, 263 { "virtio-serial-device", "emergency-write", "off" }, 264 { "ioapic", "version", "0x11" }, 265 { "intel-iommu", "x-buggy-eim", "true" }, 266 { "virtio-pci", "x-ignore-backend-features", "on" }, 267 }; 268 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); 269 270 GlobalProperty hw_compat_2_6[] = { 271 { "virtio-mmio", "format_transport_address", "off" }, 272 /* Optional because not all virtio-pci devices support legacy mode */ 273 { "virtio-pci", "disable-modern", "on", .optional = true }, 274 { "virtio-pci", "disable-legacy", "off", .optional = true }, 275 }; 276 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); 277 278 GlobalProperty hw_compat_2_5[] = { 279 { "isa-fdc", "fallback", "144" }, 280 { "pvscsi", "x-old-pci-configuration", "on" }, 281 { "pvscsi", "x-disable-pcie", "on" }, 282 { "vmxnet3", "x-old-msi-offsets", "on" }, 283 { "vmxnet3", "x-disable-pcie", "on" }, 284 }; 285 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); 286 287 GlobalProperty hw_compat_2_4[] = { 288 { "e1000", "extra_mac_registers", "off" }, 289 { "virtio-pci", "x-disable-pcie", "on" }, 290 { "virtio-pci", "migrate-extra", "off" }, 291 { "fw_cfg_mem", "dma_enabled", "off" }, 292 { "fw_cfg_io", "dma_enabled", "off" } 293 }; 294 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); 295 296 MachineState *current_machine; 297 298 static char *machine_get_kernel(Object *obj, Error **errp) 299 { 300 MachineState *ms = MACHINE(obj); 301 302 return g_strdup(ms->kernel_filename); 303 } 304 305 static void machine_set_kernel(Object *obj, const char *value, Error **errp) 306 { 307 MachineState *ms = MACHINE(obj); 308 309 g_free(ms->kernel_filename); 310 ms->kernel_filename = g_strdup(value); 311 } 312 313 static char *machine_get_shim(Object *obj, Error **errp) 314 { 315 MachineState *ms = MACHINE(obj); 316 317 return g_strdup(ms->shim_filename); 318 } 319 320 static void machine_set_shim(Object *obj, const char *value, Error **errp) 321 { 322 MachineState *ms = MACHINE(obj); 323 324 g_free(ms->shim_filename); 325 ms->shim_filename = g_strdup(value); 326 } 327 328 static char *machine_get_initrd(Object *obj, Error **errp) 329 { 330 MachineState *ms = MACHINE(obj); 331 332 return g_strdup(ms->initrd_filename); 333 } 334 335 static void machine_set_initrd(Object *obj, const char *value, Error **errp) 336 { 337 MachineState *ms = MACHINE(obj); 338 339 g_free(ms->initrd_filename); 340 ms->initrd_filename = g_strdup(value); 341 } 342 343 static char *machine_get_append(Object *obj, Error **errp) 344 { 345 MachineState *ms = MACHINE(obj); 346 347 return g_strdup(ms->kernel_cmdline); 348 } 349 350 static void machine_set_append(Object *obj, const char *value, Error **errp) 351 { 352 MachineState *ms = MACHINE(obj); 353 354 g_free(ms->kernel_cmdline); 355 ms->kernel_cmdline = g_strdup(value); 356 } 357 358 static char *machine_get_dtb(Object *obj, Error **errp) 359 { 360 MachineState *ms = MACHINE(obj); 361 362 return g_strdup(ms->dtb); 363 } 364 365 static void machine_set_dtb(Object *obj, const char *value, Error **errp) 366 { 367 MachineState *ms = MACHINE(obj); 368 369 g_free(ms->dtb); 370 ms->dtb = g_strdup(value); 371 } 372 373 static char *machine_get_dumpdtb(Object *obj, Error **errp) 374 { 375 MachineState *ms = MACHINE(obj); 376 377 return g_strdup(ms->dumpdtb); 378 } 379 380 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) 381 { 382 MachineState *ms = MACHINE(obj); 383 384 g_free(ms->dumpdtb); 385 ms->dumpdtb = g_strdup(value); 386 } 387 388 static void machine_get_phandle_start(Object *obj, Visitor *v, 389 const char *name, void *opaque, 390 Error **errp) 391 { 392 MachineState *ms = MACHINE(obj); 393 int64_t value = ms->phandle_start; 394 395 visit_type_int(v, name, &value, errp); 396 } 397 398 static void machine_set_phandle_start(Object *obj, Visitor *v, 399 const char *name, void *opaque, 400 Error **errp) 401 { 402 MachineState *ms = MACHINE(obj); 403 int64_t value; 404 405 if (!visit_type_int(v, name, &value, errp)) { 406 return; 407 } 408 409 ms->phandle_start = value; 410 } 411 412 static char *machine_get_dt_compatible(Object *obj, Error **errp) 413 { 414 MachineState *ms = MACHINE(obj); 415 416 return g_strdup(ms->dt_compatible); 417 } 418 419 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) 420 { 421 MachineState *ms = MACHINE(obj); 422 423 g_free(ms->dt_compatible); 424 ms->dt_compatible = g_strdup(value); 425 } 426 427 static bool machine_get_dump_guest_core(Object *obj, Error **errp) 428 { 429 MachineState *ms = MACHINE(obj); 430 431 return ms->dump_guest_core; 432 } 433 434 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) 435 { 436 MachineState *ms = MACHINE(obj); 437 438 if (!value && QEMU_MADV_DONTDUMP == QEMU_MADV_INVALID) { 439 error_setg(errp, "Dumping guest memory cannot be disabled on this host"); 440 return; 441 } 442 ms->dump_guest_core = value; 443 } 444 445 static bool machine_get_mem_merge(Object *obj, Error **errp) 446 { 447 MachineState *ms = MACHINE(obj); 448 449 return ms->mem_merge; 450 } 451 452 static void machine_set_mem_merge(Object *obj, bool value, Error **errp) 453 { 454 MachineState *ms = MACHINE(obj); 455 456 if (value && QEMU_MADV_MERGEABLE == QEMU_MADV_INVALID) { 457 error_setg(errp, "Memory merging is not supported on this host"); 458 return; 459 } 460 ms->mem_merge = value; 461 } 462 463 static bool machine_get_usb(Object *obj, Error **errp) 464 { 465 MachineState *ms = MACHINE(obj); 466 467 return ms->usb; 468 } 469 470 static void machine_set_usb(Object *obj, bool value, Error **errp) 471 { 472 MachineState *ms = MACHINE(obj); 473 474 ms->usb = value; 475 ms->usb_disabled = !value; 476 } 477 478 static bool machine_get_graphics(Object *obj, Error **errp) 479 { 480 MachineState *ms = MACHINE(obj); 481 482 return ms->enable_graphics; 483 } 484 485 static void machine_set_graphics(Object *obj, bool value, Error **errp) 486 { 487 MachineState *ms = MACHINE(obj); 488 489 ms->enable_graphics = value; 490 } 491 492 static char *machine_get_firmware(Object *obj, Error **errp) 493 { 494 MachineState *ms = MACHINE(obj); 495 496 return g_strdup(ms->firmware); 497 } 498 499 static void machine_set_firmware(Object *obj, const char *value, Error **errp) 500 { 501 MachineState *ms = MACHINE(obj); 502 503 g_free(ms->firmware); 504 ms->firmware = g_strdup(value); 505 } 506 507 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) 508 { 509 MachineState *ms = MACHINE(obj); 510 511 ms->suppress_vmdesc = value; 512 } 513 514 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) 515 { 516 MachineState *ms = MACHINE(obj); 517 518 return ms->suppress_vmdesc; 519 } 520 521 static char *machine_get_memory_encryption(Object *obj, Error **errp) 522 { 523 MachineState *ms = MACHINE(obj); 524 525 if (ms->cgs) { 526 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); 527 } 528 529 return NULL; 530 } 531 532 static void machine_set_memory_encryption(Object *obj, const char *value, 533 Error **errp) 534 { 535 Object *cgs = 536 object_resolve_path_component(object_get_objects_root(), value); 537 538 if (!cgs) { 539 error_setg(errp, "No such memory encryption object '%s'", value); 540 return; 541 } 542 543 object_property_set_link(obj, "confidential-guest-support", cgs, errp); 544 } 545 546 static void machine_check_confidential_guest_support(const Object *obj, 547 const char *name, 548 Object *new_target, 549 Error **errp) 550 { 551 /* 552 * So far the only constraint is that the target has the 553 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked 554 * by the QOM core 555 */ 556 } 557 558 static bool machine_get_nvdimm(Object *obj, Error **errp) 559 { 560 MachineState *ms = MACHINE(obj); 561 562 return ms->nvdimms_state->is_enabled; 563 } 564 565 static void machine_set_nvdimm(Object *obj, bool value, Error **errp) 566 { 567 MachineState *ms = MACHINE(obj); 568 569 ms->nvdimms_state->is_enabled = value; 570 } 571 572 static bool machine_get_hmat(Object *obj, Error **errp) 573 { 574 MachineState *ms = MACHINE(obj); 575 576 return ms->numa_state->hmat_enabled; 577 } 578 579 static void machine_set_hmat(Object *obj, bool value, Error **errp) 580 { 581 MachineState *ms = MACHINE(obj); 582 583 ms->numa_state->hmat_enabled = value; 584 } 585 586 static void machine_get_mem(Object *obj, Visitor *v, const char *name, 587 void *opaque, Error **errp) 588 { 589 MachineState *ms = MACHINE(obj); 590 MemorySizeConfiguration mem = { 591 .has_size = true, 592 .size = ms->ram_size, 593 .has_max_size = !!ms->ram_slots, 594 .max_size = ms->maxram_size, 595 .has_slots = !!ms->ram_slots, 596 .slots = ms->ram_slots, 597 }; 598 MemorySizeConfiguration *p_mem = &mem; 599 600 visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort); 601 } 602 603 static void machine_set_mem(Object *obj, Visitor *v, const char *name, 604 void *opaque, Error **errp) 605 { 606 ERRP_GUARD(); 607 MachineState *ms = MACHINE(obj); 608 MachineClass *mc = MACHINE_GET_CLASS(obj); 609 MemorySizeConfiguration *mem; 610 611 if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) { 612 return; 613 } 614 615 if (!mem->has_size) { 616 mem->has_size = true; 617 mem->size = mc->default_ram_size; 618 } 619 mem->size = QEMU_ALIGN_UP(mem->size, 8192); 620 if (mc->fixup_ram_size) { 621 mem->size = mc->fixup_ram_size(mem->size); 622 } 623 if ((ram_addr_t)mem->size != mem->size) { 624 error_setg(errp, "ram size %llu exceeds permitted maximum %llu", 625 (unsigned long long)mem->size, 626 (unsigned long long)RAM_ADDR_MAX); 627 goto out_free; 628 } 629 630 if (mem->has_max_size) { 631 if ((ram_addr_t)mem->max_size != mem->max_size) { 632 error_setg(errp, "ram size %llu exceeds permitted maximum %llu", 633 (unsigned long long)mem->max_size, 634 (unsigned long long)RAM_ADDR_MAX); 635 goto out_free; 636 } 637 if (mem->max_size < mem->size) { 638 error_setg(errp, "invalid value of maxmem: " 639 "maximum memory size (0x%" PRIx64 ") must be at least " 640 "the initial memory size (0x%" PRIx64 ")", 641 mem->max_size, mem->size); 642 goto out_free; 643 } 644 if (mem->has_slots && mem->slots && mem->max_size == mem->size) { 645 error_setg(errp, "invalid value of maxmem: " 646 "memory slots were specified but maximum memory size " 647 "(0x%" PRIx64 ") is equal to the initial memory size " 648 "(0x%" PRIx64 ")", mem->max_size, mem->size); 649 goto out_free; 650 } 651 ms->maxram_size = mem->max_size; 652 } else { 653 if (mem->has_slots) { 654 error_setg(errp, "slots specified but no max-size"); 655 goto out_free; 656 } 657 ms->maxram_size = mem->size; 658 } 659 ms->ram_size = mem->size; 660 ms->ram_slots = mem->has_slots ? mem->slots : 0; 661 out_free: 662 qapi_free_MemorySizeConfiguration(mem); 663 } 664 665 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) 666 { 667 MachineState *ms = MACHINE(obj); 668 669 return g_strdup(ms->nvdimms_state->persistence_string); 670 } 671 672 static void machine_set_nvdimm_persistence(Object *obj, const char *value, 673 Error **errp) 674 { 675 MachineState *ms = MACHINE(obj); 676 NVDIMMState *nvdimms_state = ms->nvdimms_state; 677 678 if (strcmp(value, "cpu") == 0) { 679 nvdimms_state->persistence = 3; 680 } else if (strcmp(value, "mem-ctrl") == 0) { 681 nvdimms_state->persistence = 2; 682 } else { 683 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", 684 value); 685 return; 686 } 687 688 g_free(nvdimms_state->persistence_string); 689 nvdimms_state->persistence_string = g_strdup(value); 690 } 691 692 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) 693 { 694 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); 695 } 696 697 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) 698 { 699 Object *obj = OBJECT(dev); 700 701 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { 702 return false; 703 } 704 705 return device_type_is_dynamic_sysbus(mc, object_get_typename(obj)); 706 } 707 708 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type) 709 { 710 bool allowed = false; 711 strList *wl; 712 ObjectClass *klass = object_class_by_name(type); 713 714 for (wl = mc->allowed_dynamic_sysbus_devices; 715 !allowed && wl; 716 wl = wl->next) { 717 allowed |= !!object_class_dynamic_cast(klass, wl->value); 718 } 719 720 return allowed; 721 } 722 723 static char *machine_get_audiodev(Object *obj, Error **errp) 724 { 725 MachineState *ms = MACHINE(obj); 726 727 return g_strdup(ms->audiodev); 728 } 729 730 static void machine_set_audiodev(Object *obj, const char *value, 731 Error **errp) 732 { 733 MachineState *ms = MACHINE(obj); 734 735 if (!audio_state_by_name(value, errp)) { 736 return; 737 } 738 739 g_free(ms->audiodev); 740 ms->audiodev = g_strdup(value); 741 } 742 743 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) 744 { 745 int i; 746 HotpluggableCPUList *head = NULL; 747 MachineClass *mc = MACHINE_GET_CLASS(machine); 748 749 /* force board to initialize possible_cpus if it hasn't been done yet */ 750 mc->possible_cpu_arch_ids(machine); 751 752 for (i = 0; i < machine->possible_cpus->len; i++) { 753 CPUState *cpu; 754 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); 755 756 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); 757 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; 758 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, 759 sizeof(*cpu_item->props)); 760 761 cpu = machine->possible_cpus->cpus[i].cpu; 762 if (cpu) { 763 cpu_item->qom_path = object_get_canonical_path(OBJECT(cpu)); 764 } 765 QAPI_LIST_PREPEND(head, cpu_item); 766 } 767 return head; 768 } 769 770 /** 771 * machine_set_cpu_numa_node: 772 * @machine: machine object to modify 773 * @props: specifies which cpu objects to assign to 774 * numa node specified by @props.node_id 775 * @errp: if an error occurs, a pointer to an area to store the error 776 * 777 * Associate NUMA node specified by @props.node_id with cpu slots that 778 * match socket/core/thread-ids specified by @props. It's recommended to use 779 * query-hotpluggable-cpus.props values to specify affected cpu slots, 780 * which would lead to exact 1:1 mapping of cpu slots to NUMA node. 781 * 782 * However for CLI convenience it's possible to pass in subset of properties, 783 * which would affect all cpu slots that match it. 784 * Ex for pc machine: 785 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ 786 * -numa cpu,node-id=0,socket_id=0 \ 787 * -numa cpu,node-id=1,socket_id=1 788 * will assign all child cores of socket 0 to node 0 and 789 * of socket 1 to node 1. 790 * 791 * On attempt of reassigning (already assigned) cpu slot to another NUMA node, 792 * return error. 793 * Empty subset is disallowed and function will return with error in this case. 794 */ 795 void machine_set_cpu_numa_node(MachineState *machine, 796 const CpuInstanceProperties *props, Error **errp) 797 { 798 MachineClass *mc = MACHINE_GET_CLASS(machine); 799 NodeInfo *numa_info = machine->numa_state->nodes; 800 bool match = false; 801 int i; 802 803 if (!mc->possible_cpu_arch_ids) { 804 error_setg(errp, "mapping of CPUs to NUMA node is not supported"); 805 return; 806 } 807 808 /* disabling node mapping is not supported, forbid it */ 809 assert(props->has_node_id); 810 811 /* force board to initialize possible_cpus if it hasn't been done yet */ 812 mc->possible_cpu_arch_ids(machine); 813 814 for (i = 0; i < machine->possible_cpus->len; i++) { 815 CPUArchId *slot = &machine->possible_cpus->cpus[i]; 816 817 /* reject unsupported by board properties */ 818 if (props->has_thread_id && !slot->props.has_thread_id) { 819 error_setg(errp, "thread-id is not supported"); 820 return; 821 } 822 823 if (props->has_core_id && !slot->props.has_core_id) { 824 error_setg(errp, "core-id is not supported"); 825 return; 826 } 827 828 if (props->has_module_id && !slot->props.has_module_id) { 829 error_setg(errp, "module-id is not supported"); 830 return; 831 } 832 833 if (props->has_cluster_id && !slot->props.has_cluster_id) { 834 error_setg(errp, "cluster-id is not supported"); 835 return; 836 } 837 838 if (props->has_socket_id && !slot->props.has_socket_id) { 839 error_setg(errp, "socket-id is not supported"); 840 return; 841 } 842 843 if (props->has_die_id && !slot->props.has_die_id) { 844 error_setg(errp, "die-id is not supported"); 845 return; 846 } 847 848 /* skip slots with explicit mismatch */ 849 if (props->has_thread_id && props->thread_id != slot->props.thread_id) { 850 continue; 851 } 852 853 if (props->has_core_id && props->core_id != slot->props.core_id) { 854 continue; 855 } 856 857 if (props->has_module_id && 858 props->module_id != slot->props.module_id) { 859 continue; 860 } 861 862 if (props->has_cluster_id && 863 props->cluster_id != slot->props.cluster_id) { 864 continue; 865 } 866 867 if (props->has_die_id && props->die_id != slot->props.die_id) { 868 continue; 869 } 870 871 if (props->has_socket_id && props->socket_id != slot->props.socket_id) { 872 continue; 873 } 874 875 /* reject assignment if slot is already assigned, for compatibility 876 * of legacy cpu_index mapping with SPAPR core based mapping do not 877 * error out if cpu thread and matched core have the same node-id */ 878 if (slot->props.has_node_id && 879 slot->props.node_id != props->node_id) { 880 error_setg(errp, "CPU is already assigned to node-id: %" PRId64, 881 slot->props.node_id); 882 return; 883 } 884 885 /* assign slot to node as it's matched '-numa cpu' key */ 886 match = true; 887 slot->props.node_id = props->node_id; 888 slot->props.has_node_id = props->has_node_id; 889 890 if (machine->numa_state->hmat_enabled) { 891 if ((numa_info[props->node_id].initiator < MAX_NODES) && 892 (props->node_id != numa_info[props->node_id].initiator)) { 893 error_setg(errp, "The initiator of CPU NUMA node %" PRId64 894 " should be itself (got %" PRIu16 ")", 895 props->node_id, numa_info[props->node_id].initiator); 896 return; 897 } 898 numa_info[props->node_id].has_cpu = true; 899 numa_info[props->node_id].initiator = props->node_id; 900 } 901 } 902 903 if (!match) { 904 error_setg(errp, "no match found"); 905 } 906 } 907 908 static void machine_get_smp(Object *obj, Visitor *v, const char *name, 909 void *opaque, Error **errp) 910 { 911 MachineState *ms = MACHINE(obj); 912 SMPConfiguration *config = &(SMPConfiguration){ 913 .has_cpus = true, .cpus = ms->smp.cpus, 914 .has_drawers = true, .drawers = ms->smp.drawers, 915 .has_books = true, .books = ms->smp.books, 916 .has_sockets = true, .sockets = ms->smp.sockets, 917 .has_dies = true, .dies = ms->smp.dies, 918 .has_clusters = true, .clusters = ms->smp.clusters, 919 .has_modules = true, .modules = ms->smp.modules, 920 .has_cores = true, .cores = ms->smp.cores, 921 .has_threads = true, .threads = ms->smp.threads, 922 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, 923 }; 924 925 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { 926 return; 927 } 928 } 929 930 static void machine_set_smp(Object *obj, Visitor *v, const char *name, 931 void *opaque, Error **errp) 932 { 933 MachineState *ms = MACHINE(obj); 934 g_autoptr(SMPConfiguration) config = NULL; 935 936 if (!visit_type_SMPConfiguration(v, name, &config, errp)) { 937 return; 938 } 939 940 machine_parse_smp_config(ms, config, errp); 941 } 942 943 static void machine_get_smp_cache(Object *obj, Visitor *v, const char *name, 944 void *opaque, Error **errp) 945 { 946 MachineState *ms = MACHINE(obj); 947 SmpCache *cache = &ms->smp_cache; 948 SmpCachePropertiesList *head = NULL; 949 SmpCachePropertiesList **tail = &head; 950 951 for (int i = 0; i < CACHE_LEVEL_AND_TYPE__MAX; i++) { 952 SmpCacheProperties *node = g_new(SmpCacheProperties, 1); 953 954 node->cache = cache->props[i].cache; 955 node->topology = cache->props[i].topology; 956 QAPI_LIST_APPEND(tail, node); 957 } 958 959 visit_type_SmpCachePropertiesList(v, name, &head, errp); 960 qapi_free_SmpCachePropertiesList(head); 961 } 962 963 static void machine_set_smp_cache(Object *obj, Visitor *v, const char *name, 964 void *opaque, Error **errp) 965 { 966 MachineState *ms = MACHINE(obj); 967 SmpCachePropertiesList *caches; 968 969 if (!visit_type_SmpCachePropertiesList(v, name, &caches, errp)) { 970 return; 971 } 972 973 machine_parse_smp_cache(ms, caches, errp); 974 qapi_free_SmpCachePropertiesList(caches); 975 } 976 977 static void machine_get_boot(Object *obj, Visitor *v, const char *name, 978 void *opaque, Error **errp) 979 { 980 MachineState *ms = MACHINE(obj); 981 BootConfiguration *config = &ms->boot_config; 982 visit_type_BootConfiguration(v, name, &config, &error_abort); 983 } 984 985 static void machine_free_boot_config(MachineState *ms) 986 { 987 g_free(ms->boot_config.order); 988 g_free(ms->boot_config.once); 989 g_free(ms->boot_config.splash); 990 } 991 992 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config) 993 { 994 MachineClass *machine_class = MACHINE_GET_CLASS(ms); 995 996 machine_free_boot_config(ms); 997 ms->boot_config = *config; 998 if (!config->order) { 999 ms->boot_config.order = g_strdup(machine_class->default_boot_order); 1000 } 1001 } 1002 1003 static void machine_set_boot(Object *obj, Visitor *v, const char *name, 1004 void *opaque, Error **errp) 1005 { 1006 ERRP_GUARD(); 1007 MachineState *ms = MACHINE(obj); 1008 BootConfiguration *config = NULL; 1009 1010 if (!visit_type_BootConfiguration(v, name, &config, errp)) { 1011 return; 1012 } 1013 if (config->order) { 1014 validate_bootdevices(config->order, errp); 1015 if (*errp) { 1016 goto out_free; 1017 } 1018 } 1019 if (config->once) { 1020 validate_bootdevices(config->once, errp); 1021 if (*errp) { 1022 goto out_free; 1023 } 1024 } 1025 1026 machine_copy_boot_config(ms, config); 1027 /* Strings live in ms->boot_config. */ 1028 free(config); 1029 return; 1030 1031 out_free: 1032 qapi_free_BootConfiguration(config); 1033 } 1034 1035 void machine_add_audiodev_property(MachineClass *mc) 1036 { 1037 ObjectClass *oc = OBJECT_CLASS(mc); 1038 1039 object_class_property_add_str(oc, "audiodev", 1040 machine_get_audiodev, 1041 machine_set_audiodev); 1042 object_class_property_set_description(oc, "audiodev", 1043 "Audiodev to use for default machine devices"); 1044 } 1045 1046 static bool create_default_memdev(MachineState *ms, const char *path, 1047 Error **errp) 1048 { 1049 Object *obj; 1050 MachineClass *mc = MACHINE_GET_CLASS(ms); 1051 bool r = false; 1052 1053 obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM); 1054 if (path) { 1055 if (!object_property_set_str(obj, "mem-path", path, errp)) { 1056 goto out; 1057 } 1058 } 1059 if (!object_property_set_int(obj, "size", ms->ram_size, errp)) { 1060 goto out; 1061 } 1062 object_property_add_child(object_get_objects_root(), mc->default_ram_id, 1063 obj); 1064 /* Ensure backend's memory region name is equal to mc->default_ram_id */ 1065 if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id", 1066 false, errp)) { 1067 goto out; 1068 } 1069 if (!user_creatable_complete(USER_CREATABLE(obj), errp)) { 1070 goto out; 1071 } 1072 r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp); 1073 1074 out: 1075 object_unref(obj); 1076 return r; 1077 } 1078 1079 static void machine_class_init(ObjectClass *oc, void *data) 1080 { 1081 MachineClass *mc = MACHINE_CLASS(oc); 1082 1083 /* Default 128 MB as guest ram size */ 1084 mc->default_ram_size = 128 * MiB; 1085 mc->rom_file_has_mr = true; 1086 /* 1087 * SMBIOS 3.1.0 7.18.5 Memory Device — Extended Size 1088 * use max possible value that could be encoded into 1089 * 'Extended Size' field (2047Tb). 1090 */ 1091 mc->smbios_memory_device_size = 2047 * TiB; 1092 1093 /* numa node memory size aligned on 8MB by default. 1094 * On Linux, each node's border has to be 8MB aligned 1095 */ 1096 mc->numa_mem_align_shift = 23; 1097 1098 mc->create_default_memdev = create_default_memdev; 1099 1100 object_class_property_add_str(oc, "kernel", 1101 machine_get_kernel, machine_set_kernel); 1102 object_class_property_set_description(oc, "kernel", 1103 "Linux kernel image file"); 1104 1105 object_class_property_add_str(oc, "shim", 1106 machine_get_shim, machine_set_shim); 1107 object_class_property_set_description(oc, "shim", 1108 "shim.efi file"); 1109 1110 object_class_property_add_str(oc, "initrd", 1111 machine_get_initrd, machine_set_initrd); 1112 object_class_property_set_description(oc, "initrd", 1113 "Linux initial ramdisk file"); 1114 1115 object_class_property_add_str(oc, "append", 1116 machine_get_append, machine_set_append); 1117 object_class_property_set_description(oc, "append", 1118 "Linux kernel command line"); 1119 1120 object_class_property_add_str(oc, "dtb", 1121 machine_get_dtb, machine_set_dtb); 1122 object_class_property_set_description(oc, "dtb", 1123 "Linux kernel device tree file"); 1124 1125 object_class_property_add_str(oc, "dumpdtb", 1126 machine_get_dumpdtb, machine_set_dumpdtb); 1127 object_class_property_set_description(oc, "dumpdtb", 1128 "Dump current dtb to a file and quit"); 1129 1130 object_class_property_add(oc, "boot", "BootConfiguration", 1131 machine_get_boot, machine_set_boot, 1132 NULL, NULL); 1133 object_class_property_set_description(oc, "boot", 1134 "Boot configuration"); 1135 1136 object_class_property_add(oc, "smp", "SMPConfiguration", 1137 machine_get_smp, machine_set_smp, 1138 NULL, NULL); 1139 object_class_property_set_description(oc, "smp", 1140 "CPU topology"); 1141 1142 object_class_property_add(oc, "smp-cache", "SmpCachePropertiesWrapper", 1143 machine_get_smp_cache, machine_set_smp_cache, NULL, NULL); 1144 object_class_property_set_description(oc, "smp-cache", 1145 "Cache properties list for SMP machine"); 1146 1147 object_class_property_add(oc, "phandle-start", "int", 1148 machine_get_phandle_start, machine_set_phandle_start, 1149 NULL, NULL); 1150 object_class_property_set_description(oc, "phandle-start", 1151 "The first phandle ID we may generate dynamically"); 1152 1153 object_class_property_add_str(oc, "dt-compatible", 1154 machine_get_dt_compatible, machine_set_dt_compatible); 1155 object_class_property_set_description(oc, "dt-compatible", 1156 "Overrides the \"compatible\" property of the dt root node"); 1157 1158 object_class_property_add_bool(oc, "dump-guest-core", 1159 machine_get_dump_guest_core, machine_set_dump_guest_core); 1160 object_class_property_set_description(oc, "dump-guest-core", 1161 "Include guest memory in a core dump"); 1162 1163 object_class_property_add_bool(oc, "mem-merge", 1164 machine_get_mem_merge, machine_set_mem_merge); 1165 object_class_property_set_description(oc, "mem-merge", 1166 "Enable/disable memory merge support"); 1167 1168 object_class_property_add_bool(oc, "usb", 1169 machine_get_usb, machine_set_usb); 1170 object_class_property_set_description(oc, "usb", 1171 "Set on/off to enable/disable usb"); 1172 1173 object_class_property_add_bool(oc, "graphics", 1174 machine_get_graphics, machine_set_graphics); 1175 object_class_property_set_description(oc, "graphics", 1176 "Set on/off to enable/disable graphics emulation"); 1177 1178 object_class_property_add_str(oc, "firmware", 1179 machine_get_firmware, machine_set_firmware); 1180 object_class_property_set_description(oc, "firmware", 1181 "Firmware image"); 1182 1183 object_class_property_add_bool(oc, "suppress-vmdesc", 1184 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); 1185 object_class_property_set_description(oc, "suppress-vmdesc", 1186 "Set on to disable self-describing migration"); 1187 1188 object_class_property_add_link(oc, "confidential-guest-support", 1189 TYPE_CONFIDENTIAL_GUEST_SUPPORT, 1190 offsetof(MachineState, cgs), 1191 machine_check_confidential_guest_support, 1192 OBJ_PROP_LINK_STRONG); 1193 object_class_property_set_description(oc, "confidential-guest-support", 1194 "Set confidential guest scheme to support"); 1195 1196 /* For compatibility */ 1197 object_class_property_add_str(oc, "memory-encryption", 1198 machine_get_memory_encryption, machine_set_memory_encryption); 1199 object_class_property_set_description(oc, "memory-encryption", 1200 "Set memory encryption object to use"); 1201 1202 object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND, 1203 offsetof(MachineState, memdev), object_property_allow_set_link, 1204 OBJ_PROP_LINK_STRONG); 1205 object_class_property_set_description(oc, "memory-backend", 1206 "Set RAM backend" 1207 "Valid value is ID of hostmem based backend"); 1208 1209 object_class_property_add(oc, "memory", "MemorySizeConfiguration", 1210 machine_get_mem, machine_set_mem, 1211 NULL, NULL); 1212 object_class_property_set_description(oc, "memory", 1213 "Memory size configuration"); 1214 } 1215 1216 static void machine_class_base_init(ObjectClass *oc, void *data) 1217 { 1218 MachineClass *mc = MACHINE_CLASS(oc); 1219 mc->max_cpus = mc->max_cpus ?: 1; 1220 mc->min_cpus = mc->min_cpus ?: 1; 1221 mc->default_cpus = mc->default_cpus ?: 1; 1222 1223 if (!object_class_is_abstract(oc)) { 1224 const char *cname = object_class_get_name(oc); 1225 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); 1226 mc->name = g_strndup(cname, 1227 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); 1228 mc->compat_props = g_ptr_array_new(); 1229 } 1230 } 1231 1232 static void machine_initfn(Object *obj) 1233 { 1234 MachineState *ms = MACHINE(obj); 1235 MachineClass *mc = MACHINE_GET_CLASS(obj); 1236 1237 ms->dump_guest_core = true; 1238 ms->mem_merge = (QEMU_MADV_MERGEABLE != QEMU_MADV_INVALID); 1239 ms->enable_graphics = true; 1240 ms->kernel_cmdline = g_strdup(""); 1241 ms->ram_size = mc->default_ram_size; 1242 ms->maxram_size = mc->default_ram_size; 1243 1244 if (mc->nvdimm_supported) { 1245 ms->nvdimms_state = g_new0(NVDIMMState, 1); 1246 object_property_add_bool(obj, "nvdimm", 1247 machine_get_nvdimm, machine_set_nvdimm); 1248 object_property_set_description(obj, "nvdimm", 1249 "Set on/off to enable/disable " 1250 "NVDIMM instantiation"); 1251 1252 object_property_add_str(obj, "nvdimm-persistence", 1253 machine_get_nvdimm_persistence, 1254 machine_set_nvdimm_persistence); 1255 object_property_set_description(obj, "nvdimm-persistence", 1256 "Set NVDIMM persistence" 1257 "Valid values are cpu, mem-ctrl"); 1258 } 1259 1260 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { 1261 ms->numa_state = g_new0(NumaState, 1); 1262 object_property_add_bool(obj, "hmat", 1263 machine_get_hmat, machine_set_hmat); 1264 object_property_set_description(obj, "hmat", 1265 "Set on/off to enable/disable " 1266 "ACPI Heterogeneous Memory Attribute " 1267 "Table (HMAT)"); 1268 } 1269 1270 /* default to mc->default_cpus */ 1271 ms->smp.cpus = mc->default_cpus; 1272 ms->smp.max_cpus = mc->default_cpus; 1273 ms->smp.drawers = 1; 1274 ms->smp.books = 1; 1275 ms->smp.sockets = 1; 1276 ms->smp.dies = 1; 1277 ms->smp.clusters = 1; 1278 ms->smp.modules = 1; 1279 ms->smp.cores = 1; 1280 ms->smp.threads = 1; 1281 1282 for (int i = 0; i < CACHE_LEVEL_AND_TYPE__MAX; i++) { 1283 ms->smp_cache.props[i].cache = (CacheLevelAndType)i; 1284 ms->smp_cache.props[i].topology = CPU_TOPOLOGY_LEVEL_DEFAULT; 1285 } 1286 1287 machine_copy_boot_config(ms, &(BootConfiguration){ 0 }); 1288 } 1289 1290 static void machine_finalize(Object *obj) 1291 { 1292 MachineState *ms = MACHINE(obj); 1293 1294 machine_free_boot_config(ms); 1295 g_free(ms->kernel_filename); 1296 g_free(ms->initrd_filename); 1297 g_free(ms->kernel_cmdline); 1298 g_free(ms->dtb); 1299 g_free(ms->dumpdtb); 1300 g_free(ms->dt_compatible); 1301 g_free(ms->firmware); 1302 g_free(ms->device_memory); 1303 g_free(ms->nvdimms_state); 1304 g_free(ms->numa_state); 1305 g_free(ms->audiodev); 1306 } 1307 1308 bool machine_usb(MachineState *machine) 1309 { 1310 return machine->usb; 1311 } 1312 1313 int machine_phandle_start(MachineState *machine) 1314 { 1315 return machine->phandle_start; 1316 } 1317 1318 bool machine_dump_guest_core(MachineState *machine) 1319 { 1320 return machine->dump_guest_core; 1321 } 1322 1323 bool machine_mem_merge(MachineState *machine) 1324 { 1325 return machine->mem_merge; 1326 } 1327 1328 bool machine_require_guest_memfd(MachineState *machine) 1329 { 1330 return machine->cgs && machine->cgs->require_guest_memfd; 1331 } 1332 1333 static char *cpu_slot_to_string(const CPUArchId *cpu) 1334 { 1335 GString *s = g_string_new(NULL); 1336 if (cpu->props.has_socket_id) { 1337 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); 1338 } 1339 if (cpu->props.has_die_id) { 1340 if (s->len) { 1341 g_string_append_printf(s, ", "); 1342 } 1343 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); 1344 } 1345 if (cpu->props.has_cluster_id) { 1346 if (s->len) { 1347 g_string_append_printf(s, ", "); 1348 } 1349 g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id); 1350 } 1351 if (cpu->props.has_module_id) { 1352 if (s->len) { 1353 g_string_append_printf(s, ", "); 1354 } 1355 g_string_append_printf(s, "module-id: %"PRId64, cpu->props.module_id); 1356 } 1357 if (cpu->props.has_core_id) { 1358 if (s->len) { 1359 g_string_append_printf(s, ", "); 1360 } 1361 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); 1362 } 1363 if (cpu->props.has_thread_id) { 1364 if (s->len) { 1365 g_string_append_printf(s, ", "); 1366 } 1367 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); 1368 } 1369 return g_string_free(s, false); 1370 } 1371 1372 static void numa_validate_initiator(NumaState *numa_state) 1373 { 1374 int i; 1375 NodeInfo *numa_info = numa_state->nodes; 1376 1377 for (i = 0; i < numa_state->num_nodes; i++) { 1378 if (numa_info[i].initiator == MAX_NODES) { 1379 continue; 1380 } 1381 1382 if (!numa_info[numa_info[i].initiator].present) { 1383 error_report("NUMA node %" PRIu16 " is missing, use " 1384 "'-numa node' option to declare it first", 1385 numa_info[i].initiator); 1386 exit(1); 1387 } 1388 1389 if (!numa_info[numa_info[i].initiator].has_cpu) { 1390 error_report("The initiator of NUMA node %d is invalid", i); 1391 exit(1); 1392 } 1393 } 1394 } 1395 1396 static void machine_numa_finish_cpu_init(MachineState *machine) 1397 { 1398 int i; 1399 bool default_mapping; 1400 GString *s = g_string_new(NULL); 1401 MachineClass *mc = MACHINE_GET_CLASS(machine); 1402 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); 1403 1404 assert(machine->numa_state->num_nodes); 1405 for (i = 0; i < possible_cpus->len; i++) { 1406 if (possible_cpus->cpus[i].props.has_node_id) { 1407 break; 1408 } 1409 } 1410 default_mapping = (i == possible_cpus->len); 1411 1412 for (i = 0; i < possible_cpus->len; i++) { 1413 const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; 1414 1415 if (!cpu_slot->props.has_node_id) { 1416 /* fetch default mapping from board and enable it */ 1417 CpuInstanceProperties props = cpu_slot->props; 1418 1419 props.node_id = mc->get_default_cpu_node_id(machine, i); 1420 if (!default_mapping) { 1421 /* record slots with not set mapping, 1422 * TODO: make it hard error in future */ 1423 char *cpu_str = cpu_slot_to_string(cpu_slot); 1424 g_string_append_printf(s, "%sCPU %d [%s]", 1425 s->len ? ", " : "", i, cpu_str); 1426 g_free(cpu_str); 1427 1428 /* non mapped cpus used to fallback to node 0 */ 1429 props.node_id = 0; 1430 } 1431 1432 props.has_node_id = true; 1433 machine_set_cpu_numa_node(machine, &props, &error_fatal); 1434 } 1435 } 1436 1437 if (machine->numa_state->hmat_enabled) { 1438 numa_validate_initiator(machine->numa_state); 1439 } 1440 1441 if (s->len && !qtest_enabled()) { 1442 warn_report("CPU(s) not present in any NUMA nodes: %s", 1443 s->str); 1444 warn_report("All CPU(s) up to maxcpus should be described " 1445 "in NUMA config, ability to start up with partial NUMA " 1446 "mappings is obsoleted and will be removed in future"); 1447 } 1448 g_string_free(s, true); 1449 } 1450 1451 static void validate_cpu_cluster_to_numa_boundary(MachineState *ms) 1452 { 1453 MachineClass *mc = MACHINE_GET_CLASS(ms); 1454 NumaState *state = ms->numa_state; 1455 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1456 const CPUArchId *cpus = possible_cpus->cpus; 1457 int i, j; 1458 1459 if (qtest_enabled() || state->num_nodes <= 1 || possible_cpus->len <= 1) { 1460 return; 1461 } 1462 1463 /* 1464 * The Linux scheduling domain can't be parsed when the multiple CPUs 1465 * in one cluster have been associated with different NUMA nodes. However, 1466 * it's fine to associate one NUMA node with CPUs in different clusters. 1467 */ 1468 for (i = 0; i < possible_cpus->len; i++) { 1469 for (j = i + 1; j < possible_cpus->len; j++) { 1470 if (cpus[i].props.has_socket_id && 1471 cpus[i].props.has_cluster_id && 1472 cpus[i].props.has_node_id && 1473 cpus[j].props.has_socket_id && 1474 cpus[j].props.has_cluster_id && 1475 cpus[j].props.has_node_id && 1476 cpus[i].props.socket_id == cpus[j].props.socket_id && 1477 cpus[i].props.cluster_id == cpus[j].props.cluster_id && 1478 cpus[i].props.node_id != cpus[j].props.node_id) { 1479 warn_report("CPU-%d and CPU-%d in socket-%" PRId64 "-cluster-%" PRId64 1480 " have been associated with node-%" PRId64 " and node-%" PRId64 1481 " respectively. It can cause OSes like Linux to" 1482 " misbehave", i, j, cpus[i].props.socket_id, 1483 cpus[i].props.cluster_id, cpus[i].props.node_id, 1484 cpus[j].props.node_id); 1485 } 1486 } 1487 } 1488 } 1489 1490 MemoryRegion *machine_consume_memdev(MachineState *machine, 1491 HostMemoryBackend *backend) 1492 { 1493 MemoryRegion *ret = host_memory_backend_get_memory(backend); 1494 1495 if (host_memory_backend_is_mapped(backend)) { 1496 error_report("memory backend %s can't be used multiple times.", 1497 object_get_canonical_path_component(OBJECT(backend))); 1498 exit(EXIT_FAILURE); 1499 } 1500 host_memory_backend_set_mapped(backend, true); 1501 vmstate_register_ram_global(ret); 1502 return ret; 1503 } 1504 1505 const char *machine_class_default_cpu_type(MachineClass *mc) 1506 { 1507 if (mc->valid_cpu_types && !mc->valid_cpu_types[1]) { 1508 /* Only a single CPU type allowed: use it as default. */ 1509 return mc->valid_cpu_types[0]; 1510 } 1511 return mc->default_cpu_type; 1512 } 1513 1514 static bool is_cpu_type_supported(const MachineState *machine, Error **errp) 1515 { 1516 MachineClass *mc = MACHINE_GET_CLASS(machine); 1517 ObjectClass *oc = object_class_by_name(machine->cpu_type); 1518 CPUClass *cc; 1519 int i; 1520 1521 /* 1522 * Check if the user specified CPU type is supported when the valid 1523 * CPU types have been determined. Note that the user specified CPU 1524 * type is provided through '-cpu' option. 1525 */ 1526 if (mc->valid_cpu_types) { 1527 assert(mc->valid_cpu_types[0] != NULL); 1528 for (i = 0; mc->valid_cpu_types[i]; i++) { 1529 if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) { 1530 break; 1531 } 1532 } 1533 1534 /* The user specified CPU type isn't valid */ 1535 if (!mc->valid_cpu_types[i]) { 1536 g_autofree char *requested = cpu_model_from_type(machine->cpu_type); 1537 error_setg(errp, "Invalid CPU model: %s", requested); 1538 if (!mc->valid_cpu_types[1]) { 1539 g_autofree char *model = cpu_model_from_type( 1540 mc->valid_cpu_types[0]); 1541 error_append_hint(errp, "The only valid type is: %s\n", model); 1542 } else { 1543 error_append_hint(errp, "The valid models are: "); 1544 for (i = 0; mc->valid_cpu_types[i]; i++) { 1545 g_autofree char *model = cpu_model_from_type( 1546 mc->valid_cpu_types[i]); 1547 error_append_hint(errp, "%s%s", 1548 model, 1549 mc->valid_cpu_types[i + 1] ? ", " : ""); 1550 } 1551 error_append_hint(errp, "\n"); 1552 } 1553 1554 return false; 1555 } 1556 } 1557 1558 /* Check if CPU type is deprecated and warn if so */ 1559 cc = CPU_CLASS(oc); 1560 assert(cc != NULL); 1561 if (cc->deprecation_note) { 1562 warn_report("CPU model %s is deprecated -- %s", 1563 machine->cpu_type, cc->deprecation_note); 1564 } 1565 1566 return true; 1567 } 1568 1569 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp) 1570 { 1571 ERRP_GUARD(); 1572 MachineClass *machine_class = MACHINE_GET_CLASS(machine); 1573 1574 /* This checkpoint is required by replay to separate prior clock 1575 reading from the other reads, because timer polling functions query 1576 clock values from the log. */ 1577 replay_checkpoint(CHECKPOINT_INIT); 1578 1579 if (!xen_enabled()) { 1580 /* On 32-bit hosts, QEMU is limited by virtual address space */ 1581 if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { 1582 error_setg(errp, "at most 2047 MB RAM can be simulated"); 1583 return; 1584 } 1585 } 1586 1587 if (machine->memdev) { 1588 ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev), 1589 "size", &error_abort); 1590 if (backend_size != machine->ram_size) { 1591 error_setg(errp, "Machine memory size does not match the size of the memory backend"); 1592 return; 1593 } 1594 } else if (machine_class->default_ram_id && machine->ram_size && 1595 numa_uses_legacy_mem()) { 1596 if (object_property_find(object_get_objects_root(), 1597 machine_class->default_ram_id)) { 1598 error_setg(errp, "object's id '%s' is reserved for the default" 1599 " RAM backend, it can't be used for any other purposes", 1600 machine_class->default_ram_id); 1601 error_append_hint(errp, 1602 "Change the object's 'id' to something else or disable" 1603 " automatic creation of the default RAM backend by setting" 1604 " 'memory-backend=%s' with '-machine'.\n", 1605 machine_class->default_ram_id); 1606 return; 1607 } 1608 1609 if (!machine_class->create_default_memdev(current_machine, mem_path, 1610 errp)) { 1611 return; 1612 } 1613 } 1614 1615 if (machine->numa_state) { 1616 numa_complete_configuration(machine); 1617 if (machine->numa_state->num_nodes) { 1618 machine_numa_finish_cpu_init(machine); 1619 if (machine_class->cpu_cluster_has_numa_boundary) { 1620 validate_cpu_cluster_to_numa_boundary(machine); 1621 } 1622 } 1623 } 1624 1625 if (!machine->ram && machine->memdev) { 1626 machine->ram = machine_consume_memdev(machine, machine->memdev); 1627 } 1628 1629 /* Check if the CPU type is supported */ 1630 if (machine->cpu_type && !is_cpu_type_supported(machine, errp)) { 1631 return; 1632 } 1633 1634 if (machine->cgs) { 1635 /* 1636 * With confidential guests, the host can't see the real 1637 * contents of RAM, so there's no point in it trying to merge 1638 * areas. 1639 */ 1640 machine_set_mem_merge(OBJECT(machine), false, &error_abort); 1641 1642 /* 1643 * Virtio devices can't count on directly accessing guest 1644 * memory, so they need iommu_platform=on to use normal DMA 1645 * mechanisms. That requires also disabling legacy virtio 1646 * support for those virtio pci devices which allow it. 1647 */ 1648 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", 1649 "on", true); 1650 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", 1651 "on", false); 1652 } 1653 1654 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); 1655 machine_class->init(machine); 1656 phase_advance(PHASE_MACHINE_INITIALIZED); 1657 } 1658 1659 static NotifierList machine_init_done_notifiers = 1660 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); 1661 1662 void qemu_add_machine_init_done_notifier(Notifier *notify) 1663 { 1664 notifier_list_add(&machine_init_done_notifiers, notify); 1665 if (phase_check(PHASE_MACHINE_READY)) { 1666 notify->notify(notify, NULL); 1667 } 1668 } 1669 1670 void qemu_remove_machine_init_done_notifier(Notifier *notify) 1671 { 1672 notifier_remove(notify); 1673 } 1674 1675 void qdev_machine_creation_done(void) 1676 { 1677 cpu_synchronize_all_post_init(); 1678 1679 if (current_machine->boot_config.once) { 1680 qemu_boot_set(current_machine->boot_config.once, &error_fatal); 1681 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order)); 1682 } 1683 1684 /* 1685 * ok, initial machine setup is done, starting from now we can 1686 * only create hotpluggable devices 1687 */ 1688 phase_advance(PHASE_MACHINE_READY); 1689 qdev_assert_realized_properly(); 1690 1691 /* TODO: once all bus devices are qdevified, this should be done 1692 * when bus is created by qdev.c */ 1693 /* 1694 * This is where we arrange for the sysbus to be reset when the 1695 * whole simulation is reset. In turn, resetting the sysbus will cause 1696 * all devices hanging off it (and all their child buses, recursively) 1697 * to be reset. Note that this will *not* reset any Device objects 1698 * which are not attached to some part of the qbus tree! 1699 */ 1700 qemu_register_resettable(OBJECT(sysbus_get_default())); 1701 1702 notifier_list_notify(&machine_init_done_notifiers, NULL); 1703 1704 if (rom_check_and_register_reset() != 0) { 1705 exit(1); 1706 } 1707 1708 replay_start(); 1709 1710 /* This checkpoint is required by replay to separate prior clock 1711 reading from the other reads, because timer polling functions query 1712 clock values from the log. */ 1713 replay_checkpoint(CHECKPOINT_RESET); 1714 qemu_system_reset(SHUTDOWN_CAUSE_NONE); 1715 register_global_state(); 1716 } 1717 1718 static const TypeInfo machine_info = { 1719 .name = TYPE_MACHINE, 1720 .parent = TYPE_OBJECT, 1721 .abstract = true, 1722 .class_size = sizeof(MachineClass), 1723 .class_init = machine_class_init, 1724 .class_base_init = machine_class_base_init, 1725 .instance_size = sizeof(MachineState), 1726 .instance_init = machine_initfn, 1727 .instance_finalize = machine_finalize, 1728 }; 1729 1730 static void machine_register_types(void) 1731 { 1732 type_register_static(&machine_info); 1733 } 1734 1735 type_init(machine_register_types) 1736