xref: /qemu/hw/core/machine.c (revision aa8b183974b27d4dc025905eb869a1941e85e17d)
1 /*
2  * QEMU Machine
3  *
4  * Copyright (C) 2014 Red Hat Inc
5  *
6  * Authors:
7  *   Marcel Apfelbaum <marcel.a@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10  * See the COPYING file in the top-level directory.
11  */
12 
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "qapi/error.h"
20 #include "qapi/qapi-visit-common.h"
21 #include "qapi/visitor.h"
22 #include "hw/sysbus.h"
23 #include "sysemu/sysemu.h"
24 #include "sysemu/numa.h"
25 #include "qemu/error-report.h"
26 #include "sysemu/qtest.h"
27 #include "hw/pci/pci.h"
28 #include "hw/mem/nvdimm.h"
29 
30 GlobalProperty hw_compat_4_2[] = {
31     { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
32     { "virtio-blk-device", "seg-max-adjust", "off"},
33     { "virtio-scsi-device", "seg_max_adjust", "off"},
34     { "vhost-blk-device", "seg_max_adjust", "off"},
35     { "usb-host", "suppress-remote-wake", "off" },
36     { "usb-redir", "suppress-remote-wake", "off" },
37     { "qxl", "revision", "4" },
38     { "qxl-vga", "revision", "4" },
39 };
40 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
41 
42 GlobalProperty hw_compat_4_1[] = {
43     { "virtio-pci", "x-pcie-flr-init", "off" },
44     { "virtio-device", "use-disabled-flag", "false" },
45 };
46 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
47 
48 GlobalProperty hw_compat_4_0[] = {
49     { "VGA",            "edid", "false" },
50     { "secondary-vga",  "edid", "false" },
51     { "bochs-display",  "edid", "false" },
52     { "virtio-vga",     "edid", "false" },
53     { "virtio-gpu",     "edid", "false" },
54     { "virtio-device", "use-started", "false" },
55     { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
56     { "pl031", "migrate-tick-offset", "false" },
57 };
58 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
59 
60 GlobalProperty hw_compat_3_1[] = {
61     { "pcie-root-port", "x-speed", "2_5" },
62     { "pcie-root-port", "x-width", "1" },
63     { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
64     { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
65     { "tpm-crb", "ppi", "false" },
66     { "tpm-tis", "ppi", "false" },
67     { "usb-kbd", "serial", "42" },
68     { "usb-mouse", "serial", "42" },
69     { "usb-tablet", "serial", "42" },
70     { "virtio-blk-device", "discard", "false" },
71     { "virtio-blk-device", "write-zeroes", "false" },
72     { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
73     { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
74 };
75 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
76 
77 GlobalProperty hw_compat_3_0[] = {};
78 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
79 
80 GlobalProperty hw_compat_2_12[] = {
81     { "migration", "decompress-error-check", "off" },
82     { "hda-audio", "use-timer", "false" },
83     { "cirrus-vga", "global-vmstate", "true" },
84     { "VGA", "global-vmstate", "true" },
85     { "vmware-svga", "global-vmstate", "true" },
86     { "qxl-vga", "global-vmstate", "true" },
87 };
88 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
89 
90 GlobalProperty hw_compat_2_11[] = {
91     { "hpet", "hpet-offset-saved", "false" },
92     { "virtio-blk-pci", "vectors", "2" },
93     { "vhost-user-blk-pci", "vectors", "2" },
94     { "e1000", "migrate_tso_props", "off" },
95 };
96 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
97 
98 GlobalProperty hw_compat_2_10[] = {
99     { "virtio-mouse-device", "wheel-axis", "false" },
100     { "virtio-tablet-device", "wheel-axis", "false" },
101 };
102 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
103 
104 GlobalProperty hw_compat_2_9[] = {
105     { "pci-bridge", "shpc", "off" },
106     { "intel-iommu", "pt", "off" },
107     { "virtio-net-device", "x-mtu-bypass-backend", "off" },
108     { "pcie-root-port", "x-migrate-msix", "false" },
109 };
110 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
111 
112 GlobalProperty hw_compat_2_8[] = {
113     { "fw_cfg_mem", "x-file-slots", "0x10" },
114     { "fw_cfg_io", "x-file-slots", "0x10" },
115     { "pflash_cfi01", "old-multiple-chip-handling", "on" },
116     { "pci-bridge", "shpc", "on" },
117     { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
118     { "virtio-pci", "x-pcie-deverr-init", "off" },
119     { "virtio-pci", "x-pcie-lnkctl-init", "off" },
120     { "virtio-pci", "x-pcie-pm-init", "off" },
121     { "cirrus-vga", "vgamem_mb", "8" },
122     { "isa-cirrus-vga", "vgamem_mb", "8" },
123 };
124 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
125 
126 GlobalProperty hw_compat_2_7[] = {
127     { "virtio-pci", "page-per-vq", "on" },
128     { "virtio-serial-device", "emergency-write", "off" },
129     { "ioapic", "version", "0x11" },
130     { "intel-iommu", "x-buggy-eim", "true" },
131     { "virtio-pci", "x-ignore-backend-features", "on" },
132 };
133 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
134 
135 GlobalProperty hw_compat_2_6[] = {
136     { "virtio-mmio", "format_transport_address", "off" },
137     /* Optional because not all virtio-pci devices support legacy mode */
138     { "virtio-pci", "disable-modern", "on",  .optional = true },
139     { "virtio-pci", "disable-legacy", "off", .optional = true },
140 };
141 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
142 
143 GlobalProperty hw_compat_2_5[] = {
144     { "isa-fdc", "fallback", "144" },
145     { "pvscsi", "x-old-pci-configuration", "on" },
146     { "pvscsi", "x-disable-pcie", "on" },
147     { "vmxnet3", "x-old-msi-offsets", "on" },
148     { "vmxnet3", "x-disable-pcie", "on" },
149 };
150 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
151 
152 GlobalProperty hw_compat_2_4[] = {
153     /* Optional because the 'scsi' property is Linux-only */
154     { "virtio-blk-device", "scsi", "true", .optional = true },
155     { "e1000", "extra_mac_registers", "off" },
156     { "virtio-pci", "x-disable-pcie", "on" },
157     { "virtio-pci", "migrate-extra", "off" },
158     { "fw_cfg_mem", "dma_enabled", "off" },
159     { "fw_cfg_io", "dma_enabled", "off" }
160 };
161 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
162 
163 GlobalProperty hw_compat_2_3[] = {
164     { "virtio-blk-pci", "any_layout", "off" },
165     { "virtio-balloon-pci", "any_layout", "off" },
166     { "virtio-serial-pci", "any_layout", "off" },
167     { "virtio-9p-pci", "any_layout", "off" },
168     { "virtio-rng-pci", "any_layout", "off" },
169     { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
170     { "migration", "send-configuration", "off" },
171     { "migration", "send-section-footer", "off" },
172     { "migration", "store-global-state", "off" },
173 };
174 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
175 
176 GlobalProperty hw_compat_2_2[] = {};
177 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
178 
179 GlobalProperty hw_compat_2_1[] = {
180     { "intel-hda", "old_msi_addr", "on" },
181     { "VGA", "qemu-extended-regs", "off" },
182     { "secondary-vga", "qemu-extended-regs", "off" },
183     { "virtio-scsi-pci", "any_layout", "off" },
184     { "usb-mouse", "usb_version", "1" },
185     { "usb-kbd", "usb_version", "1" },
186     { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
187 };
188 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
189 
190 static char *machine_get_kernel(Object *obj, Error **errp)
191 {
192     MachineState *ms = MACHINE(obj);
193 
194     return g_strdup(ms->kernel_filename);
195 }
196 
197 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
198 {
199     MachineState *ms = MACHINE(obj);
200 
201     g_free(ms->kernel_filename);
202     ms->kernel_filename = g_strdup(value);
203 }
204 
205 static char *machine_get_initrd(Object *obj, Error **errp)
206 {
207     MachineState *ms = MACHINE(obj);
208 
209     return g_strdup(ms->initrd_filename);
210 }
211 
212 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
213 {
214     MachineState *ms = MACHINE(obj);
215 
216     g_free(ms->initrd_filename);
217     ms->initrd_filename = g_strdup(value);
218 }
219 
220 static char *machine_get_append(Object *obj, Error **errp)
221 {
222     MachineState *ms = MACHINE(obj);
223 
224     return g_strdup(ms->kernel_cmdline);
225 }
226 
227 static void machine_set_append(Object *obj, const char *value, Error **errp)
228 {
229     MachineState *ms = MACHINE(obj);
230 
231     g_free(ms->kernel_cmdline);
232     ms->kernel_cmdline = g_strdup(value);
233 }
234 
235 static char *machine_get_dtb(Object *obj, Error **errp)
236 {
237     MachineState *ms = MACHINE(obj);
238 
239     return g_strdup(ms->dtb);
240 }
241 
242 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
243 {
244     MachineState *ms = MACHINE(obj);
245 
246     g_free(ms->dtb);
247     ms->dtb = g_strdup(value);
248 }
249 
250 static char *machine_get_dumpdtb(Object *obj, Error **errp)
251 {
252     MachineState *ms = MACHINE(obj);
253 
254     return g_strdup(ms->dumpdtb);
255 }
256 
257 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
258 {
259     MachineState *ms = MACHINE(obj);
260 
261     g_free(ms->dumpdtb);
262     ms->dumpdtb = g_strdup(value);
263 }
264 
265 static void machine_get_phandle_start(Object *obj, Visitor *v,
266                                       const char *name, void *opaque,
267                                       Error **errp)
268 {
269     MachineState *ms = MACHINE(obj);
270     int64_t value = ms->phandle_start;
271 
272     visit_type_int(v, name, &value, errp);
273 }
274 
275 static void machine_set_phandle_start(Object *obj, Visitor *v,
276                                       const char *name, void *opaque,
277                                       Error **errp)
278 {
279     MachineState *ms = MACHINE(obj);
280     Error *error = NULL;
281     int64_t value;
282 
283     visit_type_int(v, name, &value, &error);
284     if (error) {
285         error_propagate(errp, error);
286         return;
287     }
288 
289     ms->phandle_start = value;
290 }
291 
292 static char *machine_get_dt_compatible(Object *obj, Error **errp)
293 {
294     MachineState *ms = MACHINE(obj);
295 
296     return g_strdup(ms->dt_compatible);
297 }
298 
299 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
300 {
301     MachineState *ms = MACHINE(obj);
302 
303     g_free(ms->dt_compatible);
304     ms->dt_compatible = g_strdup(value);
305 }
306 
307 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
308 {
309     MachineState *ms = MACHINE(obj);
310 
311     return ms->dump_guest_core;
312 }
313 
314 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
315 {
316     MachineState *ms = MACHINE(obj);
317 
318     ms->dump_guest_core = value;
319 }
320 
321 static bool machine_get_mem_merge(Object *obj, Error **errp)
322 {
323     MachineState *ms = MACHINE(obj);
324 
325     return ms->mem_merge;
326 }
327 
328 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
329 {
330     MachineState *ms = MACHINE(obj);
331 
332     ms->mem_merge = value;
333 }
334 
335 static bool machine_get_usb(Object *obj, Error **errp)
336 {
337     MachineState *ms = MACHINE(obj);
338 
339     return ms->usb;
340 }
341 
342 static void machine_set_usb(Object *obj, bool value, Error **errp)
343 {
344     MachineState *ms = MACHINE(obj);
345 
346     ms->usb = value;
347     ms->usb_disabled = !value;
348 }
349 
350 static bool machine_get_graphics(Object *obj, Error **errp)
351 {
352     MachineState *ms = MACHINE(obj);
353 
354     return ms->enable_graphics;
355 }
356 
357 static void machine_set_graphics(Object *obj, bool value, Error **errp)
358 {
359     MachineState *ms = MACHINE(obj);
360 
361     ms->enable_graphics = value;
362 }
363 
364 static char *machine_get_firmware(Object *obj, Error **errp)
365 {
366     MachineState *ms = MACHINE(obj);
367 
368     return g_strdup(ms->firmware);
369 }
370 
371 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
372 {
373     MachineState *ms = MACHINE(obj);
374 
375     g_free(ms->firmware);
376     ms->firmware = g_strdup(value);
377 }
378 
379 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
380 {
381     MachineState *ms = MACHINE(obj);
382 
383     ms->suppress_vmdesc = value;
384 }
385 
386 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
387 {
388     MachineState *ms = MACHINE(obj);
389 
390     return ms->suppress_vmdesc;
391 }
392 
393 static void machine_set_enforce_config_section(Object *obj, bool value,
394                                              Error **errp)
395 {
396     MachineState *ms = MACHINE(obj);
397 
398     warn_report("enforce-config-section is deprecated, please use "
399                 "-global migration.send-configuration=on|off instead");
400 
401     ms->enforce_config_section = value;
402 }
403 
404 static bool machine_get_enforce_config_section(Object *obj, Error **errp)
405 {
406     MachineState *ms = MACHINE(obj);
407 
408     return ms->enforce_config_section;
409 }
410 
411 static char *machine_get_memory_encryption(Object *obj, Error **errp)
412 {
413     MachineState *ms = MACHINE(obj);
414 
415     return g_strdup(ms->memory_encryption);
416 }
417 
418 static void machine_set_memory_encryption(Object *obj, const char *value,
419                                         Error **errp)
420 {
421     MachineState *ms = MACHINE(obj);
422 
423     g_free(ms->memory_encryption);
424     ms->memory_encryption = g_strdup(value);
425 }
426 
427 static bool machine_get_nvdimm(Object *obj, Error **errp)
428 {
429     MachineState *ms = MACHINE(obj);
430 
431     return ms->nvdimms_state->is_enabled;
432 }
433 
434 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
435 {
436     MachineState *ms = MACHINE(obj);
437 
438     ms->nvdimms_state->is_enabled = value;
439 }
440 
441 static bool machine_get_hmat(Object *obj, Error **errp)
442 {
443     MachineState *ms = MACHINE(obj);
444 
445     return ms->numa_state->hmat_enabled;
446 }
447 
448 static void machine_set_hmat(Object *obj, bool value, Error **errp)
449 {
450     MachineState *ms = MACHINE(obj);
451 
452     ms->numa_state->hmat_enabled = value;
453 }
454 
455 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
456 {
457     MachineState *ms = MACHINE(obj);
458 
459     return g_strdup(ms->nvdimms_state->persistence_string);
460 }
461 
462 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
463                                            Error **errp)
464 {
465     MachineState *ms = MACHINE(obj);
466     NVDIMMState *nvdimms_state = ms->nvdimms_state;
467 
468     if (strcmp(value, "cpu") == 0) {
469         nvdimms_state->persistence = 3;
470     } else if (strcmp(value, "mem-ctrl") == 0) {
471         nvdimms_state->persistence = 2;
472     } else {
473         error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
474                    value);
475         return;
476     }
477 
478     g_free(nvdimms_state->persistence_string);
479     nvdimms_state->persistence_string = g_strdup(value);
480 }
481 
482 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
483 {
484     strList *item = g_new0(strList, 1);
485 
486     item->value = g_strdup(type);
487     item->next = mc->allowed_dynamic_sysbus_devices;
488     mc->allowed_dynamic_sysbus_devices = item;
489 }
490 
491 static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
492 {
493     MachineState *machine = opaque;
494     MachineClass *mc = MACHINE_GET_CLASS(machine);
495     bool allowed = false;
496     strList *wl;
497 
498     for (wl = mc->allowed_dynamic_sysbus_devices;
499          !allowed && wl;
500          wl = wl->next) {
501         allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value);
502     }
503 
504     if (!allowed) {
505         error_report("Option '-device %s' cannot be handled by this machine",
506                      object_class_get_name(object_get_class(OBJECT(sbdev))));
507         exit(1);
508     }
509 }
510 
511 static char *machine_get_memdev(Object *obj, Error **errp)
512 {
513     MachineState *ms = MACHINE(obj);
514 
515     return g_strdup(ms->ram_memdev_id);
516 }
517 
518 static void machine_set_memdev(Object *obj, const char *value, Error **errp)
519 {
520     MachineState *ms = MACHINE(obj);
521 
522     g_free(ms->ram_memdev_id);
523     ms->ram_memdev_id = g_strdup(value);
524 }
525 
526 
527 static void machine_init_notify(Notifier *notifier, void *data)
528 {
529     MachineState *machine = MACHINE(qdev_get_machine());
530 
531     /*
532      * Loop through all dynamically created sysbus devices and check if they are
533      * all allowed.  If a device is not allowed, error out.
534      */
535     foreach_dynamic_sysbus_device(validate_sysbus_device, machine);
536 }
537 
538 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
539 {
540     int i;
541     HotpluggableCPUList *head = NULL;
542     MachineClass *mc = MACHINE_GET_CLASS(machine);
543 
544     /* force board to initialize possible_cpus if it hasn't been done yet */
545     mc->possible_cpu_arch_ids(machine);
546 
547     for (i = 0; i < machine->possible_cpus->len; i++) {
548         Object *cpu;
549         HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1);
550         HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
551 
552         cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
553         cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
554         cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
555                                    sizeof(*cpu_item->props));
556 
557         cpu = machine->possible_cpus->cpus[i].cpu;
558         if (cpu) {
559             cpu_item->has_qom_path = true;
560             cpu_item->qom_path = object_get_canonical_path(cpu);
561         }
562         list_item->value = cpu_item;
563         list_item->next = head;
564         head = list_item;
565     }
566     return head;
567 }
568 
569 /**
570  * machine_set_cpu_numa_node:
571  * @machine: machine object to modify
572  * @props: specifies which cpu objects to assign to
573  *         numa node specified by @props.node_id
574  * @errp: if an error occurs, a pointer to an area to store the error
575  *
576  * Associate NUMA node specified by @props.node_id with cpu slots that
577  * match socket/core/thread-ids specified by @props. It's recommended to use
578  * query-hotpluggable-cpus.props values to specify affected cpu slots,
579  * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
580  *
581  * However for CLI convenience it's possible to pass in subset of properties,
582  * which would affect all cpu slots that match it.
583  * Ex for pc machine:
584  *    -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
585  *    -numa cpu,node-id=0,socket_id=0 \
586  *    -numa cpu,node-id=1,socket_id=1
587  * will assign all child cores of socket 0 to node 0 and
588  * of socket 1 to node 1.
589  *
590  * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
591  * return error.
592  * Empty subset is disallowed and function will return with error in this case.
593  */
594 void machine_set_cpu_numa_node(MachineState *machine,
595                                const CpuInstanceProperties *props, Error **errp)
596 {
597     MachineClass *mc = MACHINE_GET_CLASS(machine);
598     NodeInfo *numa_info = machine->numa_state->nodes;
599     bool match = false;
600     int i;
601 
602     if (!mc->possible_cpu_arch_ids) {
603         error_setg(errp, "mapping of CPUs to NUMA node is not supported");
604         return;
605     }
606 
607     /* disabling node mapping is not supported, forbid it */
608     assert(props->has_node_id);
609 
610     /* force board to initialize possible_cpus if it hasn't been done yet */
611     mc->possible_cpu_arch_ids(machine);
612 
613     for (i = 0; i < machine->possible_cpus->len; i++) {
614         CPUArchId *slot = &machine->possible_cpus->cpus[i];
615 
616         /* reject unsupported by board properties */
617         if (props->has_thread_id && !slot->props.has_thread_id) {
618             error_setg(errp, "thread-id is not supported");
619             return;
620         }
621 
622         if (props->has_core_id && !slot->props.has_core_id) {
623             error_setg(errp, "core-id is not supported");
624             return;
625         }
626 
627         if (props->has_socket_id && !slot->props.has_socket_id) {
628             error_setg(errp, "socket-id is not supported");
629             return;
630         }
631 
632         if (props->has_die_id && !slot->props.has_die_id) {
633             error_setg(errp, "die-id is not supported");
634             return;
635         }
636 
637         /* skip slots with explicit mismatch */
638         if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
639                 continue;
640         }
641 
642         if (props->has_core_id && props->core_id != slot->props.core_id) {
643                 continue;
644         }
645 
646         if (props->has_die_id && props->die_id != slot->props.die_id) {
647                 continue;
648         }
649 
650         if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
651                 continue;
652         }
653 
654         /* reject assignment if slot is already assigned, for compatibility
655          * of legacy cpu_index mapping with SPAPR core based mapping do not
656          * error out if cpu thread and matched core have the same node-id */
657         if (slot->props.has_node_id &&
658             slot->props.node_id != props->node_id) {
659             error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
660                        slot->props.node_id);
661             return;
662         }
663 
664         /* assign slot to node as it's matched '-numa cpu' key */
665         match = true;
666         slot->props.node_id = props->node_id;
667         slot->props.has_node_id = props->has_node_id;
668 
669         if (machine->numa_state->hmat_enabled) {
670             if ((numa_info[props->node_id].initiator < MAX_NODES) &&
671                 (props->node_id != numa_info[props->node_id].initiator)) {
672                 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
673                         " should be itself", props->node_id);
674                 return;
675             }
676             numa_info[props->node_id].has_cpu = true;
677             numa_info[props->node_id].initiator = props->node_id;
678         }
679     }
680 
681     if (!match) {
682         error_setg(errp, "no match found");
683     }
684 }
685 
686 static void smp_parse(MachineState *ms, QemuOpts *opts)
687 {
688     if (opts) {
689         unsigned cpus    = qemu_opt_get_number(opts, "cpus", 0);
690         unsigned sockets = qemu_opt_get_number(opts, "sockets", 0);
691         unsigned cores   = qemu_opt_get_number(opts, "cores", 0);
692         unsigned threads = qemu_opt_get_number(opts, "threads", 0);
693 
694         /* compute missing values, prefer sockets over cores over threads */
695         if (cpus == 0 || sockets == 0) {
696             cores = cores > 0 ? cores : 1;
697             threads = threads > 0 ? threads : 1;
698             if (cpus == 0) {
699                 sockets = sockets > 0 ? sockets : 1;
700                 cpus = cores * threads * sockets;
701             } else {
702                 ms->smp.max_cpus =
703                         qemu_opt_get_number(opts, "maxcpus", cpus);
704                 sockets = ms->smp.max_cpus / (cores * threads);
705             }
706         } else if (cores == 0) {
707             threads = threads > 0 ? threads : 1;
708             cores = cpus / (sockets * threads);
709             cores = cores > 0 ? cores : 1;
710         } else if (threads == 0) {
711             threads = cpus / (cores * sockets);
712             threads = threads > 0 ? threads : 1;
713         } else if (sockets * cores * threads < cpus) {
714             error_report("cpu topology: "
715                          "sockets (%u) * cores (%u) * threads (%u) < "
716                          "smp_cpus (%u)",
717                          sockets, cores, threads, cpus);
718             exit(1);
719         }
720 
721         ms->smp.max_cpus =
722                 qemu_opt_get_number(opts, "maxcpus", cpus);
723 
724         if (ms->smp.max_cpus < cpus) {
725             error_report("maxcpus must be equal to or greater than smp");
726             exit(1);
727         }
728 
729         if (sockets * cores * threads > ms->smp.max_cpus) {
730             error_report("cpu topology: "
731                          "sockets (%u) * cores (%u) * threads (%u) > "
732                          "maxcpus (%u)",
733                          sockets, cores, threads,
734                          ms->smp.max_cpus);
735             exit(1);
736         }
737 
738         if (sockets * cores * threads != ms->smp.max_cpus) {
739             warn_report("Invalid CPU topology deprecated: "
740                         "sockets (%u) * cores (%u) * threads (%u) "
741                         "!= maxcpus (%u)",
742                         sockets, cores, threads,
743                         ms->smp.max_cpus);
744         }
745 
746         ms->smp.cpus = cpus;
747         ms->smp.cores = cores;
748         ms->smp.threads = threads;
749     }
750 
751     if (ms->smp.cpus > 1) {
752         Error *blocker = NULL;
753         error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp");
754         replay_add_blocker(blocker);
755     }
756 }
757 
758 static void machine_class_init(ObjectClass *oc, void *data)
759 {
760     MachineClass *mc = MACHINE_CLASS(oc);
761 
762     /* Default 128 MB as guest ram size */
763     mc->default_ram_size = 128 * MiB;
764     mc->rom_file_has_mr = true;
765     mc->smp_parse = smp_parse;
766 
767     /* numa node memory size aligned on 8MB by default.
768      * On Linux, each node's border has to be 8MB aligned
769      */
770     mc->numa_mem_align_shift = 23;
771     mc->numa_auto_assign_ram = numa_default_auto_assign_ram;
772 
773     object_class_property_add_str(oc, "kernel",
774         machine_get_kernel, machine_set_kernel, &error_abort);
775     object_class_property_set_description(oc, "kernel",
776         "Linux kernel image file", &error_abort);
777 
778     object_class_property_add_str(oc, "initrd",
779         machine_get_initrd, machine_set_initrd, &error_abort);
780     object_class_property_set_description(oc, "initrd",
781         "Linux initial ramdisk file", &error_abort);
782 
783     object_class_property_add_str(oc, "append",
784         machine_get_append, machine_set_append, &error_abort);
785     object_class_property_set_description(oc, "append",
786         "Linux kernel command line", &error_abort);
787 
788     object_class_property_add_str(oc, "dtb",
789         machine_get_dtb, machine_set_dtb, &error_abort);
790     object_class_property_set_description(oc, "dtb",
791         "Linux kernel device tree file", &error_abort);
792 
793     object_class_property_add_str(oc, "dumpdtb",
794         machine_get_dumpdtb, machine_set_dumpdtb, &error_abort);
795     object_class_property_set_description(oc, "dumpdtb",
796         "Dump current dtb to a file and quit", &error_abort);
797 
798     object_class_property_add(oc, "phandle-start", "int",
799         machine_get_phandle_start, machine_set_phandle_start,
800         NULL, NULL, &error_abort);
801     object_class_property_set_description(oc, "phandle-start",
802             "The first phandle ID we may generate dynamically", &error_abort);
803 
804     object_class_property_add_str(oc, "dt-compatible",
805         machine_get_dt_compatible, machine_set_dt_compatible, &error_abort);
806     object_class_property_set_description(oc, "dt-compatible",
807         "Overrides the \"compatible\" property of the dt root node",
808         &error_abort);
809 
810     object_class_property_add_bool(oc, "dump-guest-core",
811         machine_get_dump_guest_core, machine_set_dump_guest_core, &error_abort);
812     object_class_property_set_description(oc, "dump-guest-core",
813         "Include guest memory in a core dump", &error_abort);
814 
815     object_class_property_add_bool(oc, "mem-merge",
816         machine_get_mem_merge, machine_set_mem_merge, &error_abort);
817     object_class_property_set_description(oc, "mem-merge",
818         "Enable/disable memory merge support", &error_abort);
819 
820     object_class_property_add_bool(oc, "usb",
821         machine_get_usb, machine_set_usb, &error_abort);
822     object_class_property_set_description(oc, "usb",
823         "Set on/off to enable/disable usb", &error_abort);
824 
825     object_class_property_add_bool(oc, "graphics",
826         machine_get_graphics, machine_set_graphics, &error_abort);
827     object_class_property_set_description(oc, "graphics",
828         "Set on/off to enable/disable graphics emulation", &error_abort);
829 
830     object_class_property_add_str(oc, "firmware",
831         machine_get_firmware, machine_set_firmware,
832         &error_abort);
833     object_class_property_set_description(oc, "firmware",
834         "Firmware image", &error_abort);
835 
836     object_class_property_add_bool(oc, "suppress-vmdesc",
837         machine_get_suppress_vmdesc, machine_set_suppress_vmdesc,
838         &error_abort);
839     object_class_property_set_description(oc, "suppress-vmdesc",
840         "Set on to disable self-describing migration", &error_abort);
841 
842     object_class_property_add_bool(oc, "enforce-config-section",
843         machine_get_enforce_config_section, machine_set_enforce_config_section,
844         &error_abort);
845     object_class_property_set_description(oc, "enforce-config-section",
846         "Set on to enforce configuration section migration", &error_abort);
847 
848     object_class_property_add_str(oc, "memory-encryption",
849         machine_get_memory_encryption, machine_set_memory_encryption,
850         &error_abort);
851     object_class_property_set_description(oc, "memory-encryption",
852         "Set memory encryption object to use", &error_abort);
853 }
854 
855 static void machine_class_base_init(ObjectClass *oc, void *data)
856 {
857     if (!object_class_is_abstract(oc)) {
858         MachineClass *mc = MACHINE_CLASS(oc);
859         const char *cname = object_class_get_name(oc);
860         assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
861         mc->name = g_strndup(cname,
862                             strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
863         mc->compat_props = g_ptr_array_new();
864     }
865 }
866 
867 static void machine_initfn(Object *obj)
868 {
869     MachineState *ms = MACHINE(obj);
870     MachineClass *mc = MACHINE_GET_CLASS(obj);
871 
872     ms->dump_guest_core = true;
873     ms->mem_merge = true;
874     ms->enable_graphics = true;
875 
876     if (mc->nvdimm_supported) {
877         Object *obj = OBJECT(ms);
878 
879         ms->nvdimms_state = g_new0(NVDIMMState, 1);
880         object_property_add_bool(obj, "nvdimm",
881                                  machine_get_nvdimm, machine_set_nvdimm,
882                                  &error_abort);
883         object_property_set_description(obj, "nvdimm",
884                                         "Set on/off to enable/disable "
885                                         "NVDIMM instantiation", NULL);
886 
887         object_property_add_str(obj, "nvdimm-persistence",
888                                 machine_get_nvdimm_persistence,
889                                 machine_set_nvdimm_persistence,
890                                 &error_abort);
891         object_property_set_description(obj, "nvdimm-persistence",
892                                         "Set NVDIMM persistence"
893                                         "Valid values are cpu, mem-ctrl",
894                                         NULL);
895     }
896 
897     if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
898         ms->numa_state = g_new0(NumaState, 1);
899         object_property_add_bool(obj, "hmat",
900                                  machine_get_hmat, machine_set_hmat,
901                                  &error_abort);
902         object_property_set_description(obj, "hmat",
903                                         "Set on/off to enable/disable "
904                                         "ACPI Heterogeneous Memory Attribute "
905                                         "Table (HMAT)", NULL);
906     }
907 
908     object_property_add_str(obj, "memory-backend",
909                             machine_get_memdev, machine_set_memdev,
910                             &error_abort);
911     object_property_set_description(obj, "memory-backend",
912                                     "Set RAM backend"
913                                     "Valid value is ID of hostmem based backend",
914                                      &error_abort);
915 
916     /* Register notifier when init is done for sysbus sanity checks */
917     ms->sysbus_notifier.notify = machine_init_notify;
918     qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
919 }
920 
921 static void machine_finalize(Object *obj)
922 {
923     MachineState *ms = MACHINE(obj);
924 
925     g_free(ms->kernel_filename);
926     g_free(ms->initrd_filename);
927     g_free(ms->kernel_cmdline);
928     g_free(ms->dtb);
929     g_free(ms->dumpdtb);
930     g_free(ms->dt_compatible);
931     g_free(ms->firmware);
932     g_free(ms->device_memory);
933     g_free(ms->nvdimms_state);
934     g_free(ms->numa_state);
935 }
936 
937 bool machine_usb(MachineState *machine)
938 {
939     return machine->usb;
940 }
941 
942 int machine_phandle_start(MachineState *machine)
943 {
944     return machine->phandle_start;
945 }
946 
947 bool machine_dump_guest_core(MachineState *machine)
948 {
949     return machine->dump_guest_core;
950 }
951 
952 bool machine_mem_merge(MachineState *machine)
953 {
954     return machine->mem_merge;
955 }
956 
957 static char *cpu_slot_to_string(const CPUArchId *cpu)
958 {
959     GString *s = g_string_new(NULL);
960     if (cpu->props.has_socket_id) {
961         g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
962     }
963     if (cpu->props.has_die_id) {
964         g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
965     }
966     if (cpu->props.has_core_id) {
967         if (s->len) {
968             g_string_append_printf(s, ", ");
969         }
970         g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
971     }
972     if (cpu->props.has_thread_id) {
973         if (s->len) {
974             g_string_append_printf(s, ", ");
975         }
976         g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
977     }
978     return g_string_free(s, false);
979 }
980 
981 static void numa_validate_initiator(NumaState *numa_state)
982 {
983     int i;
984     NodeInfo *numa_info = numa_state->nodes;
985 
986     for (i = 0; i < numa_state->num_nodes; i++) {
987         if (numa_info[i].initiator == MAX_NODES) {
988             error_report("The initiator of NUMA node %d is missing, use "
989                          "'-numa node,initiator' option to declare it", i);
990             exit(1);
991         }
992 
993         if (!numa_info[numa_info[i].initiator].present) {
994             error_report("NUMA node %" PRIu16 " is missing, use "
995                          "'-numa node' option to declare it first",
996                          numa_info[i].initiator);
997             exit(1);
998         }
999 
1000         if (!numa_info[numa_info[i].initiator].has_cpu) {
1001             error_report("The initiator of NUMA node %d is invalid", i);
1002             exit(1);
1003         }
1004     }
1005 }
1006 
1007 static void machine_numa_finish_cpu_init(MachineState *machine)
1008 {
1009     int i;
1010     bool default_mapping;
1011     GString *s = g_string_new(NULL);
1012     MachineClass *mc = MACHINE_GET_CLASS(machine);
1013     const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1014 
1015     assert(machine->numa_state->num_nodes);
1016     for (i = 0; i < possible_cpus->len; i++) {
1017         if (possible_cpus->cpus[i].props.has_node_id) {
1018             break;
1019         }
1020     }
1021     default_mapping = (i == possible_cpus->len);
1022 
1023     for (i = 0; i < possible_cpus->len; i++) {
1024         const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1025 
1026         if (!cpu_slot->props.has_node_id) {
1027             /* fetch default mapping from board and enable it */
1028             CpuInstanceProperties props = cpu_slot->props;
1029 
1030             props.node_id = mc->get_default_cpu_node_id(machine, i);
1031             if (!default_mapping) {
1032                 /* record slots with not set mapping,
1033                  * TODO: make it hard error in future */
1034                 char *cpu_str = cpu_slot_to_string(cpu_slot);
1035                 g_string_append_printf(s, "%sCPU %d [%s]",
1036                                        s->len ? ", " : "", i, cpu_str);
1037                 g_free(cpu_str);
1038 
1039                 /* non mapped cpus used to fallback to node 0 */
1040                 props.node_id = 0;
1041             }
1042 
1043             props.has_node_id = true;
1044             machine_set_cpu_numa_node(machine, &props, &error_fatal);
1045         }
1046     }
1047 
1048     if (machine->numa_state->hmat_enabled) {
1049         numa_validate_initiator(machine->numa_state);
1050     }
1051 
1052     if (s->len && !qtest_enabled()) {
1053         warn_report("CPU(s) not present in any NUMA nodes: %s",
1054                     s->str);
1055         warn_report("All CPU(s) up to maxcpus should be described "
1056                     "in NUMA config, ability to start up with partial NUMA "
1057                     "mappings is obsoleted and will be removed in future");
1058     }
1059     g_string_free(s, true);
1060 }
1061 
1062 void machine_run_board_init(MachineState *machine)
1063 {
1064     MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1065 
1066     if (machine->numa_state) {
1067         numa_complete_configuration(machine);
1068         if (machine->numa_state->num_nodes) {
1069             machine_numa_finish_cpu_init(machine);
1070         }
1071     }
1072 
1073     /* If the machine supports the valid_cpu_types check and the user
1074      * specified a CPU with -cpu check here that the user CPU is supported.
1075      */
1076     if (machine_class->valid_cpu_types && machine->cpu_type) {
1077         ObjectClass *class = object_class_by_name(machine->cpu_type);
1078         int i;
1079 
1080         for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1081             if (object_class_dynamic_cast(class,
1082                                           machine_class->valid_cpu_types[i])) {
1083                 /* The user specificed CPU is in the valid field, we are
1084                  * good to go.
1085                  */
1086                 break;
1087             }
1088         }
1089 
1090         if (!machine_class->valid_cpu_types[i]) {
1091             /* The user specified CPU is not valid */
1092             error_report("Invalid CPU type: %s", machine->cpu_type);
1093             error_printf("The valid types are: %s",
1094                          machine_class->valid_cpu_types[0]);
1095             for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1096                 error_printf(", %s", machine_class->valid_cpu_types[i]);
1097             }
1098             error_printf("\n");
1099 
1100             exit(1);
1101         }
1102     }
1103 
1104     machine_class->init(machine);
1105 }
1106 
1107 static const TypeInfo machine_info = {
1108     .name = TYPE_MACHINE,
1109     .parent = TYPE_OBJECT,
1110     .abstract = true,
1111     .class_size = sizeof(MachineClass),
1112     .class_init    = machine_class_init,
1113     .class_base_init = machine_class_base_init,
1114     .instance_size = sizeof(MachineState),
1115     .instance_init = machine_initfn,
1116     .instance_finalize = machine_finalize,
1117 };
1118 
1119 static void machine_register_types(void)
1120 {
1121     type_register_static(&machine_info);
1122 }
1123 
1124 type_init(machine_register_types)
1125