1 /* 2 * QEMU Machine 3 * 4 * Copyright (C) 2014 Red Hat Inc 5 * 6 * Authors: 7 * Marcel Apfelbaum <marcel.a@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/accel.h" 15 #include "sysemu/replay.h" 16 #include "hw/boards.h" 17 #include "hw/loader.h" 18 #include "qapi/error.h" 19 #include "qapi/qapi-visit-machine.h" 20 #include "qemu/madvise.h" 21 #include "qom/object_interfaces.h" 22 #include "sysemu/cpus.h" 23 #include "sysemu/sysemu.h" 24 #include "sysemu/reset.h" 25 #include "sysemu/runstate.h" 26 #include "sysemu/xen.h" 27 #include "sysemu/qtest.h" 28 #include "hw/pci/pci_bridge.h" 29 #include "hw/mem/nvdimm.h" 30 #include "migration/global_state.h" 31 #include "exec/confidential-guest-support.h" 32 #include "hw/virtio/virtio-pci.h" 33 #include "hw/virtio/virtio-net.h" 34 #include "hw/virtio/virtio-iommu.h" 35 #include "audio/audio.h" 36 37 GlobalProperty hw_compat_9_1[] = {}; 38 const size_t hw_compat_9_1_len = G_N_ELEMENTS(hw_compat_9_1); 39 40 GlobalProperty hw_compat_9_0[] = { 41 {"arm-cpu", "backcompat-cntfrq", "true" }, 42 { "scsi-hd", "migrate-emulated-scsi-request", "false" }, 43 { "scsi-cd", "migrate-emulated-scsi-request", "false" }, 44 {"vfio-pci", "skip-vsc-check", "false" }, 45 { "virtio-pci", "x-pcie-pm-no-soft-reset", "off" }, 46 {"sd-card", "spec_version", "2" }, 47 }; 48 const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0); 49 50 GlobalProperty hw_compat_8_2[] = { 51 { "migration", "zero-page-detection", "legacy"}, 52 { TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" }, 53 { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" }, 54 { "virtio-gpu-device", "x-scanout-vmstate-version", "1" }, 55 }; 56 const size_t hw_compat_8_2_len = G_N_ELEMENTS(hw_compat_8_2); 57 58 GlobalProperty hw_compat_8_1[] = { 59 { TYPE_PCI_BRIDGE, "x-pci-express-writeable-slt-bug", "true" }, 60 { "ramfb", "x-migrate", "off" }, 61 { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" }, 62 { "igb", "x-pcie-flr-init", "off" }, 63 { TYPE_VIRTIO_NET, "host_uso", "off"}, 64 { TYPE_VIRTIO_NET, "guest_uso4", "off"}, 65 { TYPE_VIRTIO_NET, "guest_uso6", "off"}, 66 }; 67 const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1); 68 69 GlobalProperty hw_compat_8_0[] = { 70 { "migration", "multifd-flush-after-each-section", "on"}, 71 { TYPE_PCI_DEVICE, "x-pcie-ari-nextfn-1", "on" }, 72 }; 73 const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0); 74 75 GlobalProperty hw_compat_7_2[] = { 76 { "e1000e", "migrate-timadj", "off" }, 77 { "virtio-mem", "x-early-migration", "false" }, 78 { "migration", "x-preempt-pre-7-2", "true" }, 79 { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" }, 80 }; 81 const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2); 82 83 GlobalProperty hw_compat_7_1[] = { 84 { "virtio-device", "queue_reset", "false" }, 85 { "virtio-rng-pci", "vectors", "0" }, 86 { "virtio-rng-pci-transitional", "vectors", "0" }, 87 { "virtio-rng-pci-non-transitional", "vectors", "0" }, 88 }; 89 const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1); 90 91 GlobalProperty hw_compat_7_0[] = { 92 { "arm-gicv3-common", "force-8-bit-prio", "on" }, 93 { "nvme-ns", "eui64-default", "on"}, 94 }; 95 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0); 96 97 GlobalProperty hw_compat_6_2[] = { 98 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"}, 99 }; 100 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2); 101 102 GlobalProperty hw_compat_6_1[] = { 103 { "vhost-user-vsock-device", "seqpacket", "off" }, 104 { "nvme-ns", "shared", "off" }, 105 }; 106 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); 107 108 GlobalProperty hw_compat_6_0[] = { 109 { "gpex-pcihost", "allow-unmapped-accesses", "false" }, 110 { "i8042", "extended-state", "false"}, 111 { "nvme-ns", "eui64-default", "off"}, 112 { "e1000", "init-vet", "off" }, 113 { "e1000e", "init-vet", "off" }, 114 { "vhost-vsock-device", "seqpacket", "off" }, 115 }; 116 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); 117 118 GlobalProperty hw_compat_5_2[] = { 119 { "ICH9-LPC", "smm-compat", "on"}, 120 { "PIIX4_PM", "smm-compat", "on"}, 121 { "virtio-blk-device", "report-discard-granularity", "off" }, 122 { "virtio-net-pci-base", "vectors", "3"}, 123 { "nvme", "msix-exclusive-bar", "on"}, 124 }; 125 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); 126 127 GlobalProperty hw_compat_5_1[] = { 128 { "vhost-scsi", "num_queues", "1"}, 129 { "vhost-user-blk", "num-queues", "1"}, 130 { "vhost-user-scsi", "num_queues", "1"}, 131 { "virtio-blk-device", "num-queues", "1"}, 132 { "virtio-scsi-device", "num_queues", "1"}, 133 { "nvme", "use-intel-id", "on"}, 134 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ 135 { "pl011", "migrate-clk", "off" }, 136 { "virtio-pci", "x-ats-page-aligned", "off"}, 137 }; 138 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); 139 140 GlobalProperty hw_compat_5_0[] = { 141 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, 142 { "virtio-balloon-device", "page-poison", "false" }, 143 { "vmport", "x-read-set-eax", "off" }, 144 { "vmport", "x-signal-unsupported-cmd", "off" }, 145 { "vmport", "x-report-vmx-type", "off" }, 146 { "vmport", "x-cmds-v2", "off" }, 147 { "virtio-device", "x-disable-legacy-check", "true" }, 148 }; 149 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); 150 151 GlobalProperty hw_compat_4_2[] = { 152 { "virtio-blk-device", "queue-size", "128"}, 153 { "virtio-scsi-device", "virtqueue_size", "128"}, 154 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, 155 { "virtio-blk-device", "seg-max-adjust", "off"}, 156 { "virtio-scsi-device", "seg_max_adjust", "off"}, 157 { "vhost-blk-device", "seg_max_adjust", "off"}, 158 { "usb-host", "suppress-remote-wake", "off" }, 159 { "usb-redir", "suppress-remote-wake", "off" }, 160 { "qxl", "revision", "4" }, 161 { "qxl-vga", "revision", "4" }, 162 { "fw_cfg", "acpi-mr-restore", "false" }, 163 { "virtio-device", "use-disabled-flag", "false" }, 164 }; 165 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); 166 167 GlobalProperty hw_compat_4_1[] = { 168 { "virtio-pci", "x-pcie-flr-init", "off" }, 169 }; 170 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); 171 172 GlobalProperty hw_compat_4_0[] = { 173 { "VGA", "edid", "false" }, 174 { "secondary-vga", "edid", "false" }, 175 { "bochs-display", "edid", "false" }, 176 { "virtio-vga", "edid", "false" }, 177 { "virtio-gpu-device", "edid", "false" }, 178 { "virtio-device", "use-started", "false" }, 179 { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, 180 { "pl031", "migrate-tick-offset", "false" }, 181 }; 182 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); 183 184 GlobalProperty hw_compat_3_1[] = { 185 { "pcie-root-port", "x-speed", "2_5" }, 186 { "pcie-root-port", "x-width", "1" }, 187 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, 188 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, 189 { "tpm-crb", "ppi", "false" }, 190 { "tpm-tis", "ppi", "false" }, 191 { "usb-kbd", "serial", "42" }, 192 { "usb-mouse", "serial", "42" }, 193 { "usb-tablet", "serial", "42" }, 194 { "virtio-blk-device", "discard", "false" }, 195 { "virtio-blk-device", "write-zeroes", "false" }, 196 { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, 197 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ 198 }; 199 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); 200 201 GlobalProperty hw_compat_3_0[] = {}; 202 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); 203 204 GlobalProperty hw_compat_2_12[] = { 205 { "hda-audio", "use-timer", "false" }, 206 { "cirrus-vga", "global-vmstate", "true" }, 207 { "VGA", "global-vmstate", "true" }, 208 { "vmware-svga", "global-vmstate", "true" }, 209 { "qxl-vga", "global-vmstate", "true" }, 210 }; 211 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); 212 213 GlobalProperty hw_compat_2_11[] = { 214 { "hpet", "hpet-offset-saved", "false" }, 215 { "virtio-blk-pci", "vectors", "2" }, 216 { "vhost-user-blk-pci", "vectors", "2" }, 217 { "e1000", "migrate_tso_props", "off" }, 218 }; 219 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); 220 221 GlobalProperty hw_compat_2_10[] = { 222 { "virtio-mouse-device", "wheel-axis", "false" }, 223 { "virtio-tablet-device", "wheel-axis", "false" }, 224 }; 225 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); 226 227 GlobalProperty hw_compat_2_9[] = { 228 { "pci-bridge", "shpc", "off" }, 229 { "intel-iommu", "pt", "off" }, 230 { "virtio-net-device", "x-mtu-bypass-backend", "off" }, 231 { "pcie-root-port", "x-migrate-msix", "false" }, 232 }; 233 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); 234 235 GlobalProperty hw_compat_2_8[] = { 236 { "fw_cfg_mem", "x-file-slots", "0x10" }, 237 { "fw_cfg_io", "x-file-slots", "0x10" }, 238 { "pflash_cfi01", "old-multiple-chip-handling", "on" }, 239 { "pci-bridge", "shpc", "on" }, 240 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, 241 { "virtio-pci", "x-pcie-deverr-init", "off" }, 242 { "virtio-pci", "x-pcie-lnkctl-init", "off" }, 243 { "virtio-pci", "x-pcie-pm-init", "off" }, 244 { "cirrus-vga", "vgamem_mb", "8" }, 245 { "isa-cirrus-vga", "vgamem_mb", "8" }, 246 }; 247 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); 248 249 GlobalProperty hw_compat_2_7[] = { 250 { "virtio-pci", "page-per-vq", "on" }, 251 { "virtio-serial-device", "emergency-write", "off" }, 252 { "ioapic", "version", "0x11" }, 253 { "intel-iommu", "x-buggy-eim", "true" }, 254 { "virtio-pci", "x-ignore-backend-features", "on" }, 255 }; 256 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); 257 258 GlobalProperty hw_compat_2_6[] = { 259 { "virtio-mmio", "format_transport_address", "off" }, 260 /* Optional because not all virtio-pci devices support legacy mode */ 261 { "virtio-pci", "disable-modern", "on", .optional = true }, 262 { "virtio-pci", "disable-legacy", "off", .optional = true }, 263 }; 264 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); 265 266 GlobalProperty hw_compat_2_5[] = { 267 { "isa-fdc", "fallback", "144" }, 268 { "pvscsi", "x-old-pci-configuration", "on" }, 269 { "pvscsi", "x-disable-pcie", "on" }, 270 { "vmxnet3", "x-old-msi-offsets", "on" }, 271 { "vmxnet3", "x-disable-pcie", "on" }, 272 }; 273 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); 274 275 GlobalProperty hw_compat_2_4[] = { 276 { "e1000", "extra_mac_registers", "off" }, 277 { "virtio-pci", "x-disable-pcie", "on" }, 278 { "virtio-pci", "migrate-extra", "off" }, 279 { "fw_cfg_mem", "dma_enabled", "off" }, 280 { "fw_cfg_io", "dma_enabled", "off" } 281 }; 282 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); 283 284 GlobalProperty hw_compat_2_3[] = { 285 { "virtio-blk-pci", "any_layout", "off" }, 286 { "virtio-balloon-pci", "any_layout", "off" }, 287 { "virtio-serial-pci", "any_layout", "off" }, 288 { "virtio-9p-pci", "any_layout", "off" }, 289 { "virtio-rng-pci", "any_layout", "off" }, 290 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, 291 { "migration", "send-configuration", "off" }, 292 { "migration", "send-section-footer", "off" }, 293 { "migration", "store-global-state", "off" }, 294 }; 295 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); 296 297 MachineState *current_machine; 298 299 static char *machine_get_kernel(Object *obj, Error **errp) 300 { 301 MachineState *ms = MACHINE(obj); 302 303 return g_strdup(ms->kernel_filename); 304 } 305 306 static void machine_set_kernel(Object *obj, const char *value, Error **errp) 307 { 308 MachineState *ms = MACHINE(obj); 309 310 g_free(ms->kernel_filename); 311 ms->kernel_filename = g_strdup(value); 312 } 313 314 static char *machine_get_initrd(Object *obj, Error **errp) 315 { 316 MachineState *ms = MACHINE(obj); 317 318 return g_strdup(ms->initrd_filename); 319 } 320 321 static void machine_set_initrd(Object *obj, const char *value, Error **errp) 322 { 323 MachineState *ms = MACHINE(obj); 324 325 g_free(ms->initrd_filename); 326 ms->initrd_filename = g_strdup(value); 327 } 328 329 static char *machine_get_append(Object *obj, Error **errp) 330 { 331 MachineState *ms = MACHINE(obj); 332 333 return g_strdup(ms->kernel_cmdline); 334 } 335 336 static void machine_set_append(Object *obj, const char *value, Error **errp) 337 { 338 MachineState *ms = MACHINE(obj); 339 340 g_free(ms->kernel_cmdline); 341 ms->kernel_cmdline = g_strdup(value); 342 } 343 344 static char *machine_get_dtb(Object *obj, Error **errp) 345 { 346 MachineState *ms = MACHINE(obj); 347 348 return g_strdup(ms->dtb); 349 } 350 351 static void machine_set_dtb(Object *obj, const char *value, Error **errp) 352 { 353 MachineState *ms = MACHINE(obj); 354 355 g_free(ms->dtb); 356 ms->dtb = g_strdup(value); 357 } 358 359 static char *machine_get_dumpdtb(Object *obj, Error **errp) 360 { 361 MachineState *ms = MACHINE(obj); 362 363 return g_strdup(ms->dumpdtb); 364 } 365 366 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) 367 { 368 MachineState *ms = MACHINE(obj); 369 370 g_free(ms->dumpdtb); 371 ms->dumpdtb = g_strdup(value); 372 } 373 374 static void machine_get_phandle_start(Object *obj, Visitor *v, 375 const char *name, void *opaque, 376 Error **errp) 377 { 378 MachineState *ms = MACHINE(obj); 379 int64_t value = ms->phandle_start; 380 381 visit_type_int(v, name, &value, errp); 382 } 383 384 static void machine_set_phandle_start(Object *obj, Visitor *v, 385 const char *name, void *opaque, 386 Error **errp) 387 { 388 MachineState *ms = MACHINE(obj); 389 int64_t value; 390 391 if (!visit_type_int(v, name, &value, errp)) { 392 return; 393 } 394 395 ms->phandle_start = value; 396 } 397 398 static char *machine_get_dt_compatible(Object *obj, Error **errp) 399 { 400 MachineState *ms = MACHINE(obj); 401 402 return g_strdup(ms->dt_compatible); 403 } 404 405 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) 406 { 407 MachineState *ms = MACHINE(obj); 408 409 g_free(ms->dt_compatible); 410 ms->dt_compatible = g_strdup(value); 411 } 412 413 static bool machine_get_dump_guest_core(Object *obj, Error **errp) 414 { 415 MachineState *ms = MACHINE(obj); 416 417 return ms->dump_guest_core; 418 } 419 420 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) 421 { 422 MachineState *ms = MACHINE(obj); 423 424 if (!value && QEMU_MADV_DONTDUMP == QEMU_MADV_INVALID) { 425 error_setg(errp, "Dumping guest memory cannot be disabled on this host"); 426 return; 427 } 428 ms->dump_guest_core = value; 429 } 430 431 static bool machine_get_mem_merge(Object *obj, Error **errp) 432 { 433 MachineState *ms = MACHINE(obj); 434 435 return ms->mem_merge; 436 } 437 438 static void machine_set_mem_merge(Object *obj, bool value, Error **errp) 439 { 440 MachineState *ms = MACHINE(obj); 441 442 if (value && QEMU_MADV_MERGEABLE == QEMU_MADV_INVALID) { 443 error_setg(errp, "Memory merging is not supported on this host"); 444 return; 445 } 446 ms->mem_merge = value; 447 } 448 449 static bool machine_get_usb(Object *obj, Error **errp) 450 { 451 MachineState *ms = MACHINE(obj); 452 453 return ms->usb; 454 } 455 456 static void machine_set_usb(Object *obj, bool value, Error **errp) 457 { 458 MachineState *ms = MACHINE(obj); 459 460 ms->usb = value; 461 ms->usb_disabled = !value; 462 } 463 464 static bool machine_get_graphics(Object *obj, Error **errp) 465 { 466 MachineState *ms = MACHINE(obj); 467 468 return ms->enable_graphics; 469 } 470 471 static void machine_set_graphics(Object *obj, bool value, Error **errp) 472 { 473 MachineState *ms = MACHINE(obj); 474 475 ms->enable_graphics = value; 476 } 477 478 static char *machine_get_firmware(Object *obj, Error **errp) 479 { 480 MachineState *ms = MACHINE(obj); 481 482 return g_strdup(ms->firmware); 483 } 484 485 static void machine_set_firmware(Object *obj, const char *value, Error **errp) 486 { 487 MachineState *ms = MACHINE(obj); 488 489 g_free(ms->firmware); 490 ms->firmware = g_strdup(value); 491 } 492 493 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) 494 { 495 MachineState *ms = MACHINE(obj); 496 497 ms->suppress_vmdesc = value; 498 } 499 500 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) 501 { 502 MachineState *ms = MACHINE(obj); 503 504 return ms->suppress_vmdesc; 505 } 506 507 static char *machine_get_memory_encryption(Object *obj, Error **errp) 508 { 509 MachineState *ms = MACHINE(obj); 510 511 if (ms->cgs) { 512 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); 513 } 514 515 return NULL; 516 } 517 518 static void machine_set_memory_encryption(Object *obj, const char *value, 519 Error **errp) 520 { 521 Object *cgs = 522 object_resolve_path_component(object_get_objects_root(), value); 523 524 if (!cgs) { 525 error_setg(errp, "No such memory encryption object '%s'", value); 526 return; 527 } 528 529 object_property_set_link(obj, "confidential-guest-support", cgs, errp); 530 } 531 532 static void machine_check_confidential_guest_support(const Object *obj, 533 const char *name, 534 Object *new_target, 535 Error **errp) 536 { 537 /* 538 * So far the only constraint is that the target has the 539 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked 540 * by the QOM core 541 */ 542 } 543 544 static bool machine_get_nvdimm(Object *obj, Error **errp) 545 { 546 MachineState *ms = MACHINE(obj); 547 548 return ms->nvdimms_state->is_enabled; 549 } 550 551 static void machine_set_nvdimm(Object *obj, bool value, Error **errp) 552 { 553 MachineState *ms = MACHINE(obj); 554 555 ms->nvdimms_state->is_enabled = value; 556 } 557 558 static bool machine_get_hmat(Object *obj, Error **errp) 559 { 560 MachineState *ms = MACHINE(obj); 561 562 return ms->numa_state->hmat_enabled; 563 } 564 565 static void machine_set_hmat(Object *obj, bool value, Error **errp) 566 { 567 MachineState *ms = MACHINE(obj); 568 569 ms->numa_state->hmat_enabled = value; 570 } 571 572 static void machine_get_mem(Object *obj, Visitor *v, const char *name, 573 void *opaque, Error **errp) 574 { 575 MachineState *ms = MACHINE(obj); 576 MemorySizeConfiguration mem = { 577 .has_size = true, 578 .size = ms->ram_size, 579 .has_max_size = !!ms->ram_slots, 580 .max_size = ms->maxram_size, 581 .has_slots = !!ms->ram_slots, 582 .slots = ms->ram_slots, 583 }; 584 MemorySizeConfiguration *p_mem = &mem; 585 586 visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort); 587 } 588 589 static void machine_set_mem(Object *obj, Visitor *v, const char *name, 590 void *opaque, Error **errp) 591 { 592 ERRP_GUARD(); 593 MachineState *ms = MACHINE(obj); 594 MachineClass *mc = MACHINE_GET_CLASS(obj); 595 MemorySizeConfiguration *mem; 596 597 if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) { 598 return; 599 } 600 601 if (!mem->has_size) { 602 mem->has_size = true; 603 mem->size = mc->default_ram_size; 604 } 605 mem->size = QEMU_ALIGN_UP(mem->size, 8192); 606 if (mc->fixup_ram_size) { 607 mem->size = mc->fixup_ram_size(mem->size); 608 } 609 if ((ram_addr_t)mem->size != mem->size) { 610 error_setg(errp, "ram size too large"); 611 goto out_free; 612 } 613 614 if (mem->has_max_size) { 615 if (mem->max_size < mem->size) { 616 error_setg(errp, "invalid value of maxmem: " 617 "maximum memory size (0x%" PRIx64 ") must be at least " 618 "the initial memory size (0x%" PRIx64 ")", 619 mem->max_size, mem->size); 620 goto out_free; 621 } 622 if (mem->has_slots && mem->slots && mem->max_size == mem->size) { 623 error_setg(errp, "invalid value of maxmem: " 624 "memory slots were specified but maximum memory size " 625 "(0x%" PRIx64 ") is equal to the initial memory size " 626 "(0x%" PRIx64 ")", mem->max_size, mem->size); 627 goto out_free; 628 } 629 ms->maxram_size = mem->max_size; 630 } else { 631 if (mem->has_slots) { 632 error_setg(errp, "slots specified but no max-size"); 633 goto out_free; 634 } 635 ms->maxram_size = mem->size; 636 } 637 ms->ram_size = mem->size; 638 ms->ram_slots = mem->has_slots ? mem->slots : 0; 639 out_free: 640 qapi_free_MemorySizeConfiguration(mem); 641 } 642 643 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) 644 { 645 MachineState *ms = MACHINE(obj); 646 647 return g_strdup(ms->nvdimms_state->persistence_string); 648 } 649 650 static void machine_set_nvdimm_persistence(Object *obj, const char *value, 651 Error **errp) 652 { 653 MachineState *ms = MACHINE(obj); 654 NVDIMMState *nvdimms_state = ms->nvdimms_state; 655 656 if (strcmp(value, "cpu") == 0) { 657 nvdimms_state->persistence = 3; 658 } else if (strcmp(value, "mem-ctrl") == 0) { 659 nvdimms_state->persistence = 2; 660 } else { 661 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", 662 value); 663 return; 664 } 665 666 g_free(nvdimms_state->persistence_string); 667 nvdimms_state->persistence_string = g_strdup(value); 668 } 669 670 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) 671 { 672 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); 673 } 674 675 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) 676 { 677 Object *obj = OBJECT(dev); 678 679 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { 680 return false; 681 } 682 683 return device_type_is_dynamic_sysbus(mc, object_get_typename(obj)); 684 } 685 686 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type) 687 { 688 bool allowed = false; 689 strList *wl; 690 ObjectClass *klass = object_class_by_name(type); 691 692 for (wl = mc->allowed_dynamic_sysbus_devices; 693 !allowed && wl; 694 wl = wl->next) { 695 allowed |= !!object_class_dynamic_cast(klass, wl->value); 696 } 697 698 return allowed; 699 } 700 701 static char *machine_get_audiodev(Object *obj, Error **errp) 702 { 703 MachineState *ms = MACHINE(obj); 704 705 return g_strdup(ms->audiodev); 706 } 707 708 static void machine_set_audiodev(Object *obj, const char *value, 709 Error **errp) 710 { 711 MachineState *ms = MACHINE(obj); 712 713 if (!audio_state_by_name(value, errp)) { 714 return; 715 } 716 717 g_free(ms->audiodev); 718 ms->audiodev = g_strdup(value); 719 } 720 721 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) 722 { 723 int i; 724 HotpluggableCPUList *head = NULL; 725 MachineClass *mc = MACHINE_GET_CLASS(machine); 726 727 /* force board to initialize possible_cpus if it hasn't been done yet */ 728 mc->possible_cpu_arch_ids(machine); 729 730 for (i = 0; i < machine->possible_cpus->len; i++) { 731 CPUState *cpu; 732 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); 733 734 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); 735 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; 736 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, 737 sizeof(*cpu_item->props)); 738 739 cpu = machine->possible_cpus->cpus[i].cpu; 740 if (cpu) { 741 cpu_item->qom_path = object_get_canonical_path(OBJECT(cpu)); 742 } 743 QAPI_LIST_PREPEND(head, cpu_item); 744 } 745 return head; 746 } 747 748 /** 749 * machine_set_cpu_numa_node: 750 * @machine: machine object to modify 751 * @props: specifies which cpu objects to assign to 752 * numa node specified by @props.node_id 753 * @errp: if an error occurs, a pointer to an area to store the error 754 * 755 * Associate NUMA node specified by @props.node_id with cpu slots that 756 * match socket/core/thread-ids specified by @props. It's recommended to use 757 * query-hotpluggable-cpus.props values to specify affected cpu slots, 758 * which would lead to exact 1:1 mapping of cpu slots to NUMA node. 759 * 760 * However for CLI convenience it's possible to pass in subset of properties, 761 * which would affect all cpu slots that match it. 762 * Ex for pc machine: 763 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ 764 * -numa cpu,node-id=0,socket_id=0 \ 765 * -numa cpu,node-id=1,socket_id=1 766 * will assign all child cores of socket 0 to node 0 and 767 * of socket 1 to node 1. 768 * 769 * On attempt of reassigning (already assigned) cpu slot to another NUMA node, 770 * return error. 771 * Empty subset is disallowed and function will return with error in this case. 772 */ 773 void machine_set_cpu_numa_node(MachineState *machine, 774 const CpuInstanceProperties *props, Error **errp) 775 { 776 MachineClass *mc = MACHINE_GET_CLASS(machine); 777 NodeInfo *numa_info = machine->numa_state->nodes; 778 bool match = false; 779 int i; 780 781 if (!mc->possible_cpu_arch_ids) { 782 error_setg(errp, "mapping of CPUs to NUMA node is not supported"); 783 return; 784 } 785 786 /* disabling node mapping is not supported, forbid it */ 787 assert(props->has_node_id); 788 789 /* force board to initialize possible_cpus if it hasn't been done yet */ 790 mc->possible_cpu_arch_ids(machine); 791 792 for (i = 0; i < machine->possible_cpus->len; i++) { 793 CPUArchId *slot = &machine->possible_cpus->cpus[i]; 794 795 /* reject unsupported by board properties */ 796 if (props->has_thread_id && !slot->props.has_thread_id) { 797 error_setg(errp, "thread-id is not supported"); 798 return; 799 } 800 801 if (props->has_core_id && !slot->props.has_core_id) { 802 error_setg(errp, "core-id is not supported"); 803 return; 804 } 805 806 if (props->has_module_id && !slot->props.has_module_id) { 807 error_setg(errp, "module-id is not supported"); 808 return; 809 } 810 811 if (props->has_cluster_id && !slot->props.has_cluster_id) { 812 error_setg(errp, "cluster-id is not supported"); 813 return; 814 } 815 816 if (props->has_socket_id && !slot->props.has_socket_id) { 817 error_setg(errp, "socket-id is not supported"); 818 return; 819 } 820 821 if (props->has_die_id && !slot->props.has_die_id) { 822 error_setg(errp, "die-id is not supported"); 823 return; 824 } 825 826 /* skip slots with explicit mismatch */ 827 if (props->has_thread_id && props->thread_id != slot->props.thread_id) { 828 continue; 829 } 830 831 if (props->has_core_id && props->core_id != slot->props.core_id) { 832 continue; 833 } 834 835 if (props->has_module_id && 836 props->module_id != slot->props.module_id) { 837 continue; 838 } 839 840 if (props->has_cluster_id && 841 props->cluster_id != slot->props.cluster_id) { 842 continue; 843 } 844 845 if (props->has_die_id && props->die_id != slot->props.die_id) { 846 continue; 847 } 848 849 if (props->has_socket_id && props->socket_id != slot->props.socket_id) { 850 continue; 851 } 852 853 /* reject assignment if slot is already assigned, for compatibility 854 * of legacy cpu_index mapping with SPAPR core based mapping do not 855 * error out if cpu thread and matched core have the same node-id */ 856 if (slot->props.has_node_id && 857 slot->props.node_id != props->node_id) { 858 error_setg(errp, "CPU is already assigned to node-id: %" PRId64, 859 slot->props.node_id); 860 return; 861 } 862 863 /* assign slot to node as it's matched '-numa cpu' key */ 864 match = true; 865 slot->props.node_id = props->node_id; 866 slot->props.has_node_id = props->has_node_id; 867 868 if (machine->numa_state->hmat_enabled) { 869 if ((numa_info[props->node_id].initiator < MAX_NODES) && 870 (props->node_id != numa_info[props->node_id].initiator)) { 871 error_setg(errp, "The initiator of CPU NUMA node %" PRId64 872 " should be itself (got %" PRIu16 ")", 873 props->node_id, numa_info[props->node_id].initiator); 874 return; 875 } 876 numa_info[props->node_id].has_cpu = true; 877 numa_info[props->node_id].initiator = props->node_id; 878 } 879 } 880 881 if (!match) { 882 error_setg(errp, "no match found"); 883 } 884 } 885 886 static void machine_get_smp(Object *obj, Visitor *v, const char *name, 887 void *opaque, Error **errp) 888 { 889 MachineState *ms = MACHINE(obj); 890 SMPConfiguration *config = &(SMPConfiguration){ 891 .has_cpus = true, .cpus = ms->smp.cpus, 892 .has_drawers = true, .drawers = ms->smp.drawers, 893 .has_books = true, .books = ms->smp.books, 894 .has_sockets = true, .sockets = ms->smp.sockets, 895 .has_dies = true, .dies = ms->smp.dies, 896 .has_clusters = true, .clusters = ms->smp.clusters, 897 .has_modules = true, .modules = ms->smp.modules, 898 .has_cores = true, .cores = ms->smp.cores, 899 .has_threads = true, .threads = ms->smp.threads, 900 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, 901 }; 902 903 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { 904 return; 905 } 906 } 907 908 static void machine_set_smp(Object *obj, Visitor *v, const char *name, 909 void *opaque, Error **errp) 910 { 911 MachineState *ms = MACHINE(obj); 912 g_autoptr(SMPConfiguration) config = NULL; 913 914 if (!visit_type_SMPConfiguration(v, name, &config, errp)) { 915 return; 916 } 917 918 machine_parse_smp_config(ms, config, errp); 919 } 920 921 static void machine_get_boot(Object *obj, Visitor *v, const char *name, 922 void *opaque, Error **errp) 923 { 924 MachineState *ms = MACHINE(obj); 925 BootConfiguration *config = &ms->boot_config; 926 visit_type_BootConfiguration(v, name, &config, &error_abort); 927 } 928 929 static void machine_free_boot_config(MachineState *ms) 930 { 931 g_free(ms->boot_config.order); 932 g_free(ms->boot_config.once); 933 g_free(ms->boot_config.splash); 934 } 935 936 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config) 937 { 938 MachineClass *machine_class = MACHINE_GET_CLASS(ms); 939 940 machine_free_boot_config(ms); 941 ms->boot_config = *config; 942 if (!config->order) { 943 ms->boot_config.order = g_strdup(machine_class->default_boot_order); 944 } 945 } 946 947 static void machine_set_boot(Object *obj, Visitor *v, const char *name, 948 void *opaque, Error **errp) 949 { 950 ERRP_GUARD(); 951 MachineState *ms = MACHINE(obj); 952 BootConfiguration *config = NULL; 953 954 if (!visit_type_BootConfiguration(v, name, &config, errp)) { 955 return; 956 } 957 if (config->order) { 958 validate_bootdevices(config->order, errp); 959 if (*errp) { 960 goto out_free; 961 } 962 } 963 if (config->once) { 964 validate_bootdevices(config->once, errp); 965 if (*errp) { 966 goto out_free; 967 } 968 } 969 970 machine_copy_boot_config(ms, config); 971 /* Strings live in ms->boot_config. */ 972 free(config); 973 return; 974 975 out_free: 976 qapi_free_BootConfiguration(config); 977 } 978 979 void machine_add_audiodev_property(MachineClass *mc) 980 { 981 ObjectClass *oc = OBJECT_CLASS(mc); 982 983 object_class_property_add_str(oc, "audiodev", 984 machine_get_audiodev, 985 machine_set_audiodev); 986 object_class_property_set_description(oc, "audiodev", 987 "Audiodev to use for default machine devices"); 988 } 989 990 static void machine_class_init(ObjectClass *oc, void *data) 991 { 992 MachineClass *mc = MACHINE_CLASS(oc); 993 994 /* Default 128 MB as guest ram size */ 995 mc->default_ram_size = 128 * MiB; 996 mc->rom_file_has_mr = true; 997 /* 998 * SMBIOS 3.1.0 7.18.5 Memory Device — Extended Size 999 * use max possible value that could be encoded into 1000 * 'Extended Size' field (2047Tb). 1001 */ 1002 mc->smbios_memory_device_size = 2047 * TiB; 1003 1004 /* numa node memory size aligned on 8MB by default. 1005 * On Linux, each node's border has to be 8MB aligned 1006 */ 1007 mc->numa_mem_align_shift = 23; 1008 1009 object_class_property_add_str(oc, "kernel", 1010 machine_get_kernel, machine_set_kernel); 1011 object_class_property_set_description(oc, "kernel", 1012 "Linux kernel image file"); 1013 1014 object_class_property_add_str(oc, "initrd", 1015 machine_get_initrd, machine_set_initrd); 1016 object_class_property_set_description(oc, "initrd", 1017 "Linux initial ramdisk file"); 1018 1019 object_class_property_add_str(oc, "append", 1020 machine_get_append, machine_set_append); 1021 object_class_property_set_description(oc, "append", 1022 "Linux kernel command line"); 1023 1024 object_class_property_add_str(oc, "dtb", 1025 machine_get_dtb, machine_set_dtb); 1026 object_class_property_set_description(oc, "dtb", 1027 "Linux kernel device tree file"); 1028 1029 object_class_property_add_str(oc, "dumpdtb", 1030 machine_get_dumpdtb, machine_set_dumpdtb); 1031 object_class_property_set_description(oc, "dumpdtb", 1032 "Dump current dtb to a file and quit"); 1033 1034 object_class_property_add(oc, "boot", "BootConfiguration", 1035 machine_get_boot, machine_set_boot, 1036 NULL, NULL); 1037 object_class_property_set_description(oc, "boot", 1038 "Boot configuration"); 1039 1040 object_class_property_add(oc, "smp", "SMPConfiguration", 1041 machine_get_smp, machine_set_smp, 1042 NULL, NULL); 1043 object_class_property_set_description(oc, "smp", 1044 "CPU topology"); 1045 1046 object_class_property_add(oc, "phandle-start", "int", 1047 machine_get_phandle_start, machine_set_phandle_start, 1048 NULL, NULL); 1049 object_class_property_set_description(oc, "phandle-start", 1050 "The first phandle ID we may generate dynamically"); 1051 1052 object_class_property_add_str(oc, "dt-compatible", 1053 machine_get_dt_compatible, machine_set_dt_compatible); 1054 object_class_property_set_description(oc, "dt-compatible", 1055 "Overrides the \"compatible\" property of the dt root node"); 1056 1057 object_class_property_add_bool(oc, "dump-guest-core", 1058 machine_get_dump_guest_core, machine_set_dump_guest_core); 1059 object_class_property_set_description(oc, "dump-guest-core", 1060 "Include guest memory in a core dump"); 1061 1062 object_class_property_add_bool(oc, "mem-merge", 1063 machine_get_mem_merge, machine_set_mem_merge); 1064 object_class_property_set_description(oc, "mem-merge", 1065 "Enable/disable memory merge support"); 1066 1067 object_class_property_add_bool(oc, "usb", 1068 machine_get_usb, machine_set_usb); 1069 object_class_property_set_description(oc, "usb", 1070 "Set on/off to enable/disable usb"); 1071 1072 object_class_property_add_bool(oc, "graphics", 1073 machine_get_graphics, machine_set_graphics); 1074 object_class_property_set_description(oc, "graphics", 1075 "Set on/off to enable/disable graphics emulation"); 1076 1077 object_class_property_add_str(oc, "firmware", 1078 machine_get_firmware, machine_set_firmware); 1079 object_class_property_set_description(oc, "firmware", 1080 "Firmware image"); 1081 1082 object_class_property_add_bool(oc, "suppress-vmdesc", 1083 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); 1084 object_class_property_set_description(oc, "suppress-vmdesc", 1085 "Set on to disable self-describing migration"); 1086 1087 object_class_property_add_link(oc, "confidential-guest-support", 1088 TYPE_CONFIDENTIAL_GUEST_SUPPORT, 1089 offsetof(MachineState, cgs), 1090 machine_check_confidential_guest_support, 1091 OBJ_PROP_LINK_STRONG); 1092 object_class_property_set_description(oc, "confidential-guest-support", 1093 "Set confidential guest scheme to support"); 1094 1095 /* For compatibility */ 1096 object_class_property_add_str(oc, "memory-encryption", 1097 machine_get_memory_encryption, machine_set_memory_encryption); 1098 object_class_property_set_description(oc, "memory-encryption", 1099 "Set memory encryption object to use"); 1100 1101 object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND, 1102 offsetof(MachineState, memdev), object_property_allow_set_link, 1103 OBJ_PROP_LINK_STRONG); 1104 object_class_property_set_description(oc, "memory-backend", 1105 "Set RAM backend" 1106 "Valid value is ID of hostmem based backend"); 1107 1108 object_class_property_add(oc, "memory", "MemorySizeConfiguration", 1109 machine_get_mem, machine_set_mem, 1110 NULL, NULL); 1111 object_class_property_set_description(oc, "memory", 1112 "Memory size configuration"); 1113 } 1114 1115 static void machine_class_base_init(ObjectClass *oc, void *data) 1116 { 1117 MachineClass *mc = MACHINE_CLASS(oc); 1118 mc->max_cpus = mc->max_cpus ?: 1; 1119 mc->min_cpus = mc->min_cpus ?: 1; 1120 mc->default_cpus = mc->default_cpus ?: 1; 1121 1122 if (!object_class_is_abstract(oc)) { 1123 const char *cname = object_class_get_name(oc); 1124 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); 1125 mc->name = g_strndup(cname, 1126 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); 1127 mc->compat_props = g_ptr_array_new(); 1128 } 1129 } 1130 1131 static void machine_initfn(Object *obj) 1132 { 1133 MachineState *ms = MACHINE(obj); 1134 MachineClass *mc = MACHINE_GET_CLASS(obj); 1135 1136 container_get(obj, "/peripheral"); 1137 container_get(obj, "/peripheral-anon"); 1138 1139 ms->dump_guest_core = true; 1140 ms->mem_merge = (QEMU_MADV_MERGEABLE != QEMU_MADV_INVALID); 1141 ms->enable_graphics = true; 1142 ms->kernel_cmdline = g_strdup(""); 1143 ms->ram_size = mc->default_ram_size; 1144 ms->maxram_size = mc->default_ram_size; 1145 1146 if (mc->nvdimm_supported) { 1147 ms->nvdimms_state = g_new0(NVDIMMState, 1); 1148 object_property_add_bool(obj, "nvdimm", 1149 machine_get_nvdimm, machine_set_nvdimm); 1150 object_property_set_description(obj, "nvdimm", 1151 "Set on/off to enable/disable " 1152 "NVDIMM instantiation"); 1153 1154 object_property_add_str(obj, "nvdimm-persistence", 1155 machine_get_nvdimm_persistence, 1156 machine_set_nvdimm_persistence); 1157 object_property_set_description(obj, "nvdimm-persistence", 1158 "Set NVDIMM persistence" 1159 "Valid values are cpu, mem-ctrl"); 1160 } 1161 1162 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { 1163 ms->numa_state = g_new0(NumaState, 1); 1164 object_property_add_bool(obj, "hmat", 1165 machine_get_hmat, machine_set_hmat); 1166 object_property_set_description(obj, "hmat", 1167 "Set on/off to enable/disable " 1168 "ACPI Heterogeneous Memory Attribute " 1169 "Table (HMAT)"); 1170 } 1171 1172 /* default to mc->default_cpus */ 1173 ms->smp.cpus = mc->default_cpus; 1174 ms->smp.max_cpus = mc->default_cpus; 1175 ms->smp.drawers = 1; 1176 ms->smp.books = 1; 1177 ms->smp.sockets = 1; 1178 ms->smp.dies = 1; 1179 ms->smp.clusters = 1; 1180 ms->smp.modules = 1; 1181 ms->smp.cores = 1; 1182 ms->smp.threads = 1; 1183 1184 machine_copy_boot_config(ms, &(BootConfiguration){ 0 }); 1185 } 1186 1187 static void machine_finalize(Object *obj) 1188 { 1189 MachineState *ms = MACHINE(obj); 1190 1191 machine_free_boot_config(ms); 1192 g_free(ms->kernel_filename); 1193 g_free(ms->initrd_filename); 1194 g_free(ms->kernel_cmdline); 1195 g_free(ms->dtb); 1196 g_free(ms->dumpdtb); 1197 g_free(ms->dt_compatible); 1198 g_free(ms->firmware); 1199 g_free(ms->device_memory); 1200 g_free(ms->nvdimms_state); 1201 g_free(ms->numa_state); 1202 g_free(ms->audiodev); 1203 } 1204 1205 bool machine_usb(MachineState *machine) 1206 { 1207 return machine->usb; 1208 } 1209 1210 int machine_phandle_start(MachineState *machine) 1211 { 1212 return machine->phandle_start; 1213 } 1214 1215 bool machine_dump_guest_core(MachineState *machine) 1216 { 1217 return machine->dump_guest_core; 1218 } 1219 1220 bool machine_mem_merge(MachineState *machine) 1221 { 1222 return machine->mem_merge; 1223 } 1224 1225 bool machine_require_guest_memfd(MachineState *machine) 1226 { 1227 return machine->cgs && machine->cgs->require_guest_memfd; 1228 } 1229 1230 static char *cpu_slot_to_string(const CPUArchId *cpu) 1231 { 1232 GString *s = g_string_new(NULL); 1233 if (cpu->props.has_socket_id) { 1234 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); 1235 } 1236 if (cpu->props.has_die_id) { 1237 if (s->len) { 1238 g_string_append_printf(s, ", "); 1239 } 1240 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); 1241 } 1242 if (cpu->props.has_cluster_id) { 1243 if (s->len) { 1244 g_string_append_printf(s, ", "); 1245 } 1246 g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id); 1247 } 1248 if (cpu->props.has_module_id) { 1249 if (s->len) { 1250 g_string_append_printf(s, ", "); 1251 } 1252 g_string_append_printf(s, "module-id: %"PRId64, cpu->props.module_id); 1253 } 1254 if (cpu->props.has_core_id) { 1255 if (s->len) { 1256 g_string_append_printf(s, ", "); 1257 } 1258 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); 1259 } 1260 if (cpu->props.has_thread_id) { 1261 if (s->len) { 1262 g_string_append_printf(s, ", "); 1263 } 1264 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); 1265 } 1266 return g_string_free(s, false); 1267 } 1268 1269 static void numa_validate_initiator(NumaState *numa_state) 1270 { 1271 int i; 1272 NodeInfo *numa_info = numa_state->nodes; 1273 1274 for (i = 0; i < numa_state->num_nodes; i++) { 1275 if (numa_info[i].initiator == MAX_NODES) { 1276 continue; 1277 } 1278 1279 if (!numa_info[numa_info[i].initiator].present) { 1280 error_report("NUMA node %" PRIu16 " is missing, use " 1281 "'-numa node' option to declare it first", 1282 numa_info[i].initiator); 1283 exit(1); 1284 } 1285 1286 if (!numa_info[numa_info[i].initiator].has_cpu) { 1287 error_report("The initiator of NUMA node %d is invalid", i); 1288 exit(1); 1289 } 1290 } 1291 } 1292 1293 static void machine_numa_finish_cpu_init(MachineState *machine) 1294 { 1295 int i; 1296 bool default_mapping; 1297 GString *s = g_string_new(NULL); 1298 MachineClass *mc = MACHINE_GET_CLASS(machine); 1299 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); 1300 1301 assert(machine->numa_state->num_nodes); 1302 for (i = 0; i < possible_cpus->len; i++) { 1303 if (possible_cpus->cpus[i].props.has_node_id) { 1304 break; 1305 } 1306 } 1307 default_mapping = (i == possible_cpus->len); 1308 1309 for (i = 0; i < possible_cpus->len; i++) { 1310 const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; 1311 1312 if (!cpu_slot->props.has_node_id) { 1313 /* fetch default mapping from board and enable it */ 1314 CpuInstanceProperties props = cpu_slot->props; 1315 1316 props.node_id = mc->get_default_cpu_node_id(machine, i); 1317 if (!default_mapping) { 1318 /* record slots with not set mapping, 1319 * TODO: make it hard error in future */ 1320 char *cpu_str = cpu_slot_to_string(cpu_slot); 1321 g_string_append_printf(s, "%sCPU %d [%s]", 1322 s->len ? ", " : "", i, cpu_str); 1323 g_free(cpu_str); 1324 1325 /* non mapped cpus used to fallback to node 0 */ 1326 props.node_id = 0; 1327 } 1328 1329 props.has_node_id = true; 1330 machine_set_cpu_numa_node(machine, &props, &error_fatal); 1331 } 1332 } 1333 1334 if (machine->numa_state->hmat_enabled) { 1335 numa_validate_initiator(machine->numa_state); 1336 } 1337 1338 if (s->len && !qtest_enabled()) { 1339 warn_report("CPU(s) not present in any NUMA nodes: %s", 1340 s->str); 1341 warn_report("All CPU(s) up to maxcpus should be described " 1342 "in NUMA config, ability to start up with partial NUMA " 1343 "mappings is obsoleted and will be removed in future"); 1344 } 1345 g_string_free(s, true); 1346 } 1347 1348 static void validate_cpu_cluster_to_numa_boundary(MachineState *ms) 1349 { 1350 MachineClass *mc = MACHINE_GET_CLASS(ms); 1351 NumaState *state = ms->numa_state; 1352 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1353 const CPUArchId *cpus = possible_cpus->cpus; 1354 int i, j; 1355 1356 if (qtest_enabled() || state->num_nodes <= 1 || possible_cpus->len <= 1) { 1357 return; 1358 } 1359 1360 /* 1361 * The Linux scheduling domain can't be parsed when the multiple CPUs 1362 * in one cluster have been associated with different NUMA nodes. However, 1363 * it's fine to associate one NUMA node with CPUs in different clusters. 1364 */ 1365 for (i = 0; i < possible_cpus->len; i++) { 1366 for (j = i + 1; j < possible_cpus->len; j++) { 1367 if (cpus[i].props.has_socket_id && 1368 cpus[i].props.has_cluster_id && 1369 cpus[i].props.has_node_id && 1370 cpus[j].props.has_socket_id && 1371 cpus[j].props.has_cluster_id && 1372 cpus[j].props.has_node_id && 1373 cpus[i].props.socket_id == cpus[j].props.socket_id && 1374 cpus[i].props.cluster_id == cpus[j].props.cluster_id && 1375 cpus[i].props.node_id != cpus[j].props.node_id) { 1376 warn_report("CPU-%d and CPU-%d in socket-%" PRId64 "-cluster-%" PRId64 1377 " have been associated with node-%" PRId64 " and node-%" PRId64 1378 " respectively. It can cause OSes like Linux to" 1379 " misbehave", i, j, cpus[i].props.socket_id, 1380 cpus[i].props.cluster_id, cpus[i].props.node_id, 1381 cpus[j].props.node_id); 1382 } 1383 } 1384 } 1385 } 1386 1387 MemoryRegion *machine_consume_memdev(MachineState *machine, 1388 HostMemoryBackend *backend) 1389 { 1390 MemoryRegion *ret = host_memory_backend_get_memory(backend); 1391 1392 if (host_memory_backend_is_mapped(backend)) { 1393 error_report("memory backend %s can't be used multiple times.", 1394 object_get_canonical_path_component(OBJECT(backend))); 1395 exit(EXIT_FAILURE); 1396 } 1397 host_memory_backend_set_mapped(backend, true); 1398 vmstate_register_ram_global(ret); 1399 return ret; 1400 } 1401 1402 static bool create_default_memdev(MachineState *ms, const char *path, Error **errp) 1403 { 1404 Object *obj; 1405 MachineClass *mc = MACHINE_GET_CLASS(ms); 1406 bool r = false; 1407 1408 obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM); 1409 if (path) { 1410 if (!object_property_set_str(obj, "mem-path", path, errp)) { 1411 goto out; 1412 } 1413 } 1414 if (!object_property_set_int(obj, "size", ms->ram_size, errp)) { 1415 goto out; 1416 } 1417 object_property_add_child(object_get_objects_root(), mc->default_ram_id, 1418 obj); 1419 /* Ensure backend's memory region name is equal to mc->default_ram_id */ 1420 if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id", 1421 false, errp)) { 1422 goto out; 1423 } 1424 if (!user_creatable_complete(USER_CREATABLE(obj), errp)) { 1425 goto out; 1426 } 1427 r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp); 1428 1429 out: 1430 object_unref(obj); 1431 return r; 1432 } 1433 1434 const char *machine_class_default_cpu_type(MachineClass *mc) 1435 { 1436 if (mc->valid_cpu_types && !mc->valid_cpu_types[1]) { 1437 /* Only a single CPU type allowed: use it as default. */ 1438 return mc->valid_cpu_types[0]; 1439 } 1440 return mc->default_cpu_type; 1441 } 1442 1443 static bool is_cpu_type_supported(const MachineState *machine, Error **errp) 1444 { 1445 MachineClass *mc = MACHINE_GET_CLASS(machine); 1446 ObjectClass *oc = object_class_by_name(machine->cpu_type); 1447 CPUClass *cc; 1448 int i; 1449 1450 /* 1451 * Check if the user specified CPU type is supported when the valid 1452 * CPU types have been determined. Note that the user specified CPU 1453 * type is provided through '-cpu' option. 1454 */ 1455 if (mc->valid_cpu_types) { 1456 assert(mc->valid_cpu_types[0] != NULL); 1457 for (i = 0; mc->valid_cpu_types[i]; i++) { 1458 if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) { 1459 break; 1460 } 1461 } 1462 1463 /* The user specified CPU type isn't valid */ 1464 if (!mc->valid_cpu_types[i]) { 1465 g_autofree char *requested = cpu_model_from_type(machine->cpu_type); 1466 error_setg(errp, "Invalid CPU model: %s", requested); 1467 if (!mc->valid_cpu_types[1]) { 1468 g_autofree char *model = cpu_model_from_type( 1469 mc->valid_cpu_types[0]); 1470 error_append_hint(errp, "The only valid type is: %s\n", model); 1471 } else { 1472 error_append_hint(errp, "The valid models are: "); 1473 for (i = 0; mc->valid_cpu_types[i]; i++) { 1474 g_autofree char *model = cpu_model_from_type( 1475 mc->valid_cpu_types[i]); 1476 error_append_hint(errp, "%s%s", 1477 model, 1478 mc->valid_cpu_types[i + 1] ? ", " : ""); 1479 } 1480 error_append_hint(errp, "\n"); 1481 } 1482 1483 return false; 1484 } 1485 } 1486 1487 /* Check if CPU type is deprecated and warn if so */ 1488 cc = CPU_CLASS(oc); 1489 assert(cc != NULL); 1490 if (cc->deprecation_note) { 1491 warn_report("CPU model %s is deprecated -- %s", 1492 machine->cpu_type, cc->deprecation_note); 1493 } 1494 1495 return true; 1496 } 1497 1498 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp) 1499 { 1500 ERRP_GUARD(); 1501 MachineClass *machine_class = MACHINE_GET_CLASS(machine); 1502 1503 /* This checkpoint is required by replay to separate prior clock 1504 reading from the other reads, because timer polling functions query 1505 clock values from the log. */ 1506 replay_checkpoint(CHECKPOINT_INIT); 1507 1508 if (!xen_enabled()) { 1509 /* On 32-bit hosts, QEMU is limited by virtual address space */ 1510 if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { 1511 error_setg(errp, "at most 2047 MB RAM can be simulated"); 1512 return; 1513 } 1514 } 1515 1516 if (machine->memdev) { 1517 ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev), 1518 "size", &error_abort); 1519 if (backend_size != machine->ram_size) { 1520 error_setg(errp, "Machine memory size does not match the size of the memory backend"); 1521 return; 1522 } 1523 } else if (machine_class->default_ram_id && machine->ram_size && 1524 numa_uses_legacy_mem()) { 1525 if (object_property_find(object_get_objects_root(), 1526 machine_class->default_ram_id)) { 1527 error_setg(errp, "object's id '%s' is reserved for the default" 1528 " RAM backend, it can't be used for any other purposes", 1529 machine_class->default_ram_id); 1530 error_append_hint(errp, 1531 "Change the object's 'id' to something else or disable" 1532 " automatic creation of the default RAM backend by setting" 1533 " 'memory-backend=%s' with '-machine'.\n", 1534 machine_class->default_ram_id); 1535 return; 1536 } 1537 if (!create_default_memdev(current_machine, mem_path, errp)) { 1538 return; 1539 } 1540 } 1541 1542 if (machine->numa_state) { 1543 numa_complete_configuration(machine); 1544 if (machine->numa_state->num_nodes) { 1545 machine_numa_finish_cpu_init(machine); 1546 if (machine_class->cpu_cluster_has_numa_boundary) { 1547 validate_cpu_cluster_to_numa_boundary(machine); 1548 } 1549 } 1550 } 1551 1552 if (!machine->ram && machine->memdev) { 1553 machine->ram = machine_consume_memdev(machine, machine->memdev); 1554 } 1555 1556 /* Check if the CPU type is supported */ 1557 if (machine->cpu_type && !is_cpu_type_supported(machine, errp)) { 1558 return; 1559 } 1560 1561 if (machine->cgs) { 1562 /* 1563 * With confidential guests, the host can't see the real 1564 * contents of RAM, so there's no point in it trying to merge 1565 * areas. 1566 */ 1567 machine_set_mem_merge(OBJECT(machine), false, &error_abort); 1568 1569 /* 1570 * Virtio devices can't count on directly accessing guest 1571 * memory, so they need iommu_platform=on to use normal DMA 1572 * mechanisms. That requires also disabling legacy virtio 1573 * support for those virtio pci devices which allow it. 1574 */ 1575 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", 1576 "on", true); 1577 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", 1578 "on", false); 1579 } 1580 1581 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); 1582 machine_class->init(machine); 1583 phase_advance(PHASE_MACHINE_INITIALIZED); 1584 } 1585 1586 static NotifierList machine_init_done_notifiers = 1587 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); 1588 1589 void qemu_add_machine_init_done_notifier(Notifier *notify) 1590 { 1591 notifier_list_add(&machine_init_done_notifiers, notify); 1592 if (phase_check(PHASE_MACHINE_READY)) { 1593 notify->notify(notify, NULL); 1594 } 1595 } 1596 1597 void qemu_remove_machine_init_done_notifier(Notifier *notify) 1598 { 1599 notifier_remove(notify); 1600 } 1601 1602 void qdev_machine_creation_done(void) 1603 { 1604 cpu_synchronize_all_post_init(); 1605 1606 if (current_machine->boot_config.once) { 1607 qemu_boot_set(current_machine->boot_config.once, &error_fatal); 1608 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order)); 1609 } 1610 1611 /* 1612 * ok, initial machine setup is done, starting from now we can 1613 * only create hotpluggable devices 1614 */ 1615 phase_advance(PHASE_MACHINE_READY); 1616 qdev_assert_realized_properly(); 1617 1618 /* TODO: once all bus devices are qdevified, this should be done 1619 * when bus is created by qdev.c */ 1620 /* 1621 * This is where we arrange for the sysbus to be reset when the 1622 * whole simulation is reset. In turn, resetting the sysbus will cause 1623 * all devices hanging off it (and all their child buses, recursively) 1624 * to be reset. Note that this will *not* reset any Device objects 1625 * which are not attached to some part of the qbus tree! 1626 */ 1627 qemu_register_resettable(OBJECT(sysbus_get_default())); 1628 1629 notifier_list_notify(&machine_init_done_notifiers, NULL); 1630 1631 if (rom_check_and_register_reset() != 0) { 1632 exit(1); 1633 } 1634 1635 replay_start(); 1636 1637 /* This checkpoint is required by replay to separate prior clock 1638 reading from the other reads, because timer polling functions query 1639 clock values from the log. */ 1640 replay_checkpoint(CHECKPOINT_RESET); 1641 qemu_system_reset(SHUTDOWN_CAUSE_NONE); 1642 register_global_state(); 1643 } 1644 1645 static const TypeInfo machine_info = { 1646 .name = TYPE_MACHINE, 1647 .parent = TYPE_OBJECT, 1648 .abstract = true, 1649 .class_size = sizeof(MachineClass), 1650 .class_init = machine_class_init, 1651 .class_base_init = machine_class_base_init, 1652 .instance_size = sizeof(MachineState), 1653 .instance_init = machine_initfn, 1654 .instance_finalize = machine_finalize, 1655 }; 1656 1657 static void machine_register_types(void) 1658 { 1659 type_register_static(&machine_info); 1660 } 1661 1662 type_init(machine_register_types) 1663