185571bc7Sbellard /* 285571bc7Sbellard ** 385571bc7Sbellard ** File: fmopl.c -- software implementation of FM sound generator 485571bc7Sbellard ** 585571bc7Sbellard ** Copyright (C) 1999,2000 Tatsuyuki Satoh , MultiArcadeMachineEmurator development 685571bc7Sbellard ** 785571bc7Sbellard ** Version 0.37a 885571bc7Sbellard ** 985571bc7Sbellard */ 1085571bc7Sbellard 1185571bc7Sbellard /* 1285571bc7Sbellard preliminary : 1385571bc7Sbellard Problem : 1485571bc7Sbellard note: 1585571bc7Sbellard */ 1685571bc7Sbellard 1785571bc7Sbellard /* This version of fmopl.c is a fork of the MAME one, relicensed under the LGPL. 1885571bc7Sbellard * 1985571bc7Sbellard * This library is free software; you can redistribute it and/or 2085571bc7Sbellard * modify it under the terms of the GNU Lesser General Public 2185571bc7Sbellard * License as published by the Free Software Foundation; either 2285571bc7Sbellard * version 2.1 of the License, or (at your option) any later version. 2385571bc7Sbellard * 2485571bc7Sbellard * This library is distributed in the hope that it will be useful, 2585571bc7Sbellard * but WITHOUT ANY WARRANTY; without even the implied warranty of 2685571bc7Sbellard * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 2785571bc7Sbellard * Lesser General Public License for more details. 2885571bc7Sbellard * 2985571bc7Sbellard * You should have received a copy of the GNU Lesser General Public 308167ee88SBlue Swirl * License along with this library; if not, see <http://www.gnu.org/licenses/>. 3185571bc7Sbellard */ 3285571bc7Sbellard 336086a565SPeter Maydell #include "qemu/osdep.h" 3485571bc7Sbellard #include <math.h> 3585571bc7Sbellard //#include "driver.h" /* use M.A.M.E. */ 3647b43a1fSPaolo Bonzini #include "fmopl.h" 3785571bc7Sbellard 3885571bc7Sbellard #ifndef PI 3985571bc7Sbellard #define PI 3.14159265358979323846 4085571bc7Sbellard #endif 4185571bc7Sbellard 42913895abSStefan Weil #ifndef ARRAY_SIZE 43913895abSStefan Weil #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 44913895abSStefan Weil #endif 45913895abSStefan Weil 4685571bc7Sbellard /* -------------------- for debug --------------------- */ 4785571bc7Sbellard /* #define OPL_OUTPUT_LOG */ 4885571bc7Sbellard #ifdef OPL_OUTPUT_LOG 4985571bc7Sbellard static FILE *opl_dbg_fp = NULL; 5085571bc7Sbellard static FM_OPL *opl_dbg_opl[16]; 5185571bc7Sbellard static int opl_dbg_maxchip,opl_dbg_chip; 5285571bc7Sbellard #endif 5385571bc7Sbellard 5485571bc7Sbellard /* -------------------- preliminary define section --------------------- */ 5585571bc7Sbellard /* attack/decay rate time rate */ 5685571bc7Sbellard #define OPL_ARRATE 141280 /* RATE 4 = 2826.24ms @ 3.6MHz */ 5785571bc7Sbellard #define OPL_DRRATE 1956000 /* RATE 4 = 39280.64ms @ 3.6MHz */ 5885571bc7Sbellard 5985571bc7Sbellard #define DELTAT_MIXING_LEVEL (1) /* DELTA-T ADPCM MIXING LEVEL */ 6085571bc7Sbellard 6185571bc7Sbellard #define FREQ_BITS 24 /* frequency turn */ 6285571bc7Sbellard 6385571bc7Sbellard /* counter bits = 20 , octerve 7 */ 6485571bc7Sbellard #define FREQ_RATE (1<<(FREQ_BITS-20)) 6585571bc7Sbellard #define TL_BITS (FREQ_BITS+2) 6685571bc7Sbellard 6785571bc7Sbellard /* final output shift , limit minimum and maximum */ 6885571bc7Sbellard #define OPL_OUTSB (TL_BITS+3-16) /* OPL output final shift 16bit */ 6985571bc7Sbellard #define OPL_MAXOUT (0x7fff<<OPL_OUTSB) 7085571bc7Sbellard #define OPL_MINOUT (-0x8000<<OPL_OUTSB) 7185571bc7Sbellard 7285571bc7Sbellard /* -------------------- quality selection --------------------- */ 7385571bc7Sbellard 7485571bc7Sbellard /* sinwave entries */ 7585571bc7Sbellard /* used static memory = SIN_ENT * 4 (byte) */ 7685571bc7Sbellard #define SIN_ENT 2048 7785571bc7Sbellard 7885571bc7Sbellard /* output level entries (envelope,sinwave) */ 7985571bc7Sbellard /* envelope counter lower bits */ 8085571bc7Sbellard #define ENV_BITS 16 8185571bc7Sbellard /* envelope output entries */ 8285571bc7Sbellard #define EG_ENT 4096 8385571bc7Sbellard /* used dynamic memory = EG_ENT*4*4(byte)or EG_ENT*6*4(byte) */ 8485571bc7Sbellard /* used static memory = EG_ENT*4 (byte) */ 8585571bc7Sbellard 8685571bc7Sbellard #define EG_OFF ((2*EG_ENT)<<ENV_BITS) /* OFF */ 8785571bc7Sbellard #define EG_DED EG_OFF 8885571bc7Sbellard #define EG_DST (EG_ENT<<ENV_BITS) /* DECAY START */ 8985571bc7Sbellard #define EG_AED EG_DST 9085571bc7Sbellard #define EG_AST 0 /* ATTACK START */ 9185571bc7Sbellard 9285571bc7Sbellard #define EG_STEP (96.0/EG_ENT) /* OPL is 0.1875 dB step */ 9385571bc7Sbellard 9485571bc7Sbellard /* LFO table entries */ 9585571bc7Sbellard #define VIB_ENT 512 9685571bc7Sbellard #define VIB_SHIFT (32-9) 9785571bc7Sbellard #define AMS_ENT 512 9885571bc7Sbellard #define AMS_SHIFT (32-9) 9985571bc7Sbellard 10085571bc7Sbellard #define VIB_RATE 256 10185571bc7Sbellard 10285571bc7Sbellard /* -------------------- local defines , macros --------------------- */ 10385571bc7Sbellard 10485571bc7Sbellard /* register number to channel number , slot offset */ 10585571bc7Sbellard #define SLOT1 0 10685571bc7Sbellard #define SLOT2 1 10785571bc7Sbellard 10885571bc7Sbellard /* envelope phase */ 10985571bc7Sbellard #define ENV_MOD_RR 0x00 11085571bc7Sbellard #define ENV_MOD_DR 0x01 11185571bc7Sbellard #define ENV_MOD_AR 0x02 11285571bc7Sbellard 11385571bc7Sbellard /* -------------------- tables --------------------- */ 11485571bc7Sbellard static const int slot_array[32]= 11585571bc7Sbellard { 11685571bc7Sbellard 0, 2, 4, 1, 3, 5,-1,-1, 11785571bc7Sbellard 6, 8,10, 7, 9,11,-1,-1, 11885571bc7Sbellard 12,14,16,13,15,17,-1,-1, 11985571bc7Sbellard -1,-1,-1,-1,-1,-1,-1,-1 12085571bc7Sbellard }; 12185571bc7Sbellard 12285571bc7Sbellard /* key scale level */ 12385571bc7Sbellard /* table is 3dB/OCT , DV converts this in TL step at 6dB/OCT */ 12485571bc7Sbellard #define DV (EG_STEP/2) 1253795f180SJuan Quintela static const uint32_t KSL_TABLE[8*16]= 12685571bc7Sbellard { 12785571bc7Sbellard /* OCT 0 */ 12885571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 12985571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 13085571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 13185571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 13285571bc7Sbellard /* OCT 1 */ 13385571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 13485571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 13585571bc7Sbellard 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV, 13685571bc7Sbellard 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV, 13785571bc7Sbellard /* OCT 2 */ 13885571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 13985571bc7Sbellard 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV, 14085571bc7Sbellard 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV, 14185571bc7Sbellard 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV, 14285571bc7Sbellard /* OCT 3 */ 14385571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV, 14485571bc7Sbellard 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV, 14585571bc7Sbellard 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV, 14685571bc7Sbellard 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV, 14785571bc7Sbellard /* OCT 4 */ 14885571bc7Sbellard 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV, 14985571bc7Sbellard 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV, 15085571bc7Sbellard 9.000/DV, 9.750/DV,10.125/DV,10.500/DV, 15185571bc7Sbellard 10.875/DV,11.250/DV,11.625/DV,12.000/DV, 15285571bc7Sbellard /* OCT 5 */ 15385571bc7Sbellard 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV, 15485571bc7Sbellard 9.000/DV,10.125/DV,10.875/DV,11.625/DV, 15585571bc7Sbellard 12.000/DV,12.750/DV,13.125/DV,13.500/DV, 15685571bc7Sbellard 13.875/DV,14.250/DV,14.625/DV,15.000/DV, 15785571bc7Sbellard /* OCT 6 */ 15885571bc7Sbellard 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV, 15985571bc7Sbellard 12.000/DV,13.125/DV,13.875/DV,14.625/DV, 16085571bc7Sbellard 15.000/DV,15.750/DV,16.125/DV,16.500/DV, 16185571bc7Sbellard 16.875/DV,17.250/DV,17.625/DV,18.000/DV, 16285571bc7Sbellard /* OCT 7 */ 16385571bc7Sbellard 0.000/DV, 9.000/DV,12.000/DV,13.875/DV, 16485571bc7Sbellard 15.000/DV,16.125/DV,16.875/DV,17.625/DV, 16585571bc7Sbellard 18.000/DV,18.750/DV,19.125/DV,19.500/DV, 16685571bc7Sbellard 19.875/DV,20.250/DV,20.625/DV,21.000/DV 16785571bc7Sbellard }; 16885571bc7Sbellard #undef DV 16985571bc7Sbellard 17085571bc7Sbellard /* sustain lebel table (3db per step) */ 17185571bc7Sbellard /* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/ 17285571bc7Sbellard #define SC(db) (db*((3/EG_STEP)*(1<<ENV_BITS)))+EG_DST 1737f643fb5SJuan Quintela static const int32_t SL_TABLE[16]={ 17485571bc7Sbellard SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7), 17585571bc7Sbellard SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31) 17685571bc7Sbellard }; 17785571bc7Sbellard #undef SC 17885571bc7Sbellard 17985571bc7Sbellard #define TL_MAX (EG_ENT*2) /* limit(tl + ksr + envelope) + sinwave */ 18085571bc7Sbellard /* TotalLevel : 48 24 12 6 3 1.5 0.75 (dB) */ 18185571bc7Sbellard /* TL_TABLE[ 0 to TL_MAX ] : plus section */ 18285571bc7Sbellard /* TL_TABLE[ TL_MAX to TL_MAX+TL_MAX-1 ] : minus section */ 1837f643fb5SJuan Quintela static int32_t *TL_TABLE; 18485571bc7Sbellard 18585571bc7Sbellard /* pointers to TL_TABLE with sinwave output offset */ 1867f643fb5SJuan Quintela static int32_t **SIN_TABLE; 18785571bc7Sbellard 18885571bc7Sbellard /* LFO table */ 1897f643fb5SJuan Quintela static int32_t *AMS_TABLE; 1907f643fb5SJuan Quintela static int32_t *VIB_TABLE; 19185571bc7Sbellard 19285571bc7Sbellard /* envelope output curve table */ 19385571bc7Sbellard /* attack + decay + OFF */ 1947f643fb5SJuan Quintela static int32_t ENV_CURVE[2*EG_ENT+1]; 19585571bc7Sbellard 19685571bc7Sbellard /* multiple table */ 19785571bc7Sbellard #define ML 2 1983795f180SJuan Quintela static const uint32_t MUL_TABLE[16]= { 19985571bc7Sbellard /* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15 */ 20085571bc7Sbellard 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML, 20185571bc7Sbellard 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML 20285571bc7Sbellard }; 20385571bc7Sbellard #undef ML 20485571bc7Sbellard 20585571bc7Sbellard /* dummy attack / decay rate ( when rate == 0 ) */ 2067f643fb5SJuan Quintela static int32_t RATE_0[16]= 20785571bc7Sbellard {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; 20885571bc7Sbellard 20985571bc7Sbellard /* -------------------- static state --------------------- */ 21085571bc7Sbellard 21185571bc7Sbellard /* lock level of common table */ 21285571bc7Sbellard static int num_lock = 0; 21385571bc7Sbellard 21485571bc7Sbellard /* work table */ 21585571bc7Sbellard static void *cur_chip = NULL; /* current chip point */ 21685571bc7Sbellard /* currenct chip state */ 21785571bc7Sbellard /* static OPLSAMPLE *bufL,*bufR; */ 21885571bc7Sbellard static OPL_CH *S_CH; 21985571bc7Sbellard static OPL_CH *E_CH; 22069df1c3cSStefan Weil static OPL_SLOT *SLOT7_1, *SLOT7_2, *SLOT8_1, *SLOT8_2; 22185571bc7Sbellard 2227f643fb5SJuan Quintela static int32_t outd[1]; 2237f643fb5SJuan Quintela static int32_t ams; 2247f643fb5SJuan Quintela static int32_t vib; 2257f643fb5SJuan Quintela static int32_t *ams_table; 2267f643fb5SJuan Quintela static int32_t *vib_table; 2277f643fb5SJuan Quintela static int32_t amsIncr; 2287f643fb5SJuan Quintela static int32_t vibIncr; 2297f643fb5SJuan Quintela static int32_t feedback2; /* connect for SLOT 2 */ 23085571bc7Sbellard 23185571bc7Sbellard /* log output level */ 23285571bc7Sbellard #define LOG_ERR 3 /* ERROR */ 23385571bc7Sbellard #define LOG_WAR 2 /* WARNING */ 23485571bc7Sbellard #define LOG_INF 1 /* INFORMATION */ 23585571bc7Sbellard 23685571bc7Sbellard //#define LOG_LEVEL LOG_INF 23785571bc7Sbellard #define LOG_LEVEL LOG_ERR 23885571bc7Sbellard 23985571bc7Sbellard //#define LOG(n,x) if( (n)>=LOG_LEVEL ) logerror x 24085571bc7Sbellard #define LOG(n,x) 24185571bc7Sbellard 24285571bc7Sbellard /* --------------------- subroutines --------------------- */ 24385571bc7Sbellard 24437f6be97SLuiz Capitulino static inline int Limit( int val, int max, int min ) { 24585571bc7Sbellard if ( val > max ) 24685571bc7Sbellard val = max; 24785571bc7Sbellard else if ( val < min ) 24885571bc7Sbellard val = min; 24985571bc7Sbellard 25085571bc7Sbellard return val; 25185571bc7Sbellard } 25285571bc7Sbellard 25385571bc7Sbellard /* status set and IRQ handling */ 25437f6be97SLuiz Capitulino static inline void OPL_STATUS_SET(FM_OPL *OPL,int flag) 25585571bc7Sbellard { 25685571bc7Sbellard /* set status flag */ 25785571bc7Sbellard OPL->status |= flag; 25885571bc7Sbellard if(!(OPL->status & 0x80)) 25985571bc7Sbellard { 26085571bc7Sbellard if(OPL->status & OPL->statusmask) 26185571bc7Sbellard { /* IRQ on */ 26285571bc7Sbellard OPL->status |= 0x80; 26385571bc7Sbellard /* callback user interrupt handler (IRQ is OFF to ON) */ 26485571bc7Sbellard if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,1); 26585571bc7Sbellard } 26685571bc7Sbellard } 26785571bc7Sbellard } 26885571bc7Sbellard 26985571bc7Sbellard /* status reset and IRQ handling */ 27037f6be97SLuiz Capitulino static inline void OPL_STATUS_RESET(FM_OPL *OPL,int flag) 27185571bc7Sbellard { 27285571bc7Sbellard /* reset status flag */ 27385571bc7Sbellard OPL->status &=~flag; 27485571bc7Sbellard if((OPL->status & 0x80)) 27585571bc7Sbellard { 27685571bc7Sbellard if (!(OPL->status & OPL->statusmask) ) 27785571bc7Sbellard { 27885571bc7Sbellard OPL->status &= 0x7f; 27985571bc7Sbellard /* callback user interrupt handler (IRQ is ON to OFF) */ 28085571bc7Sbellard if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,0); 28185571bc7Sbellard } 28285571bc7Sbellard } 28385571bc7Sbellard } 28485571bc7Sbellard 28585571bc7Sbellard /* IRQ mask set */ 28637f6be97SLuiz Capitulino static inline void OPL_STATUSMASK_SET(FM_OPL *OPL,int flag) 28785571bc7Sbellard { 28885571bc7Sbellard OPL->statusmask = flag; 28985571bc7Sbellard /* IRQ handling check */ 29085571bc7Sbellard OPL_STATUS_SET(OPL,0); 29185571bc7Sbellard OPL_STATUS_RESET(OPL,0); 29285571bc7Sbellard } 29385571bc7Sbellard 29485571bc7Sbellard /* ----- key on ----- */ 29537f6be97SLuiz Capitulino static inline void OPL_KEYON(OPL_SLOT *SLOT) 29685571bc7Sbellard { 29785571bc7Sbellard /* sin wave restart */ 29885571bc7Sbellard SLOT->Cnt = 0; 29985571bc7Sbellard /* set attack */ 30085571bc7Sbellard SLOT->evm = ENV_MOD_AR; 30185571bc7Sbellard SLOT->evs = SLOT->evsa; 30285571bc7Sbellard SLOT->evc = EG_AST; 30385571bc7Sbellard SLOT->eve = EG_AED; 30485571bc7Sbellard } 30585571bc7Sbellard /* ----- key off ----- */ 30637f6be97SLuiz Capitulino static inline void OPL_KEYOFF(OPL_SLOT *SLOT) 30785571bc7Sbellard { 30885571bc7Sbellard if( SLOT->evm > ENV_MOD_RR) 30985571bc7Sbellard { 31085571bc7Sbellard /* set envelope counter from envleope output */ 31185571bc7Sbellard SLOT->evm = ENV_MOD_RR; 31285571bc7Sbellard if( !(SLOT->evc&EG_DST) ) 31385571bc7Sbellard //SLOT->evc = (ENV_CURVE[SLOT->evc>>ENV_BITS]<<ENV_BITS) + EG_DST; 31485571bc7Sbellard SLOT->evc = EG_DST; 31585571bc7Sbellard SLOT->eve = EG_DED; 31685571bc7Sbellard SLOT->evs = SLOT->evsr; 31785571bc7Sbellard } 31885571bc7Sbellard } 31985571bc7Sbellard 32085571bc7Sbellard /* ---------- calcrate Envelope Generator & Phase Generator ---------- */ 32185571bc7Sbellard /* return : envelope output */ 3223795f180SJuan Quintela static inline uint32_t OPL_CALC_SLOT( OPL_SLOT *SLOT ) 32385571bc7Sbellard { 32485571bc7Sbellard /* calcrate envelope generator */ 32585571bc7Sbellard if( (SLOT->evc+=SLOT->evs) >= SLOT->eve ) 32685571bc7Sbellard { 32785571bc7Sbellard switch( SLOT->evm ){ 32885571bc7Sbellard case ENV_MOD_AR: /* ATTACK -> DECAY1 */ 32985571bc7Sbellard /* next DR */ 33085571bc7Sbellard SLOT->evm = ENV_MOD_DR; 33185571bc7Sbellard SLOT->evc = EG_DST; 33285571bc7Sbellard SLOT->eve = SLOT->SL; 33385571bc7Sbellard SLOT->evs = SLOT->evsd; 33485571bc7Sbellard break; 33585571bc7Sbellard case ENV_MOD_DR: /* DECAY -> SL or RR */ 33685571bc7Sbellard SLOT->evc = SLOT->SL; 33785571bc7Sbellard SLOT->eve = EG_DED; 33885571bc7Sbellard if(SLOT->eg_typ) 33985571bc7Sbellard { 34085571bc7Sbellard SLOT->evs = 0; 34185571bc7Sbellard } 34285571bc7Sbellard else 34385571bc7Sbellard { 34485571bc7Sbellard SLOT->evm = ENV_MOD_RR; 34585571bc7Sbellard SLOT->evs = SLOT->evsr; 34685571bc7Sbellard } 34785571bc7Sbellard break; 34885571bc7Sbellard case ENV_MOD_RR: /* RR -> OFF */ 34985571bc7Sbellard SLOT->evc = EG_OFF; 35085571bc7Sbellard SLOT->eve = EG_OFF+1; 35185571bc7Sbellard SLOT->evs = 0; 35285571bc7Sbellard break; 35385571bc7Sbellard } 35485571bc7Sbellard } 35585571bc7Sbellard /* calcrate envelope */ 35685571bc7Sbellard return SLOT->TLL+ENV_CURVE[SLOT->evc>>ENV_BITS]+(SLOT->ams ? ams : 0); 35785571bc7Sbellard } 35885571bc7Sbellard 359c11e80e2SStefan Weil /* set algorithm connection */ 360c11e80e2SStefan Weil static void set_algorithm( OPL_CH *CH) 36185571bc7Sbellard { 3627f643fb5SJuan Quintela int32_t *carrier = &outd[0]; 36385571bc7Sbellard CH->connect1 = CH->CON ? carrier : &feedback2; 36485571bc7Sbellard CH->connect2 = carrier; 36585571bc7Sbellard } 36685571bc7Sbellard 36785571bc7Sbellard /* ---------- frequency counter for operater update ---------- */ 36837f6be97SLuiz Capitulino static inline void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT) 36985571bc7Sbellard { 37085571bc7Sbellard int ksr; 37185571bc7Sbellard 37285571bc7Sbellard /* frequency step counter */ 37385571bc7Sbellard SLOT->Incr = CH->fc * SLOT->mul; 37485571bc7Sbellard ksr = CH->kcode >> SLOT->KSR; 37585571bc7Sbellard 37685571bc7Sbellard if( SLOT->ksr != ksr ) 37785571bc7Sbellard { 37885571bc7Sbellard SLOT->ksr = ksr; 37985571bc7Sbellard /* attack , decay rate recalcration */ 38085571bc7Sbellard SLOT->evsa = SLOT->AR[ksr]; 38185571bc7Sbellard SLOT->evsd = SLOT->DR[ksr]; 38285571bc7Sbellard SLOT->evsr = SLOT->RR[ksr]; 38385571bc7Sbellard } 38485571bc7Sbellard SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); 38585571bc7Sbellard } 38685571bc7Sbellard 38785571bc7Sbellard /* set multi,am,vib,EG-TYP,KSR,mul */ 38837f6be97SLuiz Capitulino static inline void set_mul(FM_OPL *OPL,int slot,int v) 38985571bc7Sbellard { 39085571bc7Sbellard OPL_CH *CH = &OPL->P_CH[slot/2]; 39185571bc7Sbellard OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 39285571bc7Sbellard 39385571bc7Sbellard SLOT->mul = MUL_TABLE[v&0x0f]; 39485571bc7Sbellard SLOT->KSR = (v&0x10) ? 0 : 2; 39585571bc7Sbellard SLOT->eg_typ = (v&0x20)>>5; 39685571bc7Sbellard SLOT->vib = (v&0x40); 39785571bc7Sbellard SLOT->ams = (v&0x80); 39885571bc7Sbellard CALC_FCSLOT(CH,SLOT); 39985571bc7Sbellard } 40085571bc7Sbellard 40185571bc7Sbellard /* set ksl & tl */ 40237f6be97SLuiz Capitulino static inline void set_ksl_tl(FM_OPL *OPL,int slot,int v) 40385571bc7Sbellard { 40485571bc7Sbellard OPL_CH *CH = &OPL->P_CH[slot/2]; 40585571bc7Sbellard OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 40685571bc7Sbellard int ksl = v>>6; /* 0 / 1.5 / 3 / 6 db/OCT */ 40785571bc7Sbellard 40885571bc7Sbellard SLOT->ksl = ksl ? 3-ksl : 31; 40985571bc7Sbellard SLOT->TL = (v&0x3f)*(0.75/EG_STEP); /* 0.75db step */ 41085571bc7Sbellard 41185571bc7Sbellard if( !(OPL->mode&0x80) ) 41285571bc7Sbellard { /* not CSM latch total level */ 41385571bc7Sbellard SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); 41485571bc7Sbellard } 41585571bc7Sbellard } 41685571bc7Sbellard 41785571bc7Sbellard /* set attack rate & decay rate */ 41837f6be97SLuiz Capitulino static inline void set_ar_dr(FM_OPL *OPL,int slot,int v) 41985571bc7Sbellard { 42085571bc7Sbellard OPL_CH *CH = &OPL->P_CH[slot/2]; 42185571bc7Sbellard OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 42285571bc7Sbellard int ar = v>>4; 42385571bc7Sbellard int dr = v&0x0f; 42485571bc7Sbellard 42585571bc7Sbellard SLOT->AR = ar ? &OPL->AR_TABLE[ar<<2] : RATE_0; 42685571bc7Sbellard SLOT->evsa = SLOT->AR[SLOT->ksr]; 42785571bc7Sbellard if( SLOT->evm == ENV_MOD_AR ) SLOT->evs = SLOT->evsa; 42885571bc7Sbellard 42985571bc7Sbellard SLOT->DR = dr ? &OPL->DR_TABLE[dr<<2] : RATE_0; 43085571bc7Sbellard SLOT->evsd = SLOT->DR[SLOT->ksr]; 43185571bc7Sbellard if( SLOT->evm == ENV_MOD_DR ) SLOT->evs = SLOT->evsd; 43285571bc7Sbellard } 43385571bc7Sbellard 43485571bc7Sbellard /* set sustain level & release rate */ 43537f6be97SLuiz Capitulino static inline void set_sl_rr(FM_OPL *OPL,int slot,int v) 43685571bc7Sbellard { 43785571bc7Sbellard OPL_CH *CH = &OPL->P_CH[slot/2]; 43885571bc7Sbellard OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 43985571bc7Sbellard int sl = v>>4; 44085571bc7Sbellard int rr = v & 0x0f; 44185571bc7Sbellard 44285571bc7Sbellard SLOT->SL = SL_TABLE[sl]; 44385571bc7Sbellard if( SLOT->evm == ENV_MOD_DR ) SLOT->eve = SLOT->SL; 44485571bc7Sbellard SLOT->RR = &OPL->DR_TABLE[rr<<2]; 44585571bc7Sbellard SLOT->evsr = SLOT->RR[SLOT->ksr]; 44685571bc7Sbellard if( SLOT->evm == ENV_MOD_RR ) SLOT->evs = SLOT->evsr; 44785571bc7Sbellard } 44885571bc7Sbellard 44985571bc7Sbellard /* operator output calcrator */ 45085571bc7Sbellard #define OP_OUT(slot,env,con) slot->wavetable[((slot->Cnt+con)/(0x1000000/SIN_ENT))&(SIN_ENT-1)][env] 45185571bc7Sbellard /* ---------- calcrate one of channel ---------- */ 45237f6be97SLuiz Capitulino static inline void OPL_CALC_CH( OPL_CH *CH ) 45385571bc7Sbellard { 4543795f180SJuan Quintela uint32_t env_out; 45585571bc7Sbellard OPL_SLOT *SLOT; 45685571bc7Sbellard 45785571bc7Sbellard feedback2 = 0; 45885571bc7Sbellard /* SLOT 1 */ 45985571bc7Sbellard SLOT = &CH->SLOT[SLOT1]; 46085571bc7Sbellard env_out=OPL_CALC_SLOT(SLOT); 46185571bc7Sbellard if( env_out < EG_ENT-1 ) 46285571bc7Sbellard { 46385571bc7Sbellard /* PG */ 46485571bc7Sbellard if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE); 46585571bc7Sbellard else SLOT->Cnt += SLOT->Incr; 46685571bc7Sbellard /* connectoion */ 46785571bc7Sbellard if(CH->FB) 46885571bc7Sbellard { 46985571bc7Sbellard int feedback1 = (CH->op1_out[0]+CH->op1_out[1])>>CH->FB; 47085571bc7Sbellard CH->op1_out[1] = CH->op1_out[0]; 47185571bc7Sbellard *CH->connect1 += CH->op1_out[0] = OP_OUT(SLOT,env_out,feedback1); 47285571bc7Sbellard } 47385571bc7Sbellard else 47485571bc7Sbellard { 47585571bc7Sbellard *CH->connect1 += OP_OUT(SLOT,env_out,0); 47685571bc7Sbellard } 47785571bc7Sbellard }else 47885571bc7Sbellard { 47985571bc7Sbellard CH->op1_out[1] = CH->op1_out[0]; 48085571bc7Sbellard CH->op1_out[0] = 0; 48185571bc7Sbellard } 48285571bc7Sbellard /* SLOT 2 */ 48385571bc7Sbellard SLOT = &CH->SLOT[SLOT2]; 48485571bc7Sbellard env_out=OPL_CALC_SLOT(SLOT); 48585571bc7Sbellard if( env_out < EG_ENT-1 ) 48685571bc7Sbellard { 48785571bc7Sbellard /* PG */ 48885571bc7Sbellard if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE); 48985571bc7Sbellard else SLOT->Cnt += SLOT->Incr; 49085571bc7Sbellard /* connectoion */ 49185571bc7Sbellard outd[0] += OP_OUT(SLOT,env_out, feedback2); 49285571bc7Sbellard } 49385571bc7Sbellard } 49485571bc7Sbellard 495c11e80e2SStefan Weil /* ---------- calcrate rhythm block ---------- */ 49685571bc7Sbellard #define WHITE_NOISE_db 6.0 49737f6be97SLuiz Capitulino static inline void OPL_CALC_RH( OPL_CH *CH ) 49885571bc7Sbellard { 4993795f180SJuan Quintela uint32_t env_tam,env_sd,env_top,env_hh; 50085571bc7Sbellard int whitenoise = (rand()&1)*(WHITE_NOISE_db/EG_STEP); 5017f643fb5SJuan Quintela int32_t tone8; 50285571bc7Sbellard 50385571bc7Sbellard OPL_SLOT *SLOT; 50485571bc7Sbellard int env_out; 50585571bc7Sbellard 50685571bc7Sbellard /* BD : same as FM serial mode and output level is large */ 50785571bc7Sbellard feedback2 = 0; 50885571bc7Sbellard /* SLOT 1 */ 50985571bc7Sbellard SLOT = &CH[6].SLOT[SLOT1]; 51085571bc7Sbellard env_out=OPL_CALC_SLOT(SLOT); 51185571bc7Sbellard if( env_out < EG_ENT-1 ) 51285571bc7Sbellard { 51385571bc7Sbellard /* PG */ 51485571bc7Sbellard if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE); 51585571bc7Sbellard else SLOT->Cnt += SLOT->Incr; 51685571bc7Sbellard /* connectoion */ 51785571bc7Sbellard if(CH[6].FB) 51885571bc7Sbellard { 51985571bc7Sbellard int feedback1 = (CH[6].op1_out[0]+CH[6].op1_out[1])>>CH[6].FB; 52085571bc7Sbellard CH[6].op1_out[1] = CH[6].op1_out[0]; 52185571bc7Sbellard feedback2 = CH[6].op1_out[0] = OP_OUT(SLOT,env_out,feedback1); 52285571bc7Sbellard } 52385571bc7Sbellard else 52485571bc7Sbellard { 52585571bc7Sbellard feedback2 = OP_OUT(SLOT,env_out,0); 52685571bc7Sbellard } 52785571bc7Sbellard }else 52885571bc7Sbellard { 52985571bc7Sbellard feedback2 = 0; 53085571bc7Sbellard CH[6].op1_out[1] = CH[6].op1_out[0]; 53185571bc7Sbellard CH[6].op1_out[0] = 0; 53285571bc7Sbellard } 53385571bc7Sbellard /* SLOT 2 */ 53485571bc7Sbellard SLOT = &CH[6].SLOT[SLOT2]; 53585571bc7Sbellard env_out=OPL_CALC_SLOT(SLOT); 53685571bc7Sbellard if( env_out < EG_ENT-1 ) 53785571bc7Sbellard { 53885571bc7Sbellard /* PG */ 53985571bc7Sbellard if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE); 54085571bc7Sbellard else SLOT->Cnt += SLOT->Incr; 54185571bc7Sbellard /* connectoion */ 54285571bc7Sbellard outd[0] += OP_OUT(SLOT,env_out, feedback2)*2; 54385571bc7Sbellard } 54485571bc7Sbellard 54585571bc7Sbellard // SD (17) = mul14[fnum7] + white noise 54685571bc7Sbellard // TAM (15) = mul15[fnum8] 54785571bc7Sbellard // TOP (18) = fnum6(mul18[fnum8]+whitenoise) 54885571bc7Sbellard // HH (14) = fnum7(mul18[fnum8]+whitenoise) + white noise 54985571bc7Sbellard env_sd =OPL_CALC_SLOT(SLOT7_2) + whitenoise; 55085571bc7Sbellard env_tam=OPL_CALC_SLOT(SLOT8_1); 55185571bc7Sbellard env_top=OPL_CALC_SLOT(SLOT8_2); 55285571bc7Sbellard env_hh =OPL_CALC_SLOT(SLOT7_1) + whitenoise; 55385571bc7Sbellard 55485571bc7Sbellard /* PG */ 55585571bc7Sbellard if(SLOT7_1->vib) SLOT7_1->Cnt += (2*SLOT7_1->Incr*vib/VIB_RATE); 55685571bc7Sbellard else SLOT7_1->Cnt += 2*SLOT7_1->Incr; 55785571bc7Sbellard if(SLOT7_2->vib) SLOT7_2->Cnt += ((CH[7].fc*8)*vib/VIB_RATE); 55885571bc7Sbellard else SLOT7_2->Cnt += (CH[7].fc*8); 55985571bc7Sbellard if(SLOT8_1->vib) SLOT8_1->Cnt += (SLOT8_1->Incr*vib/VIB_RATE); 56085571bc7Sbellard else SLOT8_1->Cnt += SLOT8_1->Incr; 56185571bc7Sbellard if(SLOT8_2->vib) SLOT8_2->Cnt += ((CH[8].fc*48)*vib/VIB_RATE); 56285571bc7Sbellard else SLOT8_2->Cnt += (CH[8].fc*48); 56385571bc7Sbellard 56485571bc7Sbellard tone8 = OP_OUT(SLOT8_2,whitenoise,0 ); 56585571bc7Sbellard 56685571bc7Sbellard /* SD */ 56785571bc7Sbellard if( env_sd < EG_ENT-1 ) 56885571bc7Sbellard outd[0] += OP_OUT(SLOT7_1,env_sd, 0)*8; 56985571bc7Sbellard /* TAM */ 57085571bc7Sbellard if( env_tam < EG_ENT-1 ) 57185571bc7Sbellard outd[0] += OP_OUT(SLOT8_1,env_tam, 0)*2; 57285571bc7Sbellard /* TOP-CY */ 57385571bc7Sbellard if( env_top < EG_ENT-1 ) 57485571bc7Sbellard outd[0] += OP_OUT(SLOT7_2,env_top,tone8)*2; 57585571bc7Sbellard /* HH */ 57685571bc7Sbellard if( env_hh < EG_ENT-1 ) 57785571bc7Sbellard outd[0] += OP_OUT(SLOT7_2,env_hh,tone8)*2; 57885571bc7Sbellard } 57985571bc7Sbellard 58085571bc7Sbellard /* ----------- initialize time tabls ----------- */ 58185571bc7Sbellard static void init_timetables( FM_OPL *OPL , int ARRATE , int DRRATE ) 58285571bc7Sbellard { 58385571bc7Sbellard int i; 58485571bc7Sbellard double rate; 58585571bc7Sbellard 58685571bc7Sbellard /* make attack rate & decay rate tables */ 58785571bc7Sbellard for (i = 0;i < 4;i++) OPL->AR_TABLE[i] = OPL->DR_TABLE[i] = 0; 58885571bc7Sbellard for (i = 4;i <= 60;i++){ 58985571bc7Sbellard rate = OPL->freqbase; /* frequency rate */ 59085571bc7Sbellard if( i < 60 ) rate *= 1.0+(i&3)*0.25; /* b0-1 : x1 , x1.25 , x1.5 , x1.75 */ 59185571bc7Sbellard rate *= 1<<((i>>2)-1); /* b2-5 : shift bit */ 59285571bc7Sbellard rate *= (double)(EG_ENT<<ENV_BITS); 59385571bc7Sbellard OPL->AR_TABLE[i] = rate / ARRATE; 59485571bc7Sbellard OPL->DR_TABLE[i] = rate / DRRATE; 59585571bc7Sbellard } 596913895abSStefan Weil for (i = 60; i < ARRAY_SIZE(OPL->AR_TABLE); i++) 59785571bc7Sbellard { 59885571bc7Sbellard OPL->AR_TABLE[i] = EG_AED-1; 59985571bc7Sbellard OPL->DR_TABLE[i] = OPL->DR_TABLE[60]; 60085571bc7Sbellard } 60185571bc7Sbellard #if 0 60285571bc7Sbellard for (i = 0;i < 64 ;i++){ /* make for overflow area */ 60385571bc7Sbellard LOG(LOG_WAR, ("rate %2d , ar %f ms , dr %f ms\n", i, 60485571bc7Sbellard ((double)(EG_ENT<<ENV_BITS) / OPL->AR_TABLE[i]) * (1000.0 / OPL->rate), 60585571bc7Sbellard ((double)(EG_ENT<<ENV_BITS) / OPL->DR_TABLE[i]) * (1000.0 / OPL->rate) )); 60685571bc7Sbellard } 60785571bc7Sbellard #endif 60885571bc7Sbellard } 60985571bc7Sbellard 61085571bc7Sbellard /* ---------- generic table initialize ---------- */ 61185571bc7Sbellard static int OPLOpenTable( void ) 61285571bc7Sbellard { 61385571bc7Sbellard int s,t; 61485571bc7Sbellard double rate; 61585571bc7Sbellard int i,j; 61685571bc7Sbellard double pom; 61785571bc7Sbellard 61885571bc7Sbellard /* allocate dynamic tables */ 6197f643fb5SJuan Quintela if( (TL_TABLE = malloc(TL_MAX*2*sizeof(int32_t))) == NULL) 620809c130cSaliguori return 0; 6217f643fb5SJuan Quintela if( (SIN_TABLE = malloc(SIN_ENT*4 *sizeof(int32_t *))) == NULL) 622809c130cSaliguori { 623809c130cSaliguori free(TL_TABLE); 624809c130cSaliguori return 0; 625809c130cSaliguori } 6267f643fb5SJuan Quintela if( (AMS_TABLE = malloc(AMS_ENT*2 *sizeof(int32_t))) == NULL) 627809c130cSaliguori { 628809c130cSaliguori free(TL_TABLE); 629809c130cSaliguori free(SIN_TABLE); 630809c130cSaliguori return 0; 631809c130cSaliguori } 6327f643fb5SJuan Quintela if( (VIB_TABLE = malloc(VIB_ENT*2 *sizeof(int32_t))) == NULL) 633809c130cSaliguori { 634809c130cSaliguori free(TL_TABLE); 635809c130cSaliguori free(SIN_TABLE); 636809c130cSaliguori free(AMS_TABLE); 637809c130cSaliguori return 0; 638809c130cSaliguori } 63985571bc7Sbellard /* make total level table */ 64085571bc7Sbellard for (t = 0;t < EG_ENT-1 ;t++){ 64185571bc7Sbellard rate = ((1<<TL_BITS)-1)/pow(10,EG_STEP*t/20); /* dB -> voltage */ 64285571bc7Sbellard TL_TABLE[ t] = (int)rate; 64385571bc7Sbellard TL_TABLE[TL_MAX+t] = -TL_TABLE[t]; 64485571bc7Sbellard /* LOG(LOG_INF,("TotalLevel(%3d) = %x\n",t,TL_TABLE[t]));*/ 64585571bc7Sbellard } 64685571bc7Sbellard /* fill volume off area */ 64785571bc7Sbellard for ( t = EG_ENT-1; t < TL_MAX ;t++){ 64885571bc7Sbellard TL_TABLE[t] = TL_TABLE[TL_MAX+t] = 0; 64985571bc7Sbellard } 65085571bc7Sbellard 65185571bc7Sbellard /* make sinwave table (total level offet) */ 65285571bc7Sbellard /* degree 0 = degree 180 = off */ 65385571bc7Sbellard SIN_TABLE[0] = SIN_TABLE[SIN_ENT/2] = &TL_TABLE[EG_ENT-1]; 65485571bc7Sbellard for (s = 1;s <= SIN_ENT/4;s++){ 65585571bc7Sbellard pom = sin(2*PI*s/SIN_ENT); /* sin */ 65685571bc7Sbellard pom = 20*log10(1/pom); /* decibel */ 65785571bc7Sbellard j = pom / EG_STEP; /* TL_TABLE steps */ 65885571bc7Sbellard 65985571bc7Sbellard /* degree 0 - 90 , degree 180 - 90 : plus section */ 66085571bc7Sbellard SIN_TABLE[ s] = SIN_TABLE[SIN_ENT/2-s] = &TL_TABLE[j]; 66185571bc7Sbellard /* degree 180 - 270 , degree 360 - 270 : minus section */ 66285571bc7Sbellard SIN_TABLE[SIN_ENT/2+s] = SIN_TABLE[SIN_ENT -s] = &TL_TABLE[TL_MAX+j]; 66385571bc7Sbellard /* LOG(LOG_INF,("sin(%3d) = %f:%f db\n",s,pom,(double)j * EG_STEP));*/ 66485571bc7Sbellard } 66585571bc7Sbellard for (s = 0;s < SIN_ENT;s++) 66685571bc7Sbellard { 66785571bc7Sbellard SIN_TABLE[SIN_ENT*1+s] = s<(SIN_ENT/2) ? SIN_TABLE[s] : &TL_TABLE[EG_ENT]; 66885571bc7Sbellard SIN_TABLE[SIN_ENT*2+s] = SIN_TABLE[s % (SIN_ENT/2)]; 66985571bc7Sbellard SIN_TABLE[SIN_ENT*3+s] = (s/(SIN_ENT/4))&1 ? &TL_TABLE[EG_ENT] : SIN_TABLE[SIN_ENT*2+s]; 67085571bc7Sbellard } 67185571bc7Sbellard 67285571bc7Sbellard /* envelope counter -> envelope output table */ 67385571bc7Sbellard for (i=0; i<EG_ENT; i++) 67485571bc7Sbellard { 67585571bc7Sbellard /* ATTACK curve */ 67685571bc7Sbellard pom = pow( ((double)(EG_ENT-1-i)/EG_ENT) , 8 ) * EG_ENT; 67785571bc7Sbellard /* if( pom >= EG_ENT ) pom = EG_ENT-1; */ 67885571bc7Sbellard ENV_CURVE[i] = (int)pom; 67985571bc7Sbellard /* DECAY ,RELEASE curve */ 68085571bc7Sbellard ENV_CURVE[(EG_DST>>ENV_BITS)+i]= i; 68185571bc7Sbellard } 68285571bc7Sbellard /* off */ 68385571bc7Sbellard ENV_CURVE[EG_OFF>>ENV_BITS]= EG_ENT-1; 68485571bc7Sbellard /* make LFO ams table */ 68585571bc7Sbellard for (i=0; i<AMS_ENT; i++) 68685571bc7Sbellard { 68785571bc7Sbellard pom = (1.0+sin(2*PI*i/AMS_ENT))/2; /* sin */ 68885571bc7Sbellard AMS_TABLE[i] = (1.0/EG_STEP)*pom; /* 1dB */ 68985571bc7Sbellard AMS_TABLE[AMS_ENT+i] = (4.8/EG_STEP)*pom; /* 4.8dB */ 69085571bc7Sbellard } 69185571bc7Sbellard /* make LFO vibrate table */ 69285571bc7Sbellard for (i=0; i<VIB_ENT; i++) 69385571bc7Sbellard { 69485571bc7Sbellard /* 100cent = 1seminote = 6% ?? */ 69585571bc7Sbellard pom = (double)VIB_RATE*0.06*sin(2*PI*i/VIB_ENT); /* +-100sect step */ 69685571bc7Sbellard VIB_TABLE[i] = VIB_RATE + (pom*0.07); /* +- 7cent */ 69785571bc7Sbellard VIB_TABLE[VIB_ENT+i] = VIB_RATE + (pom*0.14); /* +-14cent */ 69885571bc7Sbellard /* LOG(LOG_INF,("vib %d=%d\n",i,VIB_TABLE[VIB_ENT+i])); */ 69985571bc7Sbellard } 70085571bc7Sbellard return 1; 70185571bc7Sbellard } 70285571bc7Sbellard 70385571bc7Sbellard 70485571bc7Sbellard static void OPLCloseTable( void ) 70585571bc7Sbellard { 70685571bc7Sbellard free(TL_TABLE); 70785571bc7Sbellard free(SIN_TABLE); 70885571bc7Sbellard free(AMS_TABLE); 70985571bc7Sbellard free(VIB_TABLE); 71085571bc7Sbellard } 71185571bc7Sbellard 71266a0a2cbSDong Xu Wang /* CSM Key Control */ 71337f6be97SLuiz Capitulino static inline void CSMKeyControll(OPL_CH *CH) 71485571bc7Sbellard { 71585571bc7Sbellard OPL_SLOT *slot1 = &CH->SLOT[SLOT1]; 71685571bc7Sbellard OPL_SLOT *slot2 = &CH->SLOT[SLOT2]; 71785571bc7Sbellard /* all key off */ 71885571bc7Sbellard OPL_KEYOFF(slot1); 71985571bc7Sbellard OPL_KEYOFF(slot2); 72085571bc7Sbellard /* total level latch */ 72185571bc7Sbellard slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl); 72285571bc7Sbellard slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl); 72385571bc7Sbellard /* key on */ 72485571bc7Sbellard CH->op1_out[0] = CH->op1_out[1] = 0; 72585571bc7Sbellard OPL_KEYON(slot1); 72685571bc7Sbellard OPL_KEYON(slot2); 72785571bc7Sbellard } 72885571bc7Sbellard 72985571bc7Sbellard /* ---------- opl initialize ---------- */ 73031de8314SStefan Weil static void OPL_initialize(FM_OPL *OPL) 73185571bc7Sbellard { 73285571bc7Sbellard int fn; 73385571bc7Sbellard 73485571bc7Sbellard /* frequency base */ 73585571bc7Sbellard OPL->freqbase = (OPL->rate) ? ((double)OPL->clock / OPL->rate) / 72 : 0; 73685571bc7Sbellard /* Timer base time */ 73785571bc7Sbellard OPL->TimerBase = 1.0/((double)OPL->clock / 72.0 ); 73885571bc7Sbellard /* make time tables */ 73985571bc7Sbellard init_timetables( OPL , OPL_ARRATE , OPL_DRRATE ); 74085571bc7Sbellard /* make fnumber -> increment counter table */ 74185571bc7Sbellard for( fn=0 ; fn < 1024 ; fn++ ) 74285571bc7Sbellard { 74385571bc7Sbellard OPL->FN_TABLE[fn] = OPL->freqbase * fn * FREQ_RATE * (1<<7) / 2; 74485571bc7Sbellard } 74585571bc7Sbellard /* LFO freq.table */ 74685571bc7Sbellard OPL->amsIncr = OPL->rate ? (double)AMS_ENT*(1<<AMS_SHIFT) / OPL->rate * 3.7 * ((double)OPL->clock/3600000) : 0; 74785571bc7Sbellard OPL->vibIncr = OPL->rate ? (double)VIB_ENT*(1<<VIB_SHIFT) / OPL->rate * 6.4 * ((double)OPL->clock/3600000) : 0; 74885571bc7Sbellard } 74985571bc7Sbellard 75085571bc7Sbellard /* ---------- write a OPL registers ---------- */ 75185571bc7Sbellard static void OPLWriteReg(FM_OPL *OPL, int r, int v) 75285571bc7Sbellard { 75385571bc7Sbellard OPL_CH *CH; 75485571bc7Sbellard int slot; 75585571bc7Sbellard int block_fnum; 75685571bc7Sbellard 75785571bc7Sbellard switch(r&0xe0) 75885571bc7Sbellard { 75966a0a2cbSDong Xu Wang case 0x00: /* 00-1f:control */ 76085571bc7Sbellard switch(r&0x1f) 76185571bc7Sbellard { 76285571bc7Sbellard case 0x01: 76385571bc7Sbellard /* wave selector enable */ 76485571bc7Sbellard if(OPL->type&OPL_TYPE_WAVESEL) 76585571bc7Sbellard { 76685571bc7Sbellard OPL->wavesel = v&0x20; 76785571bc7Sbellard if(!OPL->wavesel) 76885571bc7Sbellard { 76985571bc7Sbellard /* preset compatible mode */ 77085571bc7Sbellard int c; 77185571bc7Sbellard for(c=0;c<OPL->max_ch;c++) 77285571bc7Sbellard { 77385571bc7Sbellard OPL->P_CH[c].SLOT[SLOT1].wavetable = &SIN_TABLE[0]; 77485571bc7Sbellard OPL->P_CH[c].SLOT[SLOT2].wavetable = &SIN_TABLE[0]; 77585571bc7Sbellard } 77685571bc7Sbellard } 77785571bc7Sbellard } 77885571bc7Sbellard return; 77985571bc7Sbellard case 0x02: /* Timer 1 */ 78085571bc7Sbellard OPL->T[0] = (256-v)*4; 78185571bc7Sbellard break; 78285571bc7Sbellard case 0x03: /* Timer 2 */ 78385571bc7Sbellard OPL->T[1] = (256-v)*16; 78485571bc7Sbellard return; 78585571bc7Sbellard case 0x04: /* IRQ clear / mask and Timer enable */ 78685571bc7Sbellard if(v&0x80) 78785571bc7Sbellard { /* IRQ flag clear */ 78885571bc7Sbellard OPL_STATUS_RESET(OPL,0x7f); 78985571bc7Sbellard } 79085571bc7Sbellard else 79185571bc7Sbellard { /* set IRQ mask ,timer enable*/ 7924a796e97SJuan Quintela uint8_t st1 = v&1; 7934a796e97SJuan Quintela uint8_t st2 = (v>>1)&1; 79485571bc7Sbellard /* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */ 79585571bc7Sbellard OPL_STATUS_RESET(OPL,v&0x78); 79685571bc7Sbellard OPL_STATUSMASK_SET(OPL,((~v)&0x78)|0x01); 79785571bc7Sbellard /* timer 2 */ 79885571bc7Sbellard if(OPL->st[1] != st2) 79985571bc7Sbellard { 80085571bc7Sbellard double interval = st2 ? (double)OPL->T[1]*OPL->TimerBase : 0.0; 80185571bc7Sbellard OPL->st[1] = st2; 80285571bc7Sbellard if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+1,interval); 80385571bc7Sbellard } 80485571bc7Sbellard /* timer 1 */ 80585571bc7Sbellard if(OPL->st[0] != st1) 80685571bc7Sbellard { 80785571bc7Sbellard double interval = st1 ? (double)OPL->T[0]*OPL->TimerBase : 0.0; 80885571bc7Sbellard OPL->st[0] = st1; 80985571bc7Sbellard if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+0,interval); 81085571bc7Sbellard } 81185571bc7Sbellard } 81285571bc7Sbellard return; 81385571bc7Sbellard } 81485571bc7Sbellard break; 81585571bc7Sbellard case 0x20: /* am,vib,ksr,eg type,mul */ 81685571bc7Sbellard slot = slot_array[r&0x1f]; 81785571bc7Sbellard if(slot == -1) return; 81885571bc7Sbellard set_mul(OPL,slot,v); 81985571bc7Sbellard return; 82085571bc7Sbellard case 0x40: 82185571bc7Sbellard slot = slot_array[r&0x1f]; 82285571bc7Sbellard if(slot == -1) return; 82385571bc7Sbellard set_ksl_tl(OPL,slot,v); 82485571bc7Sbellard return; 82585571bc7Sbellard case 0x60: 82685571bc7Sbellard slot = slot_array[r&0x1f]; 82785571bc7Sbellard if(slot == -1) return; 82885571bc7Sbellard set_ar_dr(OPL,slot,v); 82985571bc7Sbellard return; 83085571bc7Sbellard case 0x80: 83185571bc7Sbellard slot = slot_array[r&0x1f]; 83285571bc7Sbellard if(slot == -1) return; 83385571bc7Sbellard set_sl_rr(OPL,slot,v); 83485571bc7Sbellard return; 83585571bc7Sbellard case 0xa0: 83685571bc7Sbellard switch(r) 83785571bc7Sbellard { 83885571bc7Sbellard case 0xbd: 83985571bc7Sbellard /* amsep,vibdep,r,bd,sd,tom,tc,hh */ 84085571bc7Sbellard { 8414a796e97SJuan Quintela uint8_t rkey = OPL->rhythm^v; 84285571bc7Sbellard OPL->ams_table = &AMS_TABLE[v&0x80 ? AMS_ENT : 0]; 84385571bc7Sbellard OPL->vib_table = &VIB_TABLE[v&0x40 ? VIB_ENT : 0]; 844c11e80e2SStefan Weil OPL->rhythm = v&0x3f; 845c11e80e2SStefan Weil if(OPL->rhythm&0x20) 84685571bc7Sbellard { 84785571bc7Sbellard #if 0 848c11e80e2SStefan Weil usrintf_showmessage("OPL Rhythm mode select"); 84985571bc7Sbellard #endif 85085571bc7Sbellard /* BD key on/off */ 85185571bc7Sbellard if(rkey&0x10) 85285571bc7Sbellard { 85385571bc7Sbellard if(v&0x10) 85485571bc7Sbellard { 85585571bc7Sbellard OPL->P_CH[6].op1_out[0] = OPL->P_CH[6].op1_out[1] = 0; 85685571bc7Sbellard OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT1]); 85785571bc7Sbellard OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT2]); 85885571bc7Sbellard } 85985571bc7Sbellard else 86085571bc7Sbellard { 86185571bc7Sbellard OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1]); 86285571bc7Sbellard OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2]); 86385571bc7Sbellard } 86485571bc7Sbellard } 86585571bc7Sbellard /* SD key on/off */ 86685571bc7Sbellard if(rkey&0x08) 86785571bc7Sbellard { 86885571bc7Sbellard if(v&0x08) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT2]); 86985571bc7Sbellard else OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2]); 87085571bc7Sbellard }/* TAM key on/off */ 87185571bc7Sbellard if(rkey&0x04) 87285571bc7Sbellard { 87385571bc7Sbellard if(v&0x04) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT1]); 87485571bc7Sbellard else OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1]); 87585571bc7Sbellard } 87685571bc7Sbellard /* TOP-CY key on/off */ 87785571bc7Sbellard if(rkey&0x02) 87885571bc7Sbellard { 87985571bc7Sbellard if(v&0x02) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT2]); 88085571bc7Sbellard else OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2]); 88185571bc7Sbellard } 88285571bc7Sbellard /* HH key on/off */ 88385571bc7Sbellard if(rkey&0x01) 88485571bc7Sbellard { 88585571bc7Sbellard if(v&0x01) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT1]); 88685571bc7Sbellard else OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1]); 88785571bc7Sbellard } 88885571bc7Sbellard } 88985571bc7Sbellard } 89085571bc7Sbellard return; 89185571bc7Sbellard } 89285571bc7Sbellard /* keyon,block,fnum */ 89385571bc7Sbellard if( (r&0x0f) > 8) return; 89485571bc7Sbellard CH = &OPL->P_CH[r&0x0f]; 89585571bc7Sbellard if(!(r&0x10)) 89685571bc7Sbellard { /* a0-a8 */ 89785571bc7Sbellard block_fnum = (CH->block_fnum&0x1f00) | v; 89885571bc7Sbellard } 89985571bc7Sbellard else 90085571bc7Sbellard { /* b0-b8 */ 90185571bc7Sbellard int keyon = (v>>5)&1; 90285571bc7Sbellard block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff); 90385571bc7Sbellard if(CH->keyon != keyon) 90485571bc7Sbellard { 90585571bc7Sbellard if( (CH->keyon=keyon) ) 90685571bc7Sbellard { 90785571bc7Sbellard CH->op1_out[0] = CH->op1_out[1] = 0; 90885571bc7Sbellard OPL_KEYON(&CH->SLOT[SLOT1]); 90985571bc7Sbellard OPL_KEYON(&CH->SLOT[SLOT2]); 91085571bc7Sbellard } 91185571bc7Sbellard else 91285571bc7Sbellard { 91385571bc7Sbellard OPL_KEYOFF(&CH->SLOT[SLOT1]); 91485571bc7Sbellard OPL_KEYOFF(&CH->SLOT[SLOT2]); 91585571bc7Sbellard } 91685571bc7Sbellard } 91785571bc7Sbellard } 91885571bc7Sbellard /* update */ 91985571bc7Sbellard if(CH->block_fnum != block_fnum) 92085571bc7Sbellard { 92185571bc7Sbellard int blockRv = 7-(block_fnum>>10); 92285571bc7Sbellard int fnum = block_fnum&0x3ff; 92385571bc7Sbellard CH->block_fnum = block_fnum; 92485571bc7Sbellard 92585571bc7Sbellard CH->ksl_base = KSL_TABLE[block_fnum>>6]; 92685571bc7Sbellard CH->fc = OPL->FN_TABLE[fnum]>>blockRv; 92785571bc7Sbellard CH->kcode = CH->block_fnum>>9; 92885571bc7Sbellard if( (OPL->mode&0x40) && CH->block_fnum&0x100) CH->kcode |=1; 92985571bc7Sbellard CALC_FCSLOT(CH,&CH->SLOT[SLOT1]); 93085571bc7Sbellard CALC_FCSLOT(CH,&CH->SLOT[SLOT2]); 93185571bc7Sbellard } 93285571bc7Sbellard return; 93385571bc7Sbellard case 0xc0: 93485571bc7Sbellard /* FB,C */ 93585571bc7Sbellard if( (r&0x0f) > 8) return; 93685571bc7Sbellard CH = &OPL->P_CH[r&0x0f]; 93785571bc7Sbellard { 93885571bc7Sbellard int feedback = (v>>1)&7; 93985571bc7Sbellard CH->FB = feedback ? (8+1) - feedback : 0; 94085571bc7Sbellard CH->CON = v&1; 941c11e80e2SStefan Weil set_algorithm(CH); 94285571bc7Sbellard } 94385571bc7Sbellard return; 94485571bc7Sbellard case 0xe0: /* wave type */ 94585571bc7Sbellard slot = slot_array[r&0x1f]; 94685571bc7Sbellard if(slot == -1) return; 94785571bc7Sbellard CH = &OPL->P_CH[slot/2]; 94885571bc7Sbellard if(OPL->wavesel) 94985571bc7Sbellard { 95085571bc7Sbellard /* LOG(LOG_INF,("OPL SLOT %d wave select %d\n",slot,v&3)); */ 95185571bc7Sbellard CH->SLOT[slot&1].wavetable = &SIN_TABLE[(v&0x03)*SIN_ENT]; 95285571bc7Sbellard } 95385571bc7Sbellard return; 95485571bc7Sbellard } 95585571bc7Sbellard } 95685571bc7Sbellard 95785571bc7Sbellard /* lock/unlock for common table */ 95885571bc7Sbellard static int OPL_LockTable(void) 95985571bc7Sbellard { 96085571bc7Sbellard num_lock++; 96185571bc7Sbellard if(num_lock>1) return 0; 96285571bc7Sbellard /* first time */ 96385571bc7Sbellard cur_chip = NULL; 96485571bc7Sbellard /* allocate total level table (128kb space) */ 96585571bc7Sbellard if( !OPLOpenTable() ) 96685571bc7Sbellard { 96785571bc7Sbellard num_lock--; 96885571bc7Sbellard return -1; 96985571bc7Sbellard } 97085571bc7Sbellard return 0; 97185571bc7Sbellard } 97285571bc7Sbellard 97385571bc7Sbellard static void OPL_UnLockTable(void) 97485571bc7Sbellard { 97585571bc7Sbellard if(num_lock) num_lock--; 97685571bc7Sbellard if(num_lock) return; 97785571bc7Sbellard /* last time */ 97885571bc7Sbellard cur_chip = NULL; 97985571bc7Sbellard OPLCloseTable(); 98085571bc7Sbellard } 98185571bc7Sbellard 98285571bc7Sbellard /*******************************************************************************/ 98385571bc7Sbellard /* YM3812 local section */ 98485571bc7Sbellard /*******************************************************************************/ 98585571bc7Sbellard 98685571bc7Sbellard /* ---------- update one of chip ----------- */ 9877bf10b1dSJuan Quintela void YM3812UpdateOne(FM_OPL *OPL, int16_t *buffer, int length) 98885571bc7Sbellard { 98985571bc7Sbellard int i; 99085571bc7Sbellard int data; 991*8ec734d0SJuan Quintela int16_t *buf = buffer; 9923795f180SJuan Quintela uint32_t amsCnt = OPL->amsCnt; 9933795f180SJuan Quintela uint32_t vibCnt = OPL->vibCnt; 9944a796e97SJuan Quintela uint8_t rhythm = OPL->rhythm&0x20; 99585571bc7Sbellard OPL_CH *CH,*R_CH; 99685571bc7Sbellard 99785571bc7Sbellard if( (void *)OPL != cur_chip ){ 99885571bc7Sbellard cur_chip = (void *)OPL; 99985571bc7Sbellard /* channel pointers */ 100085571bc7Sbellard S_CH = OPL->P_CH; 100185571bc7Sbellard E_CH = &S_CH[9]; 1002c11e80e2SStefan Weil /* rhythm slot */ 100385571bc7Sbellard SLOT7_1 = &S_CH[7].SLOT[SLOT1]; 100485571bc7Sbellard SLOT7_2 = &S_CH[7].SLOT[SLOT2]; 100585571bc7Sbellard SLOT8_1 = &S_CH[8].SLOT[SLOT1]; 100685571bc7Sbellard SLOT8_2 = &S_CH[8].SLOT[SLOT2]; 100785571bc7Sbellard /* LFO state */ 100885571bc7Sbellard amsIncr = OPL->amsIncr; 100985571bc7Sbellard vibIncr = OPL->vibIncr; 101085571bc7Sbellard ams_table = OPL->ams_table; 101185571bc7Sbellard vib_table = OPL->vib_table; 101285571bc7Sbellard } 1013c11e80e2SStefan Weil R_CH = rhythm ? &S_CH[6] : E_CH; 101485571bc7Sbellard for( i=0; i < length ; i++ ) 101585571bc7Sbellard { 101685571bc7Sbellard /* channel A channel B channel C */ 101785571bc7Sbellard /* LFO */ 101885571bc7Sbellard ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT]; 101985571bc7Sbellard vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT]; 102085571bc7Sbellard outd[0] = 0; 102185571bc7Sbellard /* FM part */ 102285571bc7Sbellard for(CH=S_CH ; CH < R_CH ; CH++) 102385571bc7Sbellard OPL_CALC_CH(CH); 102485571bc7Sbellard /* Rythn part */ 1025c11e80e2SStefan Weil if(rhythm) 102685571bc7Sbellard OPL_CALC_RH(S_CH); 102785571bc7Sbellard /* limit check */ 102885571bc7Sbellard data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT ); 102985571bc7Sbellard /* store to sound buffer */ 103085571bc7Sbellard buf[i] = data >> OPL_OUTSB; 103185571bc7Sbellard } 103285571bc7Sbellard 103385571bc7Sbellard OPL->amsCnt = amsCnt; 103485571bc7Sbellard OPL->vibCnt = vibCnt; 103585571bc7Sbellard #ifdef OPL_OUTPUT_LOG 103685571bc7Sbellard if(opl_dbg_fp) 103785571bc7Sbellard { 103885571bc7Sbellard for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++) 103985571bc7Sbellard if( opl_dbg_opl[opl_dbg_chip] == OPL) break; 104085571bc7Sbellard fprintf(opl_dbg_fp,"%c%c%c",0x20+opl_dbg_chip,length&0xff,length/256); 104185571bc7Sbellard } 104285571bc7Sbellard #endif 104385571bc7Sbellard } 104485571bc7Sbellard 104585571bc7Sbellard /* ---------- reset one of chip ---------- */ 104685571bc7Sbellard void OPLResetChip(FM_OPL *OPL) 104785571bc7Sbellard { 104885571bc7Sbellard int c,s; 104985571bc7Sbellard int i; 105085571bc7Sbellard 105185571bc7Sbellard /* reset chip */ 105285571bc7Sbellard OPL->mode = 0; /* normal mode */ 105385571bc7Sbellard OPL_STATUS_RESET(OPL,0x7f); 105485571bc7Sbellard /* reset with register write */ 105585571bc7Sbellard OPLWriteReg(OPL,0x01,0); /* wabesel disable */ 105685571bc7Sbellard OPLWriteReg(OPL,0x02,0); /* Timer1 */ 105785571bc7Sbellard OPLWriteReg(OPL,0x03,0); /* Timer2 */ 105885571bc7Sbellard OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */ 105985571bc7Sbellard for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0); 106067cc32ebSVeres Lajos /* reset operator parameter */ 106185571bc7Sbellard for( c = 0 ; c < OPL->max_ch ; c++ ) 106285571bc7Sbellard { 106385571bc7Sbellard OPL_CH *CH = &OPL->P_CH[c]; 106485571bc7Sbellard /* OPL->P_CH[c].PAN = OPN_CENTER; */ 106585571bc7Sbellard for(s = 0 ; s < 2 ; s++ ) 106685571bc7Sbellard { 106785571bc7Sbellard /* wave table */ 106885571bc7Sbellard CH->SLOT[s].wavetable = &SIN_TABLE[0]; 106985571bc7Sbellard /* CH->SLOT[s].evm = ENV_MOD_RR; */ 107085571bc7Sbellard CH->SLOT[s].evc = EG_OFF; 107185571bc7Sbellard CH->SLOT[s].eve = EG_OFF+1; 107285571bc7Sbellard CH->SLOT[s].evs = 0; 107385571bc7Sbellard } 107485571bc7Sbellard } 107585571bc7Sbellard } 107685571bc7Sbellard 107785571bc7Sbellard /* ---------- Create one of vietual YM3812 ---------- */ 107885571bc7Sbellard /* 'rate' is sampling rate and 'bufsiz' is the size of the */ 107985571bc7Sbellard FM_OPL *OPLCreate(int type, int clock, int rate) 108085571bc7Sbellard { 108185571bc7Sbellard char *ptr; 108285571bc7Sbellard FM_OPL *OPL; 108385571bc7Sbellard int state_size; 108485571bc7Sbellard int max_ch = 9; /* normaly 9 channels */ 108585571bc7Sbellard 108685571bc7Sbellard if( OPL_LockTable() ==-1) return NULL; 108785571bc7Sbellard /* allocate OPL state space */ 108885571bc7Sbellard state_size = sizeof(FM_OPL); 108985571bc7Sbellard state_size += sizeof(OPL_CH)*max_ch; 109085571bc7Sbellard /* allocate memory block */ 1091809c130cSaliguori ptr = malloc(state_size); 1092809c130cSaliguori if(ptr==NULL) return NULL; 109385571bc7Sbellard /* clear */ 109485571bc7Sbellard memset(ptr,0,state_size); 109585571bc7Sbellard OPL = (FM_OPL *)ptr; ptr+=sizeof(FM_OPL); 109685571bc7Sbellard OPL->P_CH = (OPL_CH *)ptr; ptr+=sizeof(OPL_CH)*max_ch; 109785571bc7Sbellard /* set channel state pointer */ 109885571bc7Sbellard OPL->type = type; 109985571bc7Sbellard OPL->clock = clock; 110085571bc7Sbellard OPL->rate = rate; 110185571bc7Sbellard OPL->max_ch = max_ch; 110285571bc7Sbellard /* init grobal tables */ 110331de8314SStefan Weil OPL_initialize(OPL); 110485571bc7Sbellard /* reset chip */ 110585571bc7Sbellard OPLResetChip(OPL); 110685571bc7Sbellard #ifdef OPL_OUTPUT_LOG 110785571bc7Sbellard if(!opl_dbg_fp) 110885571bc7Sbellard { 110985571bc7Sbellard opl_dbg_fp = fopen("opllog.opl","wb"); 111085571bc7Sbellard opl_dbg_maxchip = 0; 111185571bc7Sbellard } 111285571bc7Sbellard if(opl_dbg_fp) 111385571bc7Sbellard { 111485571bc7Sbellard opl_dbg_opl[opl_dbg_maxchip] = OPL; 111585571bc7Sbellard fprintf(opl_dbg_fp,"%c%c%c%c%c%c",0x00+opl_dbg_maxchip, 111685571bc7Sbellard type, 111785571bc7Sbellard clock&0xff, 111885571bc7Sbellard (clock/0x100)&0xff, 111985571bc7Sbellard (clock/0x10000)&0xff, 112085571bc7Sbellard (clock/0x1000000)&0xff); 112185571bc7Sbellard opl_dbg_maxchip++; 112285571bc7Sbellard } 112385571bc7Sbellard #endif 112485571bc7Sbellard return OPL; 112585571bc7Sbellard } 112685571bc7Sbellard 112785571bc7Sbellard /* ---------- Destroy one of vietual YM3812 ---------- */ 112885571bc7Sbellard void OPLDestroy(FM_OPL *OPL) 112985571bc7Sbellard { 113085571bc7Sbellard #ifdef OPL_OUTPUT_LOG 113185571bc7Sbellard if(opl_dbg_fp) 113285571bc7Sbellard { 113385571bc7Sbellard fclose(opl_dbg_fp); 113485571bc7Sbellard opl_dbg_fp = NULL; 113585571bc7Sbellard } 113685571bc7Sbellard #endif 113785571bc7Sbellard OPL_UnLockTable(); 113885571bc7Sbellard free(OPL); 113985571bc7Sbellard } 114085571bc7Sbellard 114185571bc7Sbellard /* ---------- Option handlers ---------- */ 114285571bc7Sbellard 114385571bc7Sbellard void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER TimerHandler,int channelOffset) 114485571bc7Sbellard { 114585571bc7Sbellard OPL->TimerHandler = TimerHandler; 114685571bc7Sbellard OPL->TimerParam = channelOffset; 114785571bc7Sbellard } 114885571bc7Sbellard void OPLSetIRQHandler(FM_OPL *OPL,OPL_IRQHANDLER IRQHandler,int param) 114985571bc7Sbellard { 115085571bc7Sbellard OPL->IRQHandler = IRQHandler; 115185571bc7Sbellard OPL->IRQParam = param; 115285571bc7Sbellard } 115385571bc7Sbellard void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,int param) 115485571bc7Sbellard { 115585571bc7Sbellard OPL->UpdateHandler = UpdateHandler; 115685571bc7Sbellard OPL->UpdateParam = param; 115785571bc7Sbellard } 115885571bc7Sbellard /* ---------- YM3812 I/O interface ---------- */ 115985571bc7Sbellard int OPLWrite(FM_OPL *OPL,int a,int v) 116085571bc7Sbellard { 116185571bc7Sbellard if( !(a&1) ) 116285571bc7Sbellard { /* address port */ 116385571bc7Sbellard OPL->address = v & 0xff; 116485571bc7Sbellard } 116585571bc7Sbellard else 116685571bc7Sbellard { /* data port */ 116785571bc7Sbellard if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0); 116885571bc7Sbellard #ifdef OPL_OUTPUT_LOG 116985571bc7Sbellard if(opl_dbg_fp) 117085571bc7Sbellard { 117185571bc7Sbellard for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++) 117285571bc7Sbellard if( opl_dbg_opl[opl_dbg_chip] == OPL) break; 117385571bc7Sbellard fprintf(opl_dbg_fp,"%c%c%c",0x10+opl_dbg_chip,OPL->address,v); 117485571bc7Sbellard } 117585571bc7Sbellard #endif 117685571bc7Sbellard OPLWriteReg(OPL,OPL->address,v); 117785571bc7Sbellard } 117885571bc7Sbellard return OPL->status>>7; 117985571bc7Sbellard } 118085571bc7Sbellard 118185571bc7Sbellard unsigned char OPLRead(FM_OPL *OPL,int a) 118285571bc7Sbellard { 118385571bc7Sbellard if( !(a&1) ) 118485571bc7Sbellard { /* status port */ 118585571bc7Sbellard return OPL->status & (OPL->statusmask|0x80); 118685571bc7Sbellard } 118785571bc7Sbellard /* data port */ 118885571bc7Sbellard switch(OPL->address) 118985571bc7Sbellard { 119085571bc7Sbellard case 0x05: /* KeyBoard IN */ 119185571bc7Sbellard if(OPL->type&OPL_TYPE_KEYBOARD) 119285571bc7Sbellard { 119385571bc7Sbellard if(OPL->keyboardhandler_r) 119485571bc7Sbellard return OPL->keyboardhandler_r(OPL->keyboard_param); 1195c973a36dSmalc else { 119685571bc7Sbellard LOG(LOG_WAR,("OPL:read unmapped KEYBOARD port\n")); 119785571bc7Sbellard } 1198c973a36dSmalc } 119985571bc7Sbellard return 0; 120085571bc7Sbellard #if 0 120185571bc7Sbellard case 0x0f: /* ADPCM-DATA */ 120285571bc7Sbellard return 0; 120385571bc7Sbellard #endif 120485571bc7Sbellard case 0x19: /* I/O DATA */ 120585571bc7Sbellard if(OPL->type&OPL_TYPE_IO) 120685571bc7Sbellard { 120785571bc7Sbellard if(OPL->porthandler_r) 120885571bc7Sbellard return OPL->porthandler_r(OPL->port_param); 1209c973a36dSmalc else { 121085571bc7Sbellard LOG(LOG_WAR,("OPL:read unmapped I/O port\n")); 121185571bc7Sbellard } 1212c973a36dSmalc } 121385571bc7Sbellard return 0; 121485571bc7Sbellard case 0x1a: /* PCM-DATA */ 121585571bc7Sbellard return 0; 121685571bc7Sbellard } 121785571bc7Sbellard return 0; 121885571bc7Sbellard } 121985571bc7Sbellard 122085571bc7Sbellard int OPLTimerOver(FM_OPL *OPL,int c) 122185571bc7Sbellard { 122285571bc7Sbellard if( c ) 122385571bc7Sbellard { /* Timer B */ 122485571bc7Sbellard OPL_STATUS_SET(OPL,0x20); 122585571bc7Sbellard } 122685571bc7Sbellard else 122785571bc7Sbellard { /* Timer A */ 122885571bc7Sbellard OPL_STATUS_SET(OPL,0x40); 122966a0a2cbSDong Xu Wang /* CSM mode key,TL control */ 123085571bc7Sbellard if( OPL->mode & 0x80 ) 123185571bc7Sbellard { /* CSM mode total level latch and auto key on */ 123285571bc7Sbellard int ch; 123385571bc7Sbellard if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0); 123485571bc7Sbellard for(ch=0;ch<9;ch++) 123585571bc7Sbellard CSMKeyControll( &OPL->P_CH[ch] ); 123685571bc7Sbellard } 123785571bc7Sbellard } 123885571bc7Sbellard /* reload timer */ 123985571bc7Sbellard if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+c,(double)OPL->T[c]*OPL->TimerBase); 124085571bc7Sbellard return OPL->status>>7; 124185571bc7Sbellard } 1242