185571bc7Sbellard /* 285571bc7Sbellard ** 385571bc7Sbellard ** File: fmopl.c -- software implementation of FM sound generator 485571bc7Sbellard ** 585571bc7Sbellard ** Copyright (C) 1999,2000 Tatsuyuki Satoh , MultiArcadeMachineEmurator development 685571bc7Sbellard ** 785571bc7Sbellard ** Version 0.37a 885571bc7Sbellard ** 985571bc7Sbellard */ 1085571bc7Sbellard 1185571bc7Sbellard /* 1285571bc7Sbellard preliminary : 1385571bc7Sbellard Problem : 1485571bc7Sbellard note: 1585571bc7Sbellard */ 1685571bc7Sbellard 1785571bc7Sbellard /* This version of fmopl.c is a fork of the MAME one, relicensed under the LGPL. 1885571bc7Sbellard * 1985571bc7Sbellard * This library is free software; you can redistribute it and/or 2085571bc7Sbellard * modify it under the terms of the GNU Lesser General Public 2185571bc7Sbellard * License as published by the Free Software Foundation; either 2285571bc7Sbellard * version 2.1 of the License, or (at your option) any later version. 2385571bc7Sbellard * 2485571bc7Sbellard * This library is distributed in the hope that it will be useful, 2585571bc7Sbellard * but WITHOUT ANY WARRANTY; without even the implied warranty of 2685571bc7Sbellard * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 2785571bc7Sbellard * Lesser General Public License for more details. 2885571bc7Sbellard * 2985571bc7Sbellard * You should have received a copy of the GNU Lesser General Public 308167ee88SBlue Swirl * License along with this library; if not, see <http://www.gnu.org/licenses/>. 3185571bc7Sbellard */ 3285571bc7Sbellard 336086a565SPeter Maydell #include "qemu/osdep.h" 3485571bc7Sbellard #include <math.h> 3585571bc7Sbellard //#include "driver.h" /* use M.A.M.E. */ 3647b43a1fSPaolo Bonzini #include "fmopl.h" 3785571bc7Sbellard #ifndef PI 3885571bc7Sbellard #define PI 3.14159265358979323846 3985571bc7Sbellard #endif 4085571bc7Sbellard 4185571bc7Sbellard /* -------------------- for debug --------------------- */ 4285571bc7Sbellard /* #define OPL_OUTPUT_LOG */ 4385571bc7Sbellard #ifdef OPL_OUTPUT_LOG 4485571bc7Sbellard static FILE *opl_dbg_fp = NULL; 4585571bc7Sbellard static FM_OPL *opl_dbg_opl[16]; 4685571bc7Sbellard static int opl_dbg_maxchip,opl_dbg_chip; 4785571bc7Sbellard #endif 4885571bc7Sbellard 4985571bc7Sbellard /* -------------------- preliminary define section --------------------- */ 5085571bc7Sbellard /* attack/decay rate time rate */ 5185571bc7Sbellard #define OPL_ARRATE 141280 /* RATE 4 = 2826.24ms @ 3.6MHz */ 5285571bc7Sbellard #define OPL_DRRATE 1956000 /* RATE 4 = 39280.64ms @ 3.6MHz */ 5385571bc7Sbellard 5485571bc7Sbellard #define DELTAT_MIXING_LEVEL (1) /* DELTA-T ADPCM MIXING LEVEL */ 5585571bc7Sbellard 5685571bc7Sbellard #define FREQ_BITS 24 /* frequency turn */ 5785571bc7Sbellard 5885571bc7Sbellard /* counter bits = 20 , octerve 7 */ 5985571bc7Sbellard #define FREQ_RATE (1<<(FREQ_BITS-20)) 6085571bc7Sbellard #define TL_BITS (FREQ_BITS+2) 6185571bc7Sbellard 6285571bc7Sbellard /* final output shift , limit minimum and maximum */ 6385571bc7Sbellard #define OPL_OUTSB (TL_BITS+3-16) /* OPL output final shift 16bit */ 6485571bc7Sbellard #define OPL_MAXOUT (0x7fff<<OPL_OUTSB) 6585571bc7Sbellard #define OPL_MINOUT (-0x8000<<OPL_OUTSB) 6685571bc7Sbellard 6785571bc7Sbellard /* -------------------- quality selection --------------------- */ 6885571bc7Sbellard 6985571bc7Sbellard /* sinwave entries */ 7085571bc7Sbellard /* used static memory = SIN_ENT * 4 (byte) */ 7185571bc7Sbellard #define SIN_ENT 2048 7285571bc7Sbellard 7385571bc7Sbellard /* output level entries (envelope,sinwave) */ 7485571bc7Sbellard /* envelope counter lower bits */ 7585571bc7Sbellard #define ENV_BITS 16 7685571bc7Sbellard /* envelope output entries */ 7785571bc7Sbellard #define EG_ENT 4096 7885571bc7Sbellard /* used dynamic memory = EG_ENT*4*4(byte)or EG_ENT*6*4(byte) */ 7985571bc7Sbellard /* used static memory = EG_ENT*4 (byte) */ 8085571bc7Sbellard 8185571bc7Sbellard #define EG_OFF ((2*EG_ENT)<<ENV_BITS) /* OFF */ 8285571bc7Sbellard #define EG_DED EG_OFF 8385571bc7Sbellard #define EG_DST (EG_ENT<<ENV_BITS) /* DECAY START */ 8485571bc7Sbellard #define EG_AED EG_DST 8585571bc7Sbellard #define EG_AST 0 /* ATTACK START */ 8685571bc7Sbellard 8785571bc7Sbellard #define EG_STEP (96.0/EG_ENT) /* OPL is 0.1875 dB step */ 8885571bc7Sbellard 8985571bc7Sbellard /* LFO table entries */ 9085571bc7Sbellard #define VIB_ENT 512 9185571bc7Sbellard #define VIB_SHIFT (32-9) 9285571bc7Sbellard #define AMS_ENT 512 9385571bc7Sbellard #define AMS_SHIFT (32-9) 9485571bc7Sbellard 9585571bc7Sbellard #define VIB_RATE 256 9685571bc7Sbellard 9785571bc7Sbellard /* -------------------- local defines , macros --------------------- */ 9885571bc7Sbellard 9985571bc7Sbellard /* register number to channel number , slot offset */ 10085571bc7Sbellard #define SLOT1 0 10185571bc7Sbellard #define SLOT2 1 10285571bc7Sbellard 10385571bc7Sbellard /* envelope phase */ 10485571bc7Sbellard #define ENV_MOD_RR 0x00 10585571bc7Sbellard #define ENV_MOD_DR 0x01 10685571bc7Sbellard #define ENV_MOD_AR 0x02 10785571bc7Sbellard 10885571bc7Sbellard /* -------------------- tables --------------------- */ 10985571bc7Sbellard static const int slot_array[32]= 11085571bc7Sbellard { 11185571bc7Sbellard 0, 2, 4, 1, 3, 5,-1,-1, 11285571bc7Sbellard 6, 8,10, 7, 9,11,-1,-1, 11385571bc7Sbellard 12,14,16,13,15,17,-1,-1, 11485571bc7Sbellard -1,-1,-1,-1,-1,-1,-1,-1 11585571bc7Sbellard }; 11685571bc7Sbellard 11785571bc7Sbellard /* key scale level */ 11885571bc7Sbellard /* table is 3dB/OCT , DV converts this in TL step at 6dB/OCT */ 11985571bc7Sbellard #define DV (EG_STEP/2) 1203795f180SJuan Quintela static const uint32_t KSL_TABLE[8*16]= 12185571bc7Sbellard { 12285571bc7Sbellard /* OCT 0 */ 12385571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 12485571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 12585571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 12685571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 12785571bc7Sbellard /* OCT 1 */ 12885571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 12985571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 13085571bc7Sbellard 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV, 13185571bc7Sbellard 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV, 13285571bc7Sbellard /* OCT 2 */ 13385571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, 13485571bc7Sbellard 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV, 13585571bc7Sbellard 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV, 13685571bc7Sbellard 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV, 13785571bc7Sbellard /* OCT 3 */ 13885571bc7Sbellard 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV, 13985571bc7Sbellard 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV, 14085571bc7Sbellard 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV, 14185571bc7Sbellard 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV, 14285571bc7Sbellard /* OCT 4 */ 14385571bc7Sbellard 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV, 14485571bc7Sbellard 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV, 14585571bc7Sbellard 9.000/DV, 9.750/DV,10.125/DV,10.500/DV, 14685571bc7Sbellard 10.875/DV,11.250/DV,11.625/DV,12.000/DV, 14785571bc7Sbellard /* OCT 5 */ 14885571bc7Sbellard 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV, 14985571bc7Sbellard 9.000/DV,10.125/DV,10.875/DV,11.625/DV, 15085571bc7Sbellard 12.000/DV,12.750/DV,13.125/DV,13.500/DV, 15185571bc7Sbellard 13.875/DV,14.250/DV,14.625/DV,15.000/DV, 15285571bc7Sbellard /* OCT 6 */ 15385571bc7Sbellard 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV, 15485571bc7Sbellard 12.000/DV,13.125/DV,13.875/DV,14.625/DV, 15585571bc7Sbellard 15.000/DV,15.750/DV,16.125/DV,16.500/DV, 15685571bc7Sbellard 16.875/DV,17.250/DV,17.625/DV,18.000/DV, 15785571bc7Sbellard /* OCT 7 */ 15885571bc7Sbellard 0.000/DV, 9.000/DV,12.000/DV,13.875/DV, 15985571bc7Sbellard 15.000/DV,16.125/DV,16.875/DV,17.625/DV, 16085571bc7Sbellard 18.000/DV,18.750/DV,19.125/DV,19.500/DV, 16185571bc7Sbellard 19.875/DV,20.250/DV,20.625/DV,21.000/DV 16285571bc7Sbellard }; 16385571bc7Sbellard #undef DV 16485571bc7Sbellard 16585571bc7Sbellard /* sustain lebel table (3db per step) */ 16685571bc7Sbellard /* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/ 16785571bc7Sbellard #define SC(db) (db*((3/EG_STEP)*(1<<ENV_BITS)))+EG_DST 1687f643fb5SJuan Quintela static const int32_t SL_TABLE[16]={ 16985571bc7Sbellard SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7), 17085571bc7Sbellard SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31) 17185571bc7Sbellard }; 17285571bc7Sbellard #undef SC 17385571bc7Sbellard 17485571bc7Sbellard #define TL_MAX (EG_ENT*2) /* limit(tl + ksr + envelope) + sinwave */ 17585571bc7Sbellard /* TotalLevel : 48 24 12 6 3 1.5 0.75 (dB) */ 17685571bc7Sbellard /* TL_TABLE[ 0 to TL_MAX ] : plus section */ 17785571bc7Sbellard /* TL_TABLE[ TL_MAX to TL_MAX+TL_MAX-1 ] : minus section */ 1787f643fb5SJuan Quintela static int32_t *TL_TABLE; 17985571bc7Sbellard 18085571bc7Sbellard /* pointers to TL_TABLE with sinwave output offset */ 1817f643fb5SJuan Quintela static int32_t **SIN_TABLE; 18285571bc7Sbellard 18385571bc7Sbellard /* LFO table */ 1847f643fb5SJuan Quintela static int32_t *AMS_TABLE; 1857f643fb5SJuan Quintela static int32_t *VIB_TABLE; 18685571bc7Sbellard 18785571bc7Sbellard /* envelope output curve table */ 18885571bc7Sbellard /* attack + decay + OFF */ 189*2eea51bdSPhilippe Mathieu-Daudé static int32_t *ENV_CURVE; 19085571bc7Sbellard 19185571bc7Sbellard /* multiple table */ 19285571bc7Sbellard #define ML 2 1933795f180SJuan Quintela static const uint32_t MUL_TABLE[16]= { 19485571bc7Sbellard /* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15 */ 19585571bc7Sbellard 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML, 19685571bc7Sbellard 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML 19785571bc7Sbellard }; 19885571bc7Sbellard #undef ML 19985571bc7Sbellard 20085571bc7Sbellard /* dummy attack / decay rate ( when rate == 0 ) */ 2017f643fb5SJuan Quintela static int32_t RATE_0[16]= 20285571bc7Sbellard {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; 20385571bc7Sbellard 20485571bc7Sbellard /* -------------------- static state --------------------- */ 20585571bc7Sbellard 20685571bc7Sbellard /* lock level of common table */ 20785571bc7Sbellard static int num_lock = 0; 20885571bc7Sbellard 20985571bc7Sbellard /* work table */ 21085571bc7Sbellard static void *cur_chip = NULL; /* current chip point */ 21185571bc7Sbellard /* currenct chip state */ 21285571bc7Sbellard /* static OPLSAMPLE *bufL,*bufR; */ 21385571bc7Sbellard static OPL_CH *S_CH; 21485571bc7Sbellard static OPL_CH *E_CH; 21569df1c3cSStefan Weil static OPL_SLOT *SLOT7_1, *SLOT7_2, *SLOT8_1, *SLOT8_2; 21685571bc7Sbellard 2177f643fb5SJuan Quintela static int32_t outd[1]; 2187f643fb5SJuan Quintela static int32_t ams; 2197f643fb5SJuan Quintela static int32_t vib; 2207f643fb5SJuan Quintela static int32_t *ams_table; 2217f643fb5SJuan Quintela static int32_t *vib_table; 2227f643fb5SJuan Quintela static int32_t amsIncr; 2237f643fb5SJuan Quintela static int32_t vibIncr; 2247f643fb5SJuan Quintela static int32_t feedback2; /* connect for SLOT 2 */ 22585571bc7Sbellard 22685571bc7Sbellard /* log output level */ 22785571bc7Sbellard #define LOG_ERR 3 /* ERROR */ 22885571bc7Sbellard #define LOG_WAR 2 /* WARNING */ 22985571bc7Sbellard #define LOG_INF 1 /* INFORMATION */ 23085571bc7Sbellard 23185571bc7Sbellard //#define LOG_LEVEL LOG_INF 23285571bc7Sbellard #define LOG_LEVEL LOG_ERR 23385571bc7Sbellard 23485571bc7Sbellard //#define LOG(n,x) if( (n)>=LOG_LEVEL ) logerror x 23585571bc7Sbellard #define LOG(n,x) 23685571bc7Sbellard 23785571bc7Sbellard /* --------------------- subroutines --------------------- */ 23885571bc7Sbellard 23937f6be97SLuiz Capitulino static inline int Limit( int val, int max, int min ) { 24085571bc7Sbellard if ( val > max ) 24185571bc7Sbellard val = max; 24285571bc7Sbellard else if ( val < min ) 24385571bc7Sbellard val = min; 24485571bc7Sbellard 24585571bc7Sbellard return val; 24685571bc7Sbellard } 24785571bc7Sbellard 24885571bc7Sbellard /* status set and IRQ handling */ 24937f6be97SLuiz Capitulino static inline void OPL_STATUS_SET(FM_OPL *OPL,int flag) 25085571bc7Sbellard { 25185571bc7Sbellard /* set status flag */ 25285571bc7Sbellard OPL->status |= flag; 25385571bc7Sbellard if(!(OPL->status & 0x80)) 25485571bc7Sbellard { 25585571bc7Sbellard if(OPL->status & OPL->statusmask) 25685571bc7Sbellard { /* IRQ on */ 25785571bc7Sbellard OPL->status |= 0x80; 25885571bc7Sbellard } 25985571bc7Sbellard } 26085571bc7Sbellard } 26185571bc7Sbellard 26285571bc7Sbellard /* status reset and IRQ handling */ 26337f6be97SLuiz Capitulino static inline void OPL_STATUS_RESET(FM_OPL *OPL,int flag) 26485571bc7Sbellard { 26585571bc7Sbellard /* reset status flag */ 26685571bc7Sbellard OPL->status &=~flag; 26785571bc7Sbellard if((OPL->status & 0x80)) 26885571bc7Sbellard { 26985571bc7Sbellard if (!(OPL->status & OPL->statusmask) ) 27085571bc7Sbellard { 27185571bc7Sbellard OPL->status &= 0x7f; 27285571bc7Sbellard } 27385571bc7Sbellard } 27485571bc7Sbellard } 27585571bc7Sbellard 27685571bc7Sbellard /* IRQ mask set */ 27737f6be97SLuiz Capitulino static inline void OPL_STATUSMASK_SET(FM_OPL *OPL,int flag) 27885571bc7Sbellard { 27985571bc7Sbellard OPL->statusmask = flag; 28085571bc7Sbellard /* IRQ handling check */ 28185571bc7Sbellard OPL_STATUS_SET(OPL,0); 28285571bc7Sbellard OPL_STATUS_RESET(OPL,0); 28385571bc7Sbellard } 28485571bc7Sbellard 28585571bc7Sbellard /* ----- key on ----- */ 28637f6be97SLuiz Capitulino static inline void OPL_KEYON(OPL_SLOT *SLOT) 28785571bc7Sbellard { 28885571bc7Sbellard /* sin wave restart */ 28985571bc7Sbellard SLOT->Cnt = 0; 29085571bc7Sbellard /* set attack */ 29185571bc7Sbellard SLOT->evm = ENV_MOD_AR; 29285571bc7Sbellard SLOT->evs = SLOT->evsa; 29385571bc7Sbellard SLOT->evc = EG_AST; 29485571bc7Sbellard SLOT->eve = EG_AED; 29585571bc7Sbellard } 29685571bc7Sbellard /* ----- key off ----- */ 29737f6be97SLuiz Capitulino static inline void OPL_KEYOFF(OPL_SLOT *SLOT) 29885571bc7Sbellard { 29985571bc7Sbellard if( SLOT->evm > ENV_MOD_RR) 30085571bc7Sbellard { 30185571bc7Sbellard /* set envelope counter from envleope output */ 30285571bc7Sbellard SLOT->evm = ENV_MOD_RR; 30385571bc7Sbellard if( !(SLOT->evc&EG_DST) ) 30485571bc7Sbellard //SLOT->evc = (ENV_CURVE[SLOT->evc>>ENV_BITS]<<ENV_BITS) + EG_DST; 30585571bc7Sbellard SLOT->evc = EG_DST; 30685571bc7Sbellard SLOT->eve = EG_DED; 30785571bc7Sbellard SLOT->evs = SLOT->evsr; 30885571bc7Sbellard } 30985571bc7Sbellard } 31085571bc7Sbellard 31185571bc7Sbellard /* ---------- calcrate Envelope Generator & Phase Generator ---------- */ 31285571bc7Sbellard /* return : envelope output */ 3133795f180SJuan Quintela static inline uint32_t OPL_CALC_SLOT( OPL_SLOT *SLOT ) 31485571bc7Sbellard { 31585571bc7Sbellard /* calcrate envelope generator */ 31685571bc7Sbellard if( (SLOT->evc+=SLOT->evs) >= SLOT->eve ) 31785571bc7Sbellard { 31885571bc7Sbellard switch( SLOT->evm ){ 31985571bc7Sbellard case ENV_MOD_AR: /* ATTACK -> DECAY1 */ 32085571bc7Sbellard /* next DR */ 32185571bc7Sbellard SLOT->evm = ENV_MOD_DR; 32285571bc7Sbellard SLOT->evc = EG_DST; 32385571bc7Sbellard SLOT->eve = SLOT->SL; 32485571bc7Sbellard SLOT->evs = SLOT->evsd; 32585571bc7Sbellard break; 32685571bc7Sbellard case ENV_MOD_DR: /* DECAY -> SL or RR */ 32785571bc7Sbellard SLOT->evc = SLOT->SL; 32885571bc7Sbellard SLOT->eve = EG_DED; 32985571bc7Sbellard if(SLOT->eg_typ) 33085571bc7Sbellard { 33185571bc7Sbellard SLOT->evs = 0; 33285571bc7Sbellard } 33385571bc7Sbellard else 33485571bc7Sbellard { 33585571bc7Sbellard SLOT->evm = ENV_MOD_RR; 33685571bc7Sbellard SLOT->evs = SLOT->evsr; 33785571bc7Sbellard } 33885571bc7Sbellard break; 33985571bc7Sbellard case ENV_MOD_RR: /* RR -> OFF */ 34085571bc7Sbellard SLOT->evc = EG_OFF; 34185571bc7Sbellard SLOT->eve = EG_OFF+1; 34285571bc7Sbellard SLOT->evs = 0; 34385571bc7Sbellard break; 34485571bc7Sbellard } 34585571bc7Sbellard } 34685571bc7Sbellard /* calcrate envelope */ 34785571bc7Sbellard return SLOT->TLL+ENV_CURVE[SLOT->evc>>ENV_BITS]+(SLOT->ams ? ams : 0); 34885571bc7Sbellard } 34985571bc7Sbellard 350c11e80e2SStefan Weil /* set algorithm connection */ 351c11e80e2SStefan Weil static void set_algorithm( OPL_CH *CH) 35285571bc7Sbellard { 3537f643fb5SJuan Quintela int32_t *carrier = &outd[0]; 35485571bc7Sbellard CH->connect1 = CH->CON ? carrier : &feedback2; 35585571bc7Sbellard CH->connect2 = carrier; 35685571bc7Sbellard } 35785571bc7Sbellard 35885571bc7Sbellard /* ---------- frequency counter for operater update ---------- */ 35937f6be97SLuiz Capitulino static inline void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT) 36085571bc7Sbellard { 36185571bc7Sbellard int ksr; 36285571bc7Sbellard 36385571bc7Sbellard /* frequency step counter */ 36485571bc7Sbellard SLOT->Incr = CH->fc * SLOT->mul; 36585571bc7Sbellard ksr = CH->kcode >> SLOT->KSR; 36685571bc7Sbellard 36785571bc7Sbellard if( SLOT->ksr != ksr ) 36885571bc7Sbellard { 36985571bc7Sbellard SLOT->ksr = ksr; 37085571bc7Sbellard /* attack , decay rate recalcration */ 37185571bc7Sbellard SLOT->evsa = SLOT->AR[ksr]; 37285571bc7Sbellard SLOT->evsd = SLOT->DR[ksr]; 37385571bc7Sbellard SLOT->evsr = SLOT->RR[ksr]; 37485571bc7Sbellard } 37585571bc7Sbellard SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); 37685571bc7Sbellard } 37785571bc7Sbellard 37885571bc7Sbellard /* set multi,am,vib,EG-TYP,KSR,mul */ 37937f6be97SLuiz Capitulino static inline void set_mul(FM_OPL *OPL,int slot,int v) 38085571bc7Sbellard { 38185571bc7Sbellard OPL_CH *CH = &OPL->P_CH[slot/2]; 38285571bc7Sbellard OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 38385571bc7Sbellard 38485571bc7Sbellard SLOT->mul = MUL_TABLE[v&0x0f]; 38585571bc7Sbellard SLOT->KSR = (v&0x10) ? 0 : 2; 38685571bc7Sbellard SLOT->eg_typ = (v&0x20)>>5; 38785571bc7Sbellard SLOT->vib = (v&0x40); 38885571bc7Sbellard SLOT->ams = (v&0x80); 38985571bc7Sbellard CALC_FCSLOT(CH,SLOT); 39085571bc7Sbellard } 39185571bc7Sbellard 39285571bc7Sbellard /* set ksl & tl */ 39337f6be97SLuiz Capitulino static inline void set_ksl_tl(FM_OPL *OPL,int slot,int v) 39485571bc7Sbellard { 39585571bc7Sbellard OPL_CH *CH = &OPL->P_CH[slot/2]; 39685571bc7Sbellard OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 39785571bc7Sbellard int ksl = v>>6; /* 0 / 1.5 / 3 / 6 db/OCT */ 39885571bc7Sbellard 39985571bc7Sbellard SLOT->ksl = ksl ? 3-ksl : 31; 40085571bc7Sbellard SLOT->TL = (v&0x3f)*(0.75/EG_STEP); /* 0.75db step */ 40185571bc7Sbellard 40285571bc7Sbellard if( !(OPL->mode&0x80) ) 40385571bc7Sbellard { /* not CSM latch total level */ 40485571bc7Sbellard SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); 40585571bc7Sbellard } 40685571bc7Sbellard } 40785571bc7Sbellard 40885571bc7Sbellard /* set attack rate & decay rate */ 40937f6be97SLuiz Capitulino static inline void set_ar_dr(FM_OPL *OPL,int slot,int v) 41085571bc7Sbellard { 41185571bc7Sbellard OPL_CH *CH = &OPL->P_CH[slot/2]; 41285571bc7Sbellard OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 41385571bc7Sbellard int ar = v>>4; 41485571bc7Sbellard int dr = v&0x0f; 41585571bc7Sbellard 41685571bc7Sbellard SLOT->AR = ar ? &OPL->AR_TABLE[ar<<2] : RATE_0; 41785571bc7Sbellard SLOT->evsa = SLOT->AR[SLOT->ksr]; 41885571bc7Sbellard if( SLOT->evm == ENV_MOD_AR ) SLOT->evs = SLOT->evsa; 41985571bc7Sbellard 42085571bc7Sbellard SLOT->DR = dr ? &OPL->DR_TABLE[dr<<2] : RATE_0; 42185571bc7Sbellard SLOT->evsd = SLOT->DR[SLOT->ksr]; 42285571bc7Sbellard if( SLOT->evm == ENV_MOD_DR ) SLOT->evs = SLOT->evsd; 42385571bc7Sbellard } 42485571bc7Sbellard 42585571bc7Sbellard /* set sustain level & release rate */ 42637f6be97SLuiz Capitulino static inline void set_sl_rr(FM_OPL *OPL,int slot,int v) 42785571bc7Sbellard { 42885571bc7Sbellard OPL_CH *CH = &OPL->P_CH[slot/2]; 42985571bc7Sbellard OPL_SLOT *SLOT = &CH->SLOT[slot&1]; 43085571bc7Sbellard int sl = v>>4; 43185571bc7Sbellard int rr = v & 0x0f; 43285571bc7Sbellard 43385571bc7Sbellard SLOT->SL = SL_TABLE[sl]; 43485571bc7Sbellard if( SLOT->evm == ENV_MOD_DR ) SLOT->eve = SLOT->SL; 43585571bc7Sbellard SLOT->RR = &OPL->DR_TABLE[rr<<2]; 43685571bc7Sbellard SLOT->evsr = SLOT->RR[SLOT->ksr]; 43785571bc7Sbellard if( SLOT->evm == ENV_MOD_RR ) SLOT->evs = SLOT->evsr; 43885571bc7Sbellard } 43985571bc7Sbellard 44085571bc7Sbellard /* operator output calcrator */ 44185571bc7Sbellard #define OP_OUT(slot,env,con) slot->wavetable[((slot->Cnt+con)/(0x1000000/SIN_ENT))&(SIN_ENT-1)][env] 44285571bc7Sbellard /* ---------- calcrate one of channel ---------- */ 44337f6be97SLuiz Capitulino static inline void OPL_CALC_CH( OPL_CH *CH ) 44485571bc7Sbellard { 4453795f180SJuan Quintela uint32_t env_out; 44685571bc7Sbellard OPL_SLOT *SLOT; 44785571bc7Sbellard 44885571bc7Sbellard feedback2 = 0; 44985571bc7Sbellard /* SLOT 1 */ 45085571bc7Sbellard SLOT = &CH->SLOT[SLOT1]; 45185571bc7Sbellard env_out=OPL_CALC_SLOT(SLOT); 45285571bc7Sbellard if( env_out < EG_ENT-1 ) 45385571bc7Sbellard { 45485571bc7Sbellard /* PG */ 45585571bc7Sbellard if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE); 45685571bc7Sbellard else SLOT->Cnt += SLOT->Incr; 45785571bc7Sbellard /* connectoion */ 45885571bc7Sbellard if(CH->FB) 45985571bc7Sbellard { 46085571bc7Sbellard int feedback1 = (CH->op1_out[0]+CH->op1_out[1])>>CH->FB; 46185571bc7Sbellard CH->op1_out[1] = CH->op1_out[0]; 46285571bc7Sbellard *CH->connect1 += CH->op1_out[0] = OP_OUT(SLOT,env_out,feedback1); 46385571bc7Sbellard } 46485571bc7Sbellard else 46585571bc7Sbellard { 46685571bc7Sbellard *CH->connect1 += OP_OUT(SLOT,env_out,0); 46785571bc7Sbellard } 46885571bc7Sbellard }else 46985571bc7Sbellard { 47085571bc7Sbellard CH->op1_out[1] = CH->op1_out[0]; 47185571bc7Sbellard CH->op1_out[0] = 0; 47285571bc7Sbellard } 47385571bc7Sbellard /* SLOT 2 */ 47485571bc7Sbellard SLOT = &CH->SLOT[SLOT2]; 47585571bc7Sbellard env_out=OPL_CALC_SLOT(SLOT); 47685571bc7Sbellard if( env_out < EG_ENT-1 ) 47785571bc7Sbellard { 47885571bc7Sbellard /* PG */ 47985571bc7Sbellard if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE); 48085571bc7Sbellard else SLOT->Cnt += SLOT->Incr; 48185571bc7Sbellard /* connectoion */ 48285571bc7Sbellard outd[0] += OP_OUT(SLOT,env_out, feedback2); 48385571bc7Sbellard } 48485571bc7Sbellard } 48585571bc7Sbellard 486c11e80e2SStefan Weil /* ---------- calcrate rhythm block ---------- */ 48785571bc7Sbellard #define WHITE_NOISE_db 6.0 48837f6be97SLuiz Capitulino static inline void OPL_CALC_RH( OPL_CH *CH ) 48985571bc7Sbellard { 4903795f180SJuan Quintela uint32_t env_tam,env_sd,env_top,env_hh; 49185571bc7Sbellard int whitenoise = (rand()&1)*(WHITE_NOISE_db/EG_STEP); 4927f643fb5SJuan Quintela int32_t tone8; 49385571bc7Sbellard 49485571bc7Sbellard OPL_SLOT *SLOT; 49585571bc7Sbellard int env_out; 49685571bc7Sbellard 49785571bc7Sbellard /* BD : same as FM serial mode and output level is large */ 49885571bc7Sbellard feedback2 = 0; 49985571bc7Sbellard /* SLOT 1 */ 50085571bc7Sbellard SLOT = &CH[6].SLOT[SLOT1]; 50185571bc7Sbellard env_out=OPL_CALC_SLOT(SLOT); 50285571bc7Sbellard if( env_out < EG_ENT-1 ) 50385571bc7Sbellard { 50485571bc7Sbellard /* PG */ 50585571bc7Sbellard if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE); 50685571bc7Sbellard else SLOT->Cnt += SLOT->Incr; 50785571bc7Sbellard /* connectoion */ 50885571bc7Sbellard if(CH[6].FB) 50985571bc7Sbellard { 51085571bc7Sbellard int feedback1 = (CH[6].op1_out[0]+CH[6].op1_out[1])>>CH[6].FB; 51185571bc7Sbellard CH[6].op1_out[1] = CH[6].op1_out[0]; 51285571bc7Sbellard feedback2 = CH[6].op1_out[0] = OP_OUT(SLOT,env_out,feedback1); 51385571bc7Sbellard } 51485571bc7Sbellard else 51585571bc7Sbellard { 51685571bc7Sbellard feedback2 = OP_OUT(SLOT,env_out,0); 51785571bc7Sbellard } 51885571bc7Sbellard }else 51985571bc7Sbellard { 52085571bc7Sbellard feedback2 = 0; 52185571bc7Sbellard CH[6].op1_out[1] = CH[6].op1_out[0]; 52285571bc7Sbellard CH[6].op1_out[0] = 0; 52385571bc7Sbellard } 52485571bc7Sbellard /* SLOT 2 */ 52585571bc7Sbellard SLOT = &CH[6].SLOT[SLOT2]; 52685571bc7Sbellard env_out=OPL_CALC_SLOT(SLOT); 52785571bc7Sbellard if( env_out < EG_ENT-1 ) 52885571bc7Sbellard { 52985571bc7Sbellard /* PG */ 53085571bc7Sbellard if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE); 53185571bc7Sbellard else SLOT->Cnt += SLOT->Incr; 53285571bc7Sbellard /* connectoion */ 53385571bc7Sbellard outd[0] += OP_OUT(SLOT,env_out, feedback2)*2; 53485571bc7Sbellard } 53585571bc7Sbellard 53685571bc7Sbellard // SD (17) = mul14[fnum7] + white noise 53785571bc7Sbellard // TAM (15) = mul15[fnum8] 53885571bc7Sbellard // TOP (18) = fnum6(mul18[fnum8]+whitenoise) 53985571bc7Sbellard // HH (14) = fnum7(mul18[fnum8]+whitenoise) + white noise 54085571bc7Sbellard env_sd =OPL_CALC_SLOT(SLOT7_2) + whitenoise; 54185571bc7Sbellard env_tam=OPL_CALC_SLOT(SLOT8_1); 54285571bc7Sbellard env_top=OPL_CALC_SLOT(SLOT8_2); 54385571bc7Sbellard env_hh =OPL_CALC_SLOT(SLOT7_1) + whitenoise; 54485571bc7Sbellard 54585571bc7Sbellard /* PG */ 54685571bc7Sbellard if(SLOT7_1->vib) SLOT7_1->Cnt += (2*SLOT7_1->Incr*vib/VIB_RATE); 54785571bc7Sbellard else SLOT7_1->Cnt += 2*SLOT7_1->Incr; 54885571bc7Sbellard if(SLOT7_2->vib) SLOT7_2->Cnt += ((CH[7].fc*8)*vib/VIB_RATE); 54985571bc7Sbellard else SLOT7_2->Cnt += (CH[7].fc*8); 55085571bc7Sbellard if(SLOT8_1->vib) SLOT8_1->Cnt += (SLOT8_1->Incr*vib/VIB_RATE); 55185571bc7Sbellard else SLOT8_1->Cnt += SLOT8_1->Incr; 55285571bc7Sbellard if(SLOT8_2->vib) SLOT8_2->Cnt += ((CH[8].fc*48)*vib/VIB_RATE); 55385571bc7Sbellard else SLOT8_2->Cnt += (CH[8].fc*48); 55485571bc7Sbellard 55585571bc7Sbellard tone8 = OP_OUT(SLOT8_2,whitenoise,0 ); 55685571bc7Sbellard 55785571bc7Sbellard /* SD */ 55885571bc7Sbellard if( env_sd < EG_ENT-1 ) 55985571bc7Sbellard outd[0] += OP_OUT(SLOT7_1,env_sd, 0)*8; 56085571bc7Sbellard /* TAM */ 56185571bc7Sbellard if( env_tam < EG_ENT-1 ) 56285571bc7Sbellard outd[0] += OP_OUT(SLOT8_1,env_tam, 0)*2; 56385571bc7Sbellard /* TOP-CY */ 56485571bc7Sbellard if( env_top < EG_ENT-1 ) 56585571bc7Sbellard outd[0] += OP_OUT(SLOT7_2,env_top,tone8)*2; 56685571bc7Sbellard /* HH */ 56785571bc7Sbellard if( env_hh < EG_ENT-1 ) 56885571bc7Sbellard outd[0] += OP_OUT(SLOT7_2,env_hh,tone8)*2; 56985571bc7Sbellard } 57085571bc7Sbellard 57185571bc7Sbellard /* ----------- initialize time tabls ----------- */ 57285571bc7Sbellard static void init_timetables( FM_OPL *OPL , int ARRATE , int DRRATE ) 57385571bc7Sbellard { 57485571bc7Sbellard int i; 57585571bc7Sbellard double rate; 57685571bc7Sbellard 57785571bc7Sbellard /* make attack rate & decay rate tables */ 57885571bc7Sbellard for (i = 0;i < 4;i++) OPL->AR_TABLE[i] = OPL->DR_TABLE[i] = 0; 57985571bc7Sbellard for (i = 4;i <= 60;i++){ 58085571bc7Sbellard rate = OPL->freqbase; /* frequency rate */ 58185571bc7Sbellard if( i < 60 ) rate *= 1.0+(i&3)*0.25; /* b0-1 : x1 , x1.25 , x1.5 , x1.75 */ 58285571bc7Sbellard rate *= 1<<((i>>2)-1); /* b2-5 : shift bit */ 58385571bc7Sbellard rate *= (double)(EG_ENT<<ENV_BITS); 58485571bc7Sbellard OPL->AR_TABLE[i] = rate / ARRATE; 58585571bc7Sbellard OPL->DR_TABLE[i] = rate / DRRATE; 58685571bc7Sbellard } 587913895abSStefan Weil for (i = 60; i < ARRAY_SIZE(OPL->AR_TABLE); i++) 58885571bc7Sbellard { 58985571bc7Sbellard OPL->AR_TABLE[i] = EG_AED-1; 59085571bc7Sbellard OPL->DR_TABLE[i] = OPL->DR_TABLE[60]; 59185571bc7Sbellard } 59285571bc7Sbellard #if 0 59385571bc7Sbellard for (i = 0;i < 64 ;i++){ /* make for overflow area */ 59485571bc7Sbellard LOG(LOG_WAR, ("rate %2d , ar %f ms , dr %f ms\n", i, 59585571bc7Sbellard ((double)(EG_ENT<<ENV_BITS) / OPL->AR_TABLE[i]) * (1000.0 / OPL->rate), 59685571bc7Sbellard ((double)(EG_ENT<<ENV_BITS) / OPL->DR_TABLE[i]) * (1000.0 / OPL->rate) )); 59785571bc7Sbellard } 59885571bc7Sbellard #endif 59985571bc7Sbellard } 60085571bc7Sbellard 60185571bc7Sbellard /* ---------- generic table initialize ---------- */ 60285571bc7Sbellard static int OPLOpenTable( void ) 60385571bc7Sbellard { 60485571bc7Sbellard int s,t; 60585571bc7Sbellard double rate; 60685571bc7Sbellard int i,j; 60785571bc7Sbellard double pom; 60885571bc7Sbellard 60985571bc7Sbellard /* allocate dynamic tables */ 6107f643fb5SJuan Quintela if( (TL_TABLE = malloc(TL_MAX*2*sizeof(int32_t))) == NULL) 611809c130cSaliguori return 0; 6127f643fb5SJuan Quintela if( (SIN_TABLE = malloc(SIN_ENT*4 *sizeof(int32_t *))) == NULL) 613809c130cSaliguori { 614809c130cSaliguori free(TL_TABLE); 615809c130cSaliguori return 0; 616809c130cSaliguori } 6177f643fb5SJuan Quintela if( (AMS_TABLE = malloc(AMS_ENT*2 *sizeof(int32_t))) == NULL) 618809c130cSaliguori { 619809c130cSaliguori free(TL_TABLE); 620809c130cSaliguori free(SIN_TABLE); 621809c130cSaliguori return 0; 622809c130cSaliguori } 6237f643fb5SJuan Quintela if( (VIB_TABLE = malloc(VIB_ENT*2 *sizeof(int32_t))) == NULL) 624809c130cSaliguori { 625809c130cSaliguori free(TL_TABLE); 626809c130cSaliguori free(SIN_TABLE); 627809c130cSaliguori free(AMS_TABLE); 628809c130cSaliguori return 0; 629809c130cSaliguori } 63085571bc7Sbellard /* make total level table */ 63185571bc7Sbellard for (t = 0;t < EG_ENT-1 ;t++){ 63285571bc7Sbellard rate = ((1<<TL_BITS)-1)/pow(10,EG_STEP*t/20); /* dB -> voltage */ 63385571bc7Sbellard TL_TABLE[ t] = (int)rate; 63485571bc7Sbellard TL_TABLE[TL_MAX+t] = -TL_TABLE[t]; 63585571bc7Sbellard /* LOG(LOG_INF,("TotalLevel(%3d) = %x\n",t,TL_TABLE[t]));*/ 63685571bc7Sbellard } 63785571bc7Sbellard /* fill volume off area */ 63885571bc7Sbellard for ( t = EG_ENT-1; t < TL_MAX ;t++){ 63985571bc7Sbellard TL_TABLE[t] = TL_TABLE[TL_MAX+t] = 0; 64085571bc7Sbellard } 64185571bc7Sbellard 64285571bc7Sbellard /* make sinwave table (total level offet) */ 64385571bc7Sbellard /* degree 0 = degree 180 = off */ 64485571bc7Sbellard SIN_TABLE[0] = SIN_TABLE[SIN_ENT/2] = &TL_TABLE[EG_ENT-1]; 64585571bc7Sbellard for (s = 1;s <= SIN_ENT/4;s++){ 64685571bc7Sbellard pom = sin(2*PI*s/SIN_ENT); /* sin */ 64785571bc7Sbellard pom = 20*log10(1/pom); /* decibel */ 64885571bc7Sbellard j = pom / EG_STEP; /* TL_TABLE steps */ 64985571bc7Sbellard 65085571bc7Sbellard /* degree 0 - 90 , degree 180 - 90 : plus section */ 65185571bc7Sbellard SIN_TABLE[ s] = SIN_TABLE[SIN_ENT/2-s] = &TL_TABLE[j]; 65285571bc7Sbellard /* degree 180 - 270 , degree 360 - 270 : minus section */ 65385571bc7Sbellard SIN_TABLE[SIN_ENT/2+s] = SIN_TABLE[SIN_ENT -s] = &TL_TABLE[TL_MAX+j]; 65485571bc7Sbellard /* LOG(LOG_INF,("sin(%3d) = %f:%f db\n",s,pom,(double)j * EG_STEP));*/ 65585571bc7Sbellard } 65685571bc7Sbellard for (s = 0;s < SIN_ENT;s++) 65785571bc7Sbellard { 65885571bc7Sbellard SIN_TABLE[SIN_ENT*1+s] = s<(SIN_ENT/2) ? SIN_TABLE[s] : &TL_TABLE[EG_ENT]; 65985571bc7Sbellard SIN_TABLE[SIN_ENT*2+s] = SIN_TABLE[s % (SIN_ENT/2)]; 66085571bc7Sbellard SIN_TABLE[SIN_ENT*3+s] = (s/(SIN_ENT/4))&1 ? &TL_TABLE[EG_ENT] : SIN_TABLE[SIN_ENT*2+s]; 66185571bc7Sbellard } 66285571bc7Sbellard 66385571bc7Sbellard /* envelope counter -> envelope output table */ 66485571bc7Sbellard for (i=0; i<EG_ENT; i++) 66585571bc7Sbellard { 66685571bc7Sbellard /* ATTACK curve */ 66785571bc7Sbellard pom = pow( ((double)(EG_ENT-1-i)/EG_ENT) , 8 ) * EG_ENT; 66885571bc7Sbellard /* if( pom >= EG_ENT ) pom = EG_ENT-1; */ 66985571bc7Sbellard ENV_CURVE[i] = (int)pom; 67085571bc7Sbellard /* DECAY ,RELEASE curve */ 67185571bc7Sbellard ENV_CURVE[(EG_DST>>ENV_BITS)+i]= i; 67285571bc7Sbellard } 67385571bc7Sbellard /* off */ 67485571bc7Sbellard ENV_CURVE[EG_OFF>>ENV_BITS]= EG_ENT-1; 67585571bc7Sbellard /* make LFO ams table */ 67685571bc7Sbellard for (i=0; i<AMS_ENT; i++) 67785571bc7Sbellard { 67885571bc7Sbellard pom = (1.0+sin(2*PI*i/AMS_ENT))/2; /* sin */ 67985571bc7Sbellard AMS_TABLE[i] = (1.0/EG_STEP)*pom; /* 1dB */ 68085571bc7Sbellard AMS_TABLE[AMS_ENT+i] = (4.8/EG_STEP)*pom; /* 4.8dB */ 68185571bc7Sbellard } 68285571bc7Sbellard /* make LFO vibrate table */ 68385571bc7Sbellard for (i=0; i<VIB_ENT; i++) 68485571bc7Sbellard { 68585571bc7Sbellard /* 100cent = 1seminote = 6% ?? */ 68685571bc7Sbellard pom = (double)VIB_RATE*0.06*sin(2*PI*i/VIB_ENT); /* +-100sect step */ 68785571bc7Sbellard VIB_TABLE[i] = VIB_RATE + (pom*0.07); /* +- 7cent */ 68885571bc7Sbellard VIB_TABLE[VIB_ENT+i] = VIB_RATE + (pom*0.14); /* +-14cent */ 68985571bc7Sbellard /* LOG(LOG_INF,("vib %d=%d\n",i,VIB_TABLE[VIB_ENT+i])); */ 69085571bc7Sbellard } 69185571bc7Sbellard return 1; 69285571bc7Sbellard } 69385571bc7Sbellard 69485571bc7Sbellard 69585571bc7Sbellard static void OPLCloseTable( void ) 69685571bc7Sbellard { 69785571bc7Sbellard free(TL_TABLE); 69885571bc7Sbellard free(SIN_TABLE); 69985571bc7Sbellard free(AMS_TABLE); 70085571bc7Sbellard free(VIB_TABLE); 70185571bc7Sbellard } 70285571bc7Sbellard 70366a0a2cbSDong Xu Wang /* CSM Key Control */ 70437f6be97SLuiz Capitulino static inline void CSMKeyControll(OPL_CH *CH) 70585571bc7Sbellard { 70685571bc7Sbellard OPL_SLOT *slot1 = &CH->SLOT[SLOT1]; 70785571bc7Sbellard OPL_SLOT *slot2 = &CH->SLOT[SLOT2]; 70885571bc7Sbellard /* all key off */ 70985571bc7Sbellard OPL_KEYOFF(slot1); 71085571bc7Sbellard OPL_KEYOFF(slot2); 71185571bc7Sbellard /* total level latch */ 71285571bc7Sbellard slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl); 71385571bc7Sbellard slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl); 71485571bc7Sbellard /* key on */ 71585571bc7Sbellard CH->op1_out[0] = CH->op1_out[1] = 0; 71685571bc7Sbellard OPL_KEYON(slot1); 71785571bc7Sbellard OPL_KEYON(slot2); 71885571bc7Sbellard } 71985571bc7Sbellard 72085571bc7Sbellard /* ---------- opl initialize ---------- */ 72131de8314SStefan Weil static void OPL_initialize(FM_OPL *OPL) 72285571bc7Sbellard { 72385571bc7Sbellard int fn; 72485571bc7Sbellard 72585571bc7Sbellard /* frequency base */ 72685571bc7Sbellard OPL->freqbase = (OPL->rate) ? ((double)OPL->clock / OPL->rate) / 72 : 0; 72785571bc7Sbellard /* Timer base time */ 72885571bc7Sbellard OPL->TimerBase = 1.0/((double)OPL->clock / 72.0 ); 72985571bc7Sbellard /* make time tables */ 73085571bc7Sbellard init_timetables( OPL , OPL_ARRATE , OPL_DRRATE ); 73185571bc7Sbellard /* make fnumber -> increment counter table */ 73285571bc7Sbellard for( fn=0 ; fn < 1024 ; fn++ ) 73385571bc7Sbellard { 73485571bc7Sbellard OPL->FN_TABLE[fn] = OPL->freqbase * fn * FREQ_RATE * (1<<7) / 2; 73585571bc7Sbellard } 73685571bc7Sbellard /* LFO freq.table */ 73785571bc7Sbellard OPL->amsIncr = OPL->rate ? (double)AMS_ENT*(1<<AMS_SHIFT) / OPL->rate * 3.7 * ((double)OPL->clock/3600000) : 0; 73885571bc7Sbellard OPL->vibIncr = OPL->rate ? (double)VIB_ENT*(1<<VIB_SHIFT) / OPL->rate * 6.4 * ((double)OPL->clock/3600000) : 0; 73985571bc7Sbellard } 74085571bc7Sbellard 74185571bc7Sbellard /* ---------- write a OPL registers ---------- */ 74285571bc7Sbellard static void OPLWriteReg(FM_OPL *OPL, int r, int v) 74385571bc7Sbellard { 74485571bc7Sbellard OPL_CH *CH; 74585571bc7Sbellard int slot; 74685571bc7Sbellard int block_fnum; 74785571bc7Sbellard 74885571bc7Sbellard switch(r&0xe0) 74985571bc7Sbellard { 75066a0a2cbSDong Xu Wang case 0x00: /* 00-1f:control */ 75185571bc7Sbellard switch(r&0x1f) 75285571bc7Sbellard { 75385571bc7Sbellard case 0x01: 75485571bc7Sbellard /* wave selector enable */ 75585571bc7Sbellard OPL->wavesel = v&0x20; 75685571bc7Sbellard if(!OPL->wavesel) 75785571bc7Sbellard { 75885571bc7Sbellard /* preset compatible mode */ 75985571bc7Sbellard int c; 76085571bc7Sbellard for(c=0;c<OPL->max_ch;c++) 76185571bc7Sbellard { 76285571bc7Sbellard OPL->P_CH[c].SLOT[SLOT1].wavetable = &SIN_TABLE[0]; 76385571bc7Sbellard OPL->P_CH[c].SLOT[SLOT2].wavetable = &SIN_TABLE[0]; 76485571bc7Sbellard } 76585571bc7Sbellard } 76685571bc7Sbellard return; 76785571bc7Sbellard case 0x02: /* Timer 1 */ 76885571bc7Sbellard OPL->T[0] = (256-v)*4; 76985571bc7Sbellard break; 77085571bc7Sbellard case 0x03: /* Timer 2 */ 77185571bc7Sbellard OPL->T[1] = (256-v)*16; 77285571bc7Sbellard return; 77385571bc7Sbellard case 0x04: /* IRQ clear / mask and Timer enable */ 77485571bc7Sbellard if(v&0x80) 77585571bc7Sbellard { /* IRQ flag clear */ 77685571bc7Sbellard OPL_STATUS_RESET(OPL,0x7f); 77785571bc7Sbellard } 77885571bc7Sbellard else 77985571bc7Sbellard { /* set IRQ mask ,timer enable*/ 7804a796e97SJuan Quintela uint8_t st1 = v&1; 7814a796e97SJuan Quintela uint8_t st2 = (v>>1)&1; 78285571bc7Sbellard /* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */ 78385571bc7Sbellard OPL_STATUS_RESET(OPL,v&0x78); 78485571bc7Sbellard OPL_STATUSMASK_SET(OPL,((~v)&0x78)|0x01); 78585571bc7Sbellard /* timer 2 */ 78685571bc7Sbellard if(OPL->st[1] != st2) 78785571bc7Sbellard { 78885571bc7Sbellard double interval = st2 ? (double)OPL->T[1]*OPL->TimerBase : 0.0; 78985571bc7Sbellard OPL->st[1] = st2; 790c57fbf50SHervé Poussineau if (OPL->TimerHandler) { 791c57fbf50SHervé Poussineau (OPL->TimerHandler)(OPL->TimerParam, 1, interval); 792c57fbf50SHervé Poussineau } 79385571bc7Sbellard } 79485571bc7Sbellard /* timer 1 */ 79585571bc7Sbellard if(OPL->st[0] != st1) 79685571bc7Sbellard { 79785571bc7Sbellard double interval = st1 ? (double)OPL->T[0]*OPL->TimerBase : 0.0; 79885571bc7Sbellard OPL->st[0] = st1; 799c57fbf50SHervé Poussineau if (OPL->TimerHandler) { 800c57fbf50SHervé Poussineau (OPL->TimerHandler)(OPL->TimerParam, 0, interval); 801c57fbf50SHervé Poussineau } 80285571bc7Sbellard } 80385571bc7Sbellard } 80485571bc7Sbellard return; 80585571bc7Sbellard } 80685571bc7Sbellard break; 80785571bc7Sbellard case 0x20: /* am,vib,ksr,eg type,mul */ 80885571bc7Sbellard slot = slot_array[r&0x1f]; 80985571bc7Sbellard if(slot == -1) return; 81085571bc7Sbellard set_mul(OPL,slot,v); 81185571bc7Sbellard return; 81285571bc7Sbellard case 0x40: 81385571bc7Sbellard slot = slot_array[r&0x1f]; 81485571bc7Sbellard if(slot == -1) return; 81585571bc7Sbellard set_ksl_tl(OPL,slot,v); 81685571bc7Sbellard return; 81785571bc7Sbellard case 0x60: 81885571bc7Sbellard slot = slot_array[r&0x1f]; 81985571bc7Sbellard if(slot == -1) return; 82085571bc7Sbellard set_ar_dr(OPL,slot,v); 82185571bc7Sbellard return; 82285571bc7Sbellard case 0x80: 82385571bc7Sbellard slot = slot_array[r&0x1f]; 82485571bc7Sbellard if(slot == -1) return; 82585571bc7Sbellard set_sl_rr(OPL,slot,v); 82685571bc7Sbellard return; 82785571bc7Sbellard case 0xa0: 82885571bc7Sbellard switch(r) 82985571bc7Sbellard { 83085571bc7Sbellard case 0xbd: 83185571bc7Sbellard /* amsep,vibdep,r,bd,sd,tom,tc,hh */ 83285571bc7Sbellard { 8334a796e97SJuan Quintela uint8_t rkey = OPL->rhythm^v; 83485571bc7Sbellard OPL->ams_table = &AMS_TABLE[v&0x80 ? AMS_ENT : 0]; 83585571bc7Sbellard OPL->vib_table = &VIB_TABLE[v&0x40 ? VIB_ENT : 0]; 836c11e80e2SStefan Weil OPL->rhythm = v&0x3f; 837c11e80e2SStefan Weil if(OPL->rhythm&0x20) 83885571bc7Sbellard { 83985571bc7Sbellard #if 0 840c11e80e2SStefan Weil usrintf_showmessage("OPL Rhythm mode select"); 84185571bc7Sbellard #endif 84285571bc7Sbellard /* BD key on/off */ 84385571bc7Sbellard if(rkey&0x10) 84485571bc7Sbellard { 84585571bc7Sbellard if(v&0x10) 84685571bc7Sbellard { 84785571bc7Sbellard OPL->P_CH[6].op1_out[0] = OPL->P_CH[6].op1_out[1] = 0; 84885571bc7Sbellard OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT1]); 84985571bc7Sbellard OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT2]); 85085571bc7Sbellard } 85185571bc7Sbellard else 85285571bc7Sbellard { 85385571bc7Sbellard OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1]); 85485571bc7Sbellard OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2]); 85585571bc7Sbellard } 85685571bc7Sbellard } 85785571bc7Sbellard /* SD key on/off */ 85885571bc7Sbellard if(rkey&0x08) 85985571bc7Sbellard { 86085571bc7Sbellard if(v&0x08) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT2]); 86185571bc7Sbellard else OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2]); 86285571bc7Sbellard }/* TAM key on/off */ 86385571bc7Sbellard if(rkey&0x04) 86485571bc7Sbellard { 86585571bc7Sbellard if(v&0x04) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT1]); 86685571bc7Sbellard else OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1]); 86785571bc7Sbellard } 86885571bc7Sbellard /* TOP-CY key on/off */ 86985571bc7Sbellard if(rkey&0x02) 87085571bc7Sbellard { 87185571bc7Sbellard if(v&0x02) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT2]); 87285571bc7Sbellard else OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2]); 87385571bc7Sbellard } 87485571bc7Sbellard /* HH key on/off */ 87585571bc7Sbellard if(rkey&0x01) 87685571bc7Sbellard { 87785571bc7Sbellard if(v&0x01) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT1]); 87885571bc7Sbellard else OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1]); 87985571bc7Sbellard } 88085571bc7Sbellard } 88185571bc7Sbellard } 88285571bc7Sbellard return; 88385571bc7Sbellard } 88485571bc7Sbellard /* keyon,block,fnum */ 88585571bc7Sbellard if( (r&0x0f) > 8) return; 88685571bc7Sbellard CH = &OPL->P_CH[r&0x0f]; 88785571bc7Sbellard if(!(r&0x10)) 88885571bc7Sbellard { /* a0-a8 */ 88985571bc7Sbellard block_fnum = (CH->block_fnum&0x1f00) | v; 89085571bc7Sbellard } 89185571bc7Sbellard else 89285571bc7Sbellard { /* b0-b8 */ 89385571bc7Sbellard int keyon = (v>>5)&1; 89485571bc7Sbellard block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff); 89585571bc7Sbellard if(CH->keyon != keyon) 89685571bc7Sbellard { 89785571bc7Sbellard if( (CH->keyon=keyon) ) 89885571bc7Sbellard { 89985571bc7Sbellard CH->op1_out[0] = CH->op1_out[1] = 0; 90085571bc7Sbellard OPL_KEYON(&CH->SLOT[SLOT1]); 90185571bc7Sbellard OPL_KEYON(&CH->SLOT[SLOT2]); 90285571bc7Sbellard } 90385571bc7Sbellard else 90485571bc7Sbellard { 90585571bc7Sbellard OPL_KEYOFF(&CH->SLOT[SLOT1]); 90685571bc7Sbellard OPL_KEYOFF(&CH->SLOT[SLOT2]); 90785571bc7Sbellard } 90885571bc7Sbellard } 90985571bc7Sbellard } 91085571bc7Sbellard /* update */ 91185571bc7Sbellard if(CH->block_fnum != block_fnum) 91285571bc7Sbellard { 91385571bc7Sbellard int blockRv = 7-(block_fnum>>10); 91485571bc7Sbellard int fnum = block_fnum&0x3ff; 91585571bc7Sbellard CH->block_fnum = block_fnum; 91685571bc7Sbellard 91785571bc7Sbellard CH->ksl_base = KSL_TABLE[block_fnum>>6]; 91885571bc7Sbellard CH->fc = OPL->FN_TABLE[fnum]>>blockRv; 91985571bc7Sbellard CH->kcode = CH->block_fnum>>9; 92085571bc7Sbellard if( (OPL->mode&0x40) && CH->block_fnum&0x100) CH->kcode |=1; 92185571bc7Sbellard CALC_FCSLOT(CH,&CH->SLOT[SLOT1]); 92285571bc7Sbellard CALC_FCSLOT(CH,&CH->SLOT[SLOT2]); 92385571bc7Sbellard } 92485571bc7Sbellard return; 92585571bc7Sbellard case 0xc0: 92685571bc7Sbellard /* FB,C */ 92785571bc7Sbellard if( (r&0x0f) > 8) return; 92885571bc7Sbellard CH = &OPL->P_CH[r&0x0f]; 92985571bc7Sbellard { 93085571bc7Sbellard int feedback = (v>>1)&7; 93185571bc7Sbellard CH->FB = feedback ? (8+1) - feedback : 0; 93285571bc7Sbellard CH->CON = v&1; 933c11e80e2SStefan Weil set_algorithm(CH); 93485571bc7Sbellard } 93585571bc7Sbellard return; 93685571bc7Sbellard case 0xe0: /* wave type */ 93785571bc7Sbellard slot = slot_array[r&0x1f]; 93885571bc7Sbellard if(slot == -1) return; 93985571bc7Sbellard CH = &OPL->P_CH[slot/2]; 94085571bc7Sbellard if(OPL->wavesel) 94185571bc7Sbellard { 94285571bc7Sbellard /* LOG(LOG_INF,("OPL SLOT %d wave select %d\n",slot,v&3)); */ 94385571bc7Sbellard CH->SLOT[slot&1].wavetable = &SIN_TABLE[(v&0x03)*SIN_ENT]; 94485571bc7Sbellard } 94585571bc7Sbellard return; 94685571bc7Sbellard } 94785571bc7Sbellard } 94885571bc7Sbellard 94985571bc7Sbellard /* lock/unlock for common table */ 95085571bc7Sbellard static int OPL_LockTable(void) 95185571bc7Sbellard { 95285571bc7Sbellard num_lock++; 95385571bc7Sbellard if(num_lock>1) return 0; 95485571bc7Sbellard /* first time */ 95585571bc7Sbellard cur_chip = NULL; 95685571bc7Sbellard /* allocate total level table (128kb space) */ 95785571bc7Sbellard if( !OPLOpenTable() ) 95885571bc7Sbellard { 95985571bc7Sbellard num_lock--; 96085571bc7Sbellard return -1; 96185571bc7Sbellard } 96285571bc7Sbellard return 0; 96385571bc7Sbellard } 96485571bc7Sbellard 96585571bc7Sbellard static void OPL_UnLockTable(void) 96685571bc7Sbellard { 96785571bc7Sbellard if(num_lock) num_lock--; 96885571bc7Sbellard if(num_lock) return; 96985571bc7Sbellard /* last time */ 97085571bc7Sbellard cur_chip = NULL; 97185571bc7Sbellard OPLCloseTable(); 97285571bc7Sbellard } 97385571bc7Sbellard 97485571bc7Sbellard /*******************************************************************************/ 97585571bc7Sbellard /* YM3812 local section */ 97685571bc7Sbellard /*******************************************************************************/ 97785571bc7Sbellard 97885571bc7Sbellard /* ---------- update one of chip ----------- */ 9797bf10b1dSJuan Quintela void YM3812UpdateOne(FM_OPL *OPL, int16_t *buffer, int length) 98085571bc7Sbellard { 98185571bc7Sbellard int i; 98285571bc7Sbellard int data; 9838ec734d0SJuan Quintela int16_t *buf = buffer; 9843795f180SJuan Quintela uint32_t amsCnt = OPL->amsCnt; 9853795f180SJuan Quintela uint32_t vibCnt = OPL->vibCnt; 9864a796e97SJuan Quintela uint8_t rhythm = OPL->rhythm&0x20; 98785571bc7Sbellard OPL_CH *CH,*R_CH; 98885571bc7Sbellard 98985571bc7Sbellard if( (void *)OPL != cur_chip ){ 99085571bc7Sbellard cur_chip = (void *)OPL; 99185571bc7Sbellard /* channel pointers */ 99285571bc7Sbellard S_CH = OPL->P_CH; 99385571bc7Sbellard E_CH = &S_CH[9]; 994c11e80e2SStefan Weil /* rhythm slot */ 99585571bc7Sbellard SLOT7_1 = &S_CH[7].SLOT[SLOT1]; 99685571bc7Sbellard SLOT7_2 = &S_CH[7].SLOT[SLOT2]; 99785571bc7Sbellard SLOT8_1 = &S_CH[8].SLOT[SLOT1]; 99885571bc7Sbellard SLOT8_2 = &S_CH[8].SLOT[SLOT2]; 99985571bc7Sbellard /* LFO state */ 100085571bc7Sbellard amsIncr = OPL->amsIncr; 100185571bc7Sbellard vibIncr = OPL->vibIncr; 100285571bc7Sbellard ams_table = OPL->ams_table; 100385571bc7Sbellard vib_table = OPL->vib_table; 100485571bc7Sbellard } 1005c11e80e2SStefan Weil R_CH = rhythm ? &S_CH[6] : E_CH; 100685571bc7Sbellard for( i=0; i < length ; i++ ) 100785571bc7Sbellard { 100885571bc7Sbellard /* channel A channel B channel C */ 100985571bc7Sbellard /* LFO */ 101085571bc7Sbellard ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT]; 101185571bc7Sbellard vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT]; 101285571bc7Sbellard outd[0] = 0; 101385571bc7Sbellard /* FM part */ 101485571bc7Sbellard for(CH=S_CH ; CH < R_CH ; CH++) 101585571bc7Sbellard OPL_CALC_CH(CH); 101685571bc7Sbellard /* Rythn part */ 1017c11e80e2SStefan Weil if(rhythm) 101885571bc7Sbellard OPL_CALC_RH(S_CH); 101985571bc7Sbellard /* limit check */ 102085571bc7Sbellard data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT ); 102185571bc7Sbellard /* store to sound buffer */ 102285571bc7Sbellard buf[i] = data >> OPL_OUTSB; 102385571bc7Sbellard } 102485571bc7Sbellard 102585571bc7Sbellard OPL->amsCnt = amsCnt; 102685571bc7Sbellard OPL->vibCnt = vibCnt; 102785571bc7Sbellard #ifdef OPL_OUTPUT_LOG 102885571bc7Sbellard if(opl_dbg_fp) 102985571bc7Sbellard { 103085571bc7Sbellard for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++) 103185571bc7Sbellard if( opl_dbg_opl[opl_dbg_chip] == OPL) break; 103285571bc7Sbellard fprintf(opl_dbg_fp,"%c%c%c",0x20+opl_dbg_chip,length&0xff,length/256); 103385571bc7Sbellard } 103485571bc7Sbellard #endif 103585571bc7Sbellard } 103685571bc7Sbellard 103785571bc7Sbellard /* ---------- reset one of chip ---------- */ 1038d52ccc0eSJuan Quintela static void OPLResetChip(FM_OPL *OPL) 103985571bc7Sbellard { 104085571bc7Sbellard int c,s; 104185571bc7Sbellard int i; 104285571bc7Sbellard 104385571bc7Sbellard /* reset chip */ 104485571bc7Sbellard OPL->mode = 0; /* normal mode */ 104585571bc7Sbellard OPL_STATUS_RESET(OPL,0x7f); 104685571bc7Sbellard /* reset with register write */ 104785571bc7Sbellard OPLWriteReg(OPL,0x01,0); /* wabesel disable */ 104885571bc7Sbellard OPLWriteReg(OPL,0x02,0); /* Timer1 */ 104985571bc7Sbellard OPLWriteReg(OPL,0x03,0); /* Timer2 */ 105085571bc7Sbellard OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */ 105185571bc7Sbellard for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0); 105267cc32ebSVeres Lajos /* reset operator parameter */ 105385571bc7Sbellard for( c = 0 ; c < OPL->max_ch ; c++ ) 105485571bc7Sbellard { 105585571bc7Sbellard OPL_CH *CH = &OPL->P_CH[c]; 105685571bc7Sbellard /* OPL->P_CH[c].PAN = OPN_CENTER; */ 105785571bc7Sbellard for(s = 0 ; s < 2 ; s++ ) 105885571bc7Sbellard { 105985571bc7Sbellard /* wave table */ 106085571bc7Sbellard CH->SLOT[s].wavetable = &SIN_TABLE[0]; 106185571bc7Sbellard /* CH->SLOT[s].evm = ENV_MOD_RR; */ 106285571bc7Sbellard CH->SLOT[s].evc = EG_OFF; 106385571bc7Sbellard CH->SLOT[s].eve = EG_OFF+1; 106485571bc7Sbellard CH->SLOT[s].evs = 0; 106585571bc7Sbellard } 106685571bc7Sbellard } 106785571bc7Sbellard } 106885571bc7Sbellard 106902f7a164SPhilippe Mathieu-Daudé /* ---------- Create one of virtual YM3812 ---------- */ 107085571bc7Sbellard /* 'rate' is sampling rate and 'bufsiz' is the size of the */ 10718f7e2c2cSJuan Quintela FM_OPL *OPLCreate(int clock, int rate) 107285571bc7Sbellard { 107385571bc7Sbellard char *ptr; 107485571bc7Sbellard FM_OPL *OPL; 107585571bc7Sbellard int state_size; 107685571bc7Sbellard int max_ch = 9; /* normaly 9 channels */ 107785571bc7Sbellard 107885571bc7Sbellard if( OPL_LockTable() ==-1) return NULL; 107985571bc7Sbellard /* allocate OPL state space */ 108085571bc7Sbellard state_size = sizeof(FM_OPL); 108185571bc7Sbellard state_size += sizeof(OPL_CH)*max_ch; 108285571bc7Sbellard /* allocate memory block */ 1083809c130cSaliguori ptr = malloc(state_size); 1084809c130cSaliguori if(ptr==NULL) return NULL; 108585571bc7Sbellard /* clear */ 108685571bc7Sbellard memset(ptr,0,state_size); 108785571bc7Sbellard OPL = (FM_OPL *)ptr; ptr+=sizeof(FM_OPL); 108885571bc7Sbellard OPL->P_CH = (OPL_CH *)ptr; ptr+=sizeof(OPL_CH)*max_ch; 108985571bc7Sbellard /* set channel state pointer */ 109085571bc7Sbellard OPL->clock = clock; 109185571bc7Sbellard OPL->rate = rate; 109285571bc7Sbellard OPL->max_ch = max_ch; 1093*2eea51bdSPhilippe Mathieu-Daudé ENV_CURVE = g_new(int32_t, 2 * EG_ENT + 1); 109485571bc7Sbellard /* init grobal tables */ 109531de8314SStefan Weil OPL_initialize(OPL); 109685571bc7Sbellard /* reset chip */ 109785571bc7Sbellard OPLResetChip(OPL); 109885571bc7Sbellard #ifdef OPL_OUTPUT_LOG 109985571bc7Sbellard if(!opl_dbg_fp) 110085571bc7Sbellard { 110185571bc7Sbellard opl_dbg_fp = fopen("opllog.opl","wb"); 110285571bc7Sbellard opl_dbg_maxchip = 0; 110385571bc7Sbellard } 110485571bc7Sbellard if(opl_dbg_fp) 110585571bc7Sbellard { 110685571bc7Sbellard opl_dbg_opl[opl_dbg_maxchip] = OPL; 110785571bc7Sbellard fprintf(opl_dbg_fp,"%c%c%c%c%c%c",0x00+opl_dbg_maxchip, 110885571bc7Sbellard type, 110985571bc7Sbellard clock&0xff, 111085571bc7Sbellard (clock/0x100)&0xff, 111185571bc7Sbellard (clock/0x10000)&0xff, 111285571bc7Sbellard (clock/0x1000000)&0xff); 111385571bc7Sbellard opl_dbg_maxchip++; 111485571bc7Sbellard } 111585571bc7Sbellard #endif 111685571bc7Sbellard return OPL; 111785571bc7Sbellard } 111885571bc7Sbellard 111902f7a164SPhilippe Mathieu-Daudé /* ---------- Destroy one of virtual YM3812 ---------- */ 112085571bc7Sbellard void OPLDestroy(FM_OPL *OPL) 112185571bc7Sbellard { 112285571bc7Sbellard #ifdef OPL_OUTPUT_LOG 112385571bc7Sbellard if(opl_dbg_fp) 112485571bc7Sbellard { 112585571bc7Sbellard fclose(opl_dbg_fp); 112685571bc7Sbellard opl_dbg_fp = NULL; 112785571bc7Sbellard } 112885571bc7Sbellard #endif 112985571bc7Sbellard OPL_UnLockTable(); 113085571bc7Sbellard free(OPL); 1131*2eea51bdSPhilippe Mathieu-Daudé g_free(ENV_CURVE); 113285571bc7Sbellard } 113385571bc7Sbellard 113485571bc7Sbellard /* ---------- Option handlers ---------- */ 113585571bc7Sbellard 1136c57fbf50SHervé Poussineau void OPLSetTimerHandler(FM_OPL *OPL, OPL_TIMERHANDLER TimerHandler, 1137c57fbf50SHervé Poussineau void *param) 113885571bc7Sbellard { 113985571bc7Sbellard OPL->TimerHandler = TimerHandler; 1140c57fbf50SHervé Poussineau OPL->TimerParam = param; 114185571bc7Sbellard } 1142ade33989SJuan Quintela 114385571bc7Sbellard /* ---------- YM3812 I/O interface ---------- */ 114485571bc7Sbellard int OPLWrite(FM_OPL *OPL,int a,int v) 114585571bc7Sbellard { 114685571bc7Sbellard if( !(a&1) ) 114785571bc7Sbellard { /* address port */ 114885571bc7Sbellard OPL->address = v & 0xff; 114985571bc7Sbellard } 115085571bc7Sbellard else 115185571bc7Sbellard { /* data port */ 115285571bc7Sbellard #ifdef OPL_OUTPUT_LOG 115385571bc7Sbellard if(opl_dbg_fp) 115485571bc7Sbellard { 115585571bc7Sbellard for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++) 115685571bc7Sbellard if( opl_dbg_opl[opl_dbg_chip] == OPL) break; 115785571bc7Sbellard fprintf(opl_dbg_fp,"%c%c%c",0x10+opl_dbg_chip,OPL->address,v); 115885571bc7Sbellard } 115985571bc7Sbellard #endif 116085571bc7Sbellard OPLWriteReg(OPL,OPL->address,v); 116185571bc7Sbellard } 116285571bc7Sbellard return OPL->status>>7; 116385571bc7Sbellard } 116485571bc7Sbellard 116585571bc7Sbellard unsigned char OPLRead(FM_OPL *OPL,int a) 116685571bc7Sbellard { 116785571bc7Sbellard if( !(a&1) ) 116885571bc7Sbellard { /* status port */ 116985571bc7Sbellard return OPL->status & (OPL->statusmask|0x80); 117085571bc7Sbellard } 117185571bc7Sbellard /* data port */ 117285571bc7Sbellard switch(OPL->address) 117385571bc7Sbellard { 117485571bc7Sbellard case 0x05: /* KeyBoard IN */ 117585571bc7Sbellard return 0; 117685571bc7Sbellard #if 0 117785571bc7Sbellard case 0x0f: /* ADPCM-DATA */ 117885571bc7Sbellard return 0; 117985571bc7Sbellard #endif 118085571bc7Sbellard case 0x19: /* I/O DATA */ 118185571bc7Sbellard return 0; 118285571bc7Sbellard case 0x1a: /* PCM-DATA */ 118385571bc7Sbellard return 0; 118485571bc7Sbellard } 118585571bc7Sbellard return 0; 118685571bc7Sbellard } 118785571bc7Sbellard 118885571bc7Sbellard int OPLTimerOver(FM_OPL *OPL,int c) 118985571bc7Sbellard { 119085571bc7Sbellard if( c ) 119185571bc7Sbellard { /* Timer B */ 119285571bc7Sbellard OPL_STATUS_SET(OPL,0x20); 119385571bc7Sbellard } 119485571bc7Sbellard else 119585571bc7Sbellard { /* Timer A */ 119685571bc7Sbellard OPL_STATUS_SET(OPL,0x40); 119766a0a2cbSDong Xu Wang /* CSM mode key,TL control */ 119885571bc7Sbellard if( OPL->mode & 0x80 ) 119985571bc7Sbellard { /* CSM mode total level latch and auto key on */ 120085571bc7Sbellard int ch; 120185571bc7Sbellard for(ch=0;ch<9;ch++) 120285571bc7Sbellard CSMKeyControll( &OPL->P_CH[ch] ); 120385571bc7Sbellard } 120485571bc7Sbellard } 120585571bc7Sbellard /* reload timer */ 1206c57fbf50SHervé Poussineau if (OPL->TimerHandler) { 1207c57fbf50SHervé Poussineau (OPL->TimerHandler)(OPL->TimerParam, c, 1208c57fbf50SHervé Poussineau (double)OPL->T[c] * OPL->TimerBase); 1209c57fbf50SHervé Poussineau } 121085571bc7Sbellard return OPL->status>>7; 121185571bc7Sbellard } 1212