xref: /qemu/hw/audio/ac97.c (revision 0b8fa32f551e863bb548a11394239239270dd3dc)
1e5c9a13eSbalrog /*
2e5c9a13eSbalrog  * Copyright (C) 2006 InnoTek Systemberatung GmbH
3e5c9a13eSbalrog  *
4e5c9a13eSbalrog  * This file is part of VirtualBox Open Source Edition (OSE), as
5e5c9a13eSbalrog  * available from http://www.virtualbox.org. This file is free software;
6e5c9a13eSbalrog  * you can redistribute it and/or modify it under the terms of the GNU
7e5c9a13eSbalrog  * General Public License as published by the Free Software Foundation,
8e5c9a13eSbalrog  * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
9e5c9a13eSbalrog  * distribution. VirtualBox OSE is distributed in the hope that it will
10e5c9a13eSbalrog  * be useful, but WITHOUT ANY WARRANTY of any kind.
11e5c9a13eSbalrog  *
12e5c9a13eSbalrog  * If you received this file as part of a commercial VirtualBox
13e5c9a13eSbalrog  * distribution, then only the terms of your commercial VirtualBox
14e5c9a13eSbalrog  * license agreement apply instead of the previous paragraph.
156b620ca3SPaolo Bonzini  *
166b620ca3SPaolo Bonzini  * Contributions after 2012-01-13 are licensed under the terms of the
176b620ca3SPaolo Bonzini  * GNU GPL, version 2 or (at your option) any later version.
18e5c9a13eSbalrog  */
19e5c9a13eSbalrog 
206086a565SPeter Maydell #include "qemu/osdep.h"
2183c9f4caSPaolo Bonzini #include "hw/hw.h"
228a824e4dSEduardo Habkost #include "hw/audio/soundhw.h"
23e5c9a13eSbalrog #include "audio/audio.h"
2483c9f4caSPaolo Bonzini #include "hw/pci/pci.h"
25*0b8fa32fSMarkus Armbruster #include "qemu/module.h"
269c17d615SPaolo Bonzini #include "sysemu/dma.h"
27e5c9a13eSbalrog 
28e5c9a13eSbalrog enum {
29e5c9a13eSbalrog     AC97_Reset                     = 0x00,
30e5c9a13eSbalrog     AC97_Master_Volume_Mute        = 0x02,
31e5c9a13eSbalrog     AC97_Headphone_Volume_Mute     = 0x04,
32e5c9a13eSbalrog     AC97_Master_Volume_Mono_Mute   = 0x06,
33e5c9a13eSbalrog     AC97_Master_Tone_RL            = 0x08,
34e5c9a13eSbalrog     AC97_PC_BEEP_Volume_Mute       = 0x0A,
35e5c9a13eSbalrog     AC97_Phone_Volume_Mute         = 0x0C,
36e5c9a13eSbalrog     AC97_Mic_Volume_Mute           = 0x0E,
37e5c9a13eSbalrog     AC97_Line_In_Volume_Mute       = 0x10,
38e5c9a13eSbalrog     AC97_CD_Volume_Mute            = 0x12,
39e5c9a13eSbalrog     AC97_Video_Volume_Mute         = 0x14,
40e5c9a13eSbalrog     AC97_Aux_Volume_Mute           = 0x16,
41e5c9a13eSbalrog     AC97_PCM_Out_Volume_Mute       = 0x18,
42e5c9a13eSbalrog     AC97_Record_Select             = 0x1A,
43e5c9a13eSbalrog     AC97_Record_Gain_Mute          = 0x1C,
44e5c9a13eSbalrog     AC97_Record_Gain_Mic_Mute      = 0x1E,
45e5c9a13eSbalrog     AC97_General_Purpose           = 0x20,
46e5c9a13eSbalrog     AC97_3D_Control                = 0x22,
47e5c9a13eSbalrog     AC97_AC_97_RESERVED            = 0x24,
48e5c9a13eSbalrog     AC97_Powerdown_Ctrl_Stat       = 0x26,
49e5c9a13eSbalrog     AC97_Extended_Audio_ID         = 0x28,
50e5c9a13eSbalrog     AC97_Extended_Audio_Ctrl_Stat  = 0x2A,
51e5c9a13eSbalrog     AC97_PCM_Front_DAC_Rate        = 0x2C,
52e5c9a13eSbalrog     AC97_PCM_Surround_DAC_Rate     = 0x2E,
53e5c9a13eSbalrog     AC97_PCM_LFE_DAC_Rate          = 0x30,
54e5c9a13eSbalrog     AC97_PCM_LR_ADC_Rate           = 0x32,
55e5c9a13eSbalrog     AC97_MIC_ADC_Rate              = 0x34,
56e5c9a13eSbalrog     AC97_6Ch_Vol_C_LFE_Mute        = 0x36,
57e5c9a13eSbalrog     AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
58e5c9a13eSbalrog     AC97_Vendor_Reserved           = 0x58,
59d044be37SHans de Goede     AC97_Sigmatel_Analog           = 0x6c, /* We emulate a Sigmatel codec */
60d044be37SHans de Goede     AC97_Sigmatel_Dac2Invert       = 0x6e, /* We emulate a Sigmatel codec */
61e5c9a13eSbalrog     AC97_Vendor_ID1                = 0x7c,
62e5c9a13eSbalrog     AC97_Vendor_ID2                = 0x7e
63e5c9a13eSbalrog };
64e5c9a13eSbalrog 
65e5c9a13eSbalrog #define SOFT_VOLUME
66e5c9a13eSbalrog #define SR_FIFOE 16             /* rwc */
67e5c9a13eSbalrog #define SR_BCIS  8              /* rwc */
68e5c9a13eSbalrog #define SR_LVBCI 4              /* rwc */
69e5c9a13eSbalrog #define SR_CELV  2              /* ro */
70e5c9a13eSbalrog #define SR_DCH   1              /* ro */
71e5c9a13eSbalrog #define SR_VALID_MASK ((1 << 5) - 1)
72e5c9a13eSbalrog #define SR_WCLEAR_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
73e5c9a13eSbalrog #define SR_RO_MASK (SR_DCH | SR_CELV)
74e5c9a13eSbalrog #define SR_INT_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
75e5c9a13eSbalrog 
76e5c9a13eSbalrog #define CR_IOCE  16             /* rw */
77e5c9a13eSbalrog #define CR_FEIE  8              /* rw */
78e5c9a13eSbalrog #define CR_LVBIE 4              /* rw */
79e5c9a13eSbalrog #define CR_RR    2              /* rw */
80e5c9a13eSbalrog #define CR_RPBM  1              /* rw */
81e5c9a13eSbalrog #define CR_VALID_MASK ((1 << 5) - 1)
82e5c9a13eSbalrog #define CR_DONT_CLEAR_MASK (CR_IOCE | CR_FEIE | CR_LVBIE)
83e5c9a13eSbalrog 
84e5c9a13eSbalrog #define GC_WR    4              /* rw */
85e5c9a13eSbalrog #define GC_CR    2              /* rw */
86e5c9a13eSbalrog #define GC_VALID_MASK ((1 << 6) - 1)
87e5c9a13eSbalrog 
88e5c9a13eSbalrog #define GS_MD3   (1<<17)        /* rw */
89e5c9a13eSbalrog #define GS_AD3   (1<<16)        /* rw */
90e5c9a13eSbalrog #define GS_RCS   (1<<15)        /* rwc */
91e5c9a13eSbalrog #define GS_B3S12 (1<<14)        /* ro */
92e5c9a13eSbalrog #define GS_B2S12 (1<<13)        /* ro */
93e5c9a13eSbalrog #define GS_B1S12 (1<<12)        /* ro */
94e5c9a13eSbalrog #define GS_S1R1  (1<<11)        /* rwc */
95e5c9a13eSbalrog #define GS_S0R1  (1<<10)        /* rwc */
96e5c9a13eSbalrog #define GS_S1CR  (1<<9)         /* ro */
97e5c9a13eSbalrog #define GS_S0CR  (1<<8)         /* ro */
98e5c9a13eSbalrog #define GS_MINT  (1<<7)         /* ro */
99e5c9a13eSbalrog #define GS_POINT (1<<6)         /* ro */
100e5c9a13eSbalrog #define GS_PIINT (1<<5)         /* ro */
101e5c9a13eSbalrog #define GS_RSRVD ((1<<4)|(1<<3))
102e5c9a13eSbalrog #define GS_MOINT (1<<2)         /* ro */
103e5c9a13eSbalrog #define GS_MIINT (1<<1)         /* ro */
104e5c9a13eSbalrog #define GS_GSCI  1              /* rwc */
105e5c9a13eSbalrog #define GS_RO_MASK (GS_B3S12|                   \
106e5c9a13eSbalrog                     GS_B2S12|                   \
107e5c9a13eSbalrog                     GS_B1S12|                   \
108e5c9a13eSbalrog                     GS_S1CR|                    \
109e5c9a13eSbalrog                     GS_S0CR|                    \
110e5c9a13eSbalrog                     GS_MINT|                    \
111e5c9a13eSbalrog                     GS_POINT|                   \
112e5c9a13eSbalrog                     GS_PIINT|                   \
113e5c9a13eSbalrog                     GS_RSRVD|                   \
114e5c9a13eSbalrog                     GS_MOINT|                   \
115e5c9a13eSbalrog                     GS_MIINT)
116e5c9a13eSbalrog #define GS_VALID_MASK ((1 << 18) - 1)
117e5c9a13eSbalrog #define GS_WCLEAR_MASK (GS_RCS|GS_S1R1|GS_S0R1|GS_GSCI)
118e5c9a13eSbalrog 
119e5c9a13eSbalrog #define BD_IOC (1<<31)
120e5c9a13eSbalrog #define BD_BUP (1<<30)
121e5c9a13eSbalrog 
122e5c9a13eSbalrog #define EACS_VRA 1
123e5c9a13eSbalrog #define EACS_VRM 8
124e5c9a13eSbalrog 
125e5c9a13eSbalrog #define MUTE_SHIFT 15
126e5c9a13eSbalrog 
127417d430eSLi Qiang #define TYPE_AC97 "AC97"
128417d430eSLi Qiang #define AC97(obj) \
129417d430eSLi Qiang     OBJECT_CHECK(AC97LinkState, (obj), TYPE_AC97)
130417d430eSLi Qiang 
131e5c9a13eSbalrog #define REC_MASK 7
132e5c9a13eSbalrog enum {
133e5c9a13eSbalrog     REC_MIC = 0,
134e5c9a13eSbalrog     REC_CD,
135e5c9a13eSbalrog     REC_VIDEO,
136e5c9a13eSbalrog     REC_AUX,
137e5c9a13eSbalrog     REC_LINE_IN,
138e5c9a13eSbalrog     REC_STEREO_MIX,
139e5c9a13eSbalrog     REC_MONO_MIX,
140e5c9a13eSbalrog     REC_PHONE
141e5c9a13eSbalrog };
142e5c9a13eSbalrog 
143e5c9a13eSbalrog typedef struct BD {
144e5c9a13eSbalrog     uint32_t addr;
145e5c9a13eSbalrog     uint32_t ctl_len;
146e5c9a13eSbalrog } BD;
147e5c9a13eSbalrog 
148e5c9a13eSbalrog typedef struct AC97BusMasterRegs {
149e5c9a13eSbalrog     uint32_t bdbar;             /* rw 0 */
150e5c9a13eSbalrog     uint8_t civ;                /* ro 0 */
151e5c9a13eSbalrog     uint8_t lvi;                /* rw 0 */
152e5c9a13eSbalrog     uint16_t sr;                /* rw 1 */
153e5c9a13eSbalrog     uint16_t picb;              /* ro 0 */
154e5c9a13eSbalrog     uint8_t piv;                /* ro 0 */
155e5c9a13eSbalrog     uint8_t cr;                 /* rw 0 */
156e5c9a13eSbalrog     unsigned int bd_valid;
157e5c9a13eSbalrog     BD bd;
158e5c9a13eSbalrog } AC97BusMasterRegs;
159e5c9a13eSbalrog 
160e5c9a13eSbalrog typedef struct AC97LinkState {
16110ee2aaaSJuan Quintela     PCIDevice dev;
162e5c9a13eSbalrog     QEMUSoundCard card;
16325a21c94SGerd Hoffmann     uint32_t use_broken_id;
164e5c9a13eSbalrog     uint32_t glob_cnt;
165e5c9a13eSbalrog     uint32_t glob_sta;
166e5c9a13eSbalrog     uint32_t cas;
167e5c9a13eSbalrog     uint32_t last_samp;
168e5c9a13eSbalrog     AC97BusMasterRegs bm_regs[3];
169e5c9a13eSbalrog     uint8_t mixer_data[256];
170e5c9a13eSbalrog     SWVoiceIn *voice_pi;
171e5c9a13eSbalrog     SWVoiceOut *voice_po;
172e5c9a13eSbalrog     SWVoiceIn *voice_mc;
1732c44375dSmalc     int invalid_freq[3];
174e5c9a13eSbalrog     uint8_t silence[128];
175e5c9a13eSbalrog     int bup_flag;
17683c406d9SAvi Kivity     MemoryRegion io_nam;
17783c406d9SAvi Kivity     MemoryRegion io_nabm;
178e5c9a13eSbalrog } AC97LinkState;
179e5c9a13eSbalrog 
180e5c9a13eSbalrog enum {
181e5c9a13eSbalrog     BUP_SET = 1,
182e5c9a13eSbalrog     BUP_LAST = 2
183e5c9a13eSbalrog };
184e5c9a13eSbalrog 
185e5c9a13eSbalrog #ifdef DEBUG_AC97
186e5c9a13eSbalrog #define dolog(...) AUD_log ("ac97", __VA_ARGS__)
187e5c9a13eSbalrog #else
188e5c9a13eSbalrog #define dolog(...)
189e5c9a13eSbalrog #endif
190e5c9a13eSbalrog 
191e5c9a13eSbalrog #define MKREGS(prefix, start)                   \
192e5c9a13eSbalrog enum {                                          \
193e5c9a13eSbalrog     prefix ## _BDBAR = start,                   \
194e5c9a13eSbalrog     prefix ## _CIV = start + 4,                 \
195e5c9a13eSbalrog     prefix ## _LVI = start + 5,                 \
196e5c9a13eSbalrog     prefix ## _SR = start + 6,                  \
197e5c9a13eSbalrog     prefix ## _PICB = start + 8,                \
198e5c9a13eSbalrog     prefix ## _PIV = start + 10,                \
199e5c9a13eSbalrog     prefix ## _CR = start + 11                  \
200e5c9a13eSbalrog }
201e5c9a13eSbalrog 
202e5c9a13eSbalrog enum {
203e5c9a13eSbalrog     PI_INDEX = 0,
204e5c9a13eSbalrog     PO_INDEX,
205e5c9a13eSbalrog     MC_INDEX,
206e5c9a13eSbalrog     LAST_INDEX
207e5c9a13eSbalrog };
208e5c9a13eSbalrog 
209e5c9a13eSbalrog MKREGS (PI, PI_INDEX * 16);
210e5c9a13eSbalrog MKREGS (PO, PO_INDEX * 16);
211e5c9a13eSbalrog MKREGS (MC, MC_INDEX * 16);
212e5c9a13eSbalrog 
213e5c9a13eSbalrog enum {
214e5c9a13eSbalrog     GLOB_CNT = 0x2c,
215e5c9a13eSbalrog     GLOB_STA = 0x30,
216e5c9a13eSbalrog     CAS      = 0x34
217e5c9a13eSbalrog };
218e5c9a13eSbalrog 
219e5c9a13eSbalrog #define GET_BM(index) (((index) >> 4) & 3)
220e5c9a13eSbalrog 
221e5c9a13eSbalrog static void po_callback (void *opaque, int free);
222e5c9a13eSbalrog static void pi_callback (void *opaque, int avail);
223e5c9a13eSbalrog static void mc_callback (void *opaque, int avail);
224e5c9a13eSbalrog 
225e5c9a13eSbalrog static void warm_reset (AC97LinkState *s)
226e5c9a13eSbalrog {
227e5c9a13eSbalrog     (void) s;
228e5c9a13eSbalrog }
229e5c9a13eSbalrog 
230e5c9a13eSbalrog static void cold_reset (AC97LinkState * s)
231e5c9a13eSbalrog {
232e5c9a13eSbalrog     (void) s;
233e5c9a13eSbalrog }
234e5c9a13eSbalrog 
235e5c9a13eSbalrog static void fetch_bd (AC97LinkState *s, AC97BusMasterRegs *r)
236e5c9a13eSbalrog {
237e5c9a13eSbalrog     uint8_t b[8];
238e5c9a13eSbalrog 
23993f43c48SEduard - Gabriel Munteanu     pci_dma_read (&s->dev, r->bdbar + r->civ * 8, b, 8);
240e5c9a13eSbalrog     r->bd_valid = 1;
241e5c9a13eSbalrog     r->bd.addr = le32_to_cpu (*(uint32_t *) &b[0]) & ~3;
242e5c9a13eSbalrog     r->bd.ctl_len = le32_to_cpu (*(uint32_t *) &b[4]);
243e5c9a13eSbalrog     r->picb = r->bd.ctl_len & 0xffff;
244e5c9a13eSbalrog     dolog ("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
245e5c9a13eSbalrog            r->civ, r->bd.addr, r->bd.ctl_len >> 16,
246e5c9a13eSbalrog            r->bd.ctl_len & 0xffff,
247e5c9a13eSbalrog            (r->bd.ctl_len & 0xffff) << 1);
248e5c9a13eSbalrog }
249e5c9a13eSbalrog 
250e5c9a13eSbalrog static void update_sr (AC97LinkState *s, AC97BusMasterRegs *r, uint32_t new_sr)
251e5c9a13eSbalrog {
252e5c9a13eSbalrog     int event = 0;
253e5c9a13eSbalrog     int level = 0;
254e5c9a13eSbalrog     uint32_t new_mask = new_sr & SR_INT_MASK;
255e5c9a13eSbalrog     uint32_t old_mask = r->sr & SR_INT_MASK;
256e5c9a13eSbalrog     uint32_t masks[] = {GS_PIINT, GS_POINT, GS_MINT};
257e5c9a13eSbalrog 
258e5c9a13eSbalrog     if (new_mask ^ old_mask) {
259e5c9a13eSbalrog         /** @todo is IRQ deasserted when only one of status bits is cleared? */
260e5c9a13eSbalrog         if (!new_mask) {
261e5c9a13eSbalrog             event = 1;
262e5c9a13eSbalrog             level = 0;
263e5c9a13eSbalrog         }
264e5c9a13eSbalrog         else {
265e5c9a13eSbalrog             if ((new_mask & SR_LVBCI) && (r->cr & CR_LVBIE)) {
266e5c9a13eSbalrog                 event = 1;
267e5c9a13eSbalrog                 level = 1;
268e5c9a13eSbalrog             }
269e5c9a13eSbalrog             if ((new_mask & SR_BCIS) && (r->cr & CR_IOCE)) {
270e5c9a13eSbalrog                 event = 1;
271e5c9a13eSbalrog                 level = 1;
272e5c9a13eSbalrog             }
273e5c9a13eSbalrog         }
274e5c9a13eSbalrog     }
275e5c9a13eSbalrog 
276e5c9a13eSbalrog     r->sr = new_sr;
277e5c9a13eSbalrog 
278e5c9a13eSbalrog     dolog ("IOC%d LVB%d sr=%#x event=%d level=%d\n",
279e5c9a13eSbalrog            r->sr & SR_BCIS, r->sr & SR_LVBCI,
280e5c9a13eSbalrog            r->sr,
281e5c9a13eSbalrog            event, level);
282e5c9a13eSbalrog 
283e5c9a13eSbalrog     if (!event)
284e5c9a13eSbalrog         return;
285e5c9a13eSbalrog 
286e5c9a13eSbalrog     if (level) {
287e5c9a13eSbalrog         s->glob_sta |= masks[r - s->bm_regs];
288e5c9a13eSbalrog         dolog ("set irq level=1\n");
2899e64f8a3SMarcel Apfelbaum         pci_irq_assert(&s->dev);
290e5c9a13eSbalrog     }
291e5c9a13eSbalrog     else {
292e5c9a13eSbalrog         s->glob_sta &= ~masks[r - s->bm_regs];
293e5c9a13eSbalrog         dolog ("set irq level=0\n");
2949e64f8a3SMarcel Apfelbaum         pci_irq_deassert(&s->dev);
295e5c9a13eSbalrog     }
296e5c9a13eSbalrog }
297e5c9a13eSbalrog 
298e5c9a13eSbalrog static void voice_set_active (AC97LinkState *s, int bm_index, int on)
299e5c9a13eSbalrog {
300e5c9a13eSbalrog     switch (bm_index) {
301e5c9a13eSbalrog     case PI_INDEX:
302e5c9a13eSbalrog         AUD_set_active_in (s->voice_pi, on);
303e5c9a13eSbalrog         break;
304e5c9a13eSbalrog 
305e5c9a13eSbalrog     case PO_INDEX:
306e5c9a13eSbalrog         AUD_set_active_out (s->voice_po, on);
307e5c9a13eSbalrog         break;
308e5c9a13eSbalrog 
309e5c9a13eSbalrog     case MC_INDEX:
310e5c9a13eSbalrog         AUD_set_active_in (s->voice_mc, on);
311e5c9a13eSbalrog         break;
312e5c9a13eSbalrog 
313e5c9a13eSbalrog     default:
314e5c9a13eSbalrog         AUD_log ("ac97", "invalid bm_index(%d) in voice_set_active", bm_index);
315e5c9a13eSbalrog         break;
316e5c9a13eSbalrog     }
317e5c9a13eSbalrog }
318e5c9a13eSbalrog 
319e5c9a13eSbalrog static void reset_bm_regs (AC97LinkState *s, AC97BusMasterRegs *r)
320e5c9a13eSbalrog {
321e5c9a13eSbalrog     dolog ("reset_bm_regs\n");
322e5c9a13eSbalrog     r->bdbar = 0;
323e5c9a13eSbalrog     r->civ = 0;
324e5c9a13eSbalrog     r->lvi = 0;
325e5c9a13eSbalrog     /** todo do we need to do that? */
326e5c9a13eSbalrog     update_sr (s, r, SR_DCH);
327e5c9a13eSbalrog     r->picb = 0;
328e5c9a13eSbalrog     r->piv = 0;
329e5c9a13eSbalrog     r->cr = r->cr & CR_DONT_CLEAR_MASK;
330e5c9a13eSbalrog     r->bd_valid = 0;
331e5c9a13eSbalrog 
332e5c9a13eSbalrog     voice_set_active (s, r - s->bm_regs, 0);
333e5c9a13eSbalrog     memset (s->silence, 0, sizeof (s->silence));
334e5c9a13eSbalrog }
335e5c9a13eSbalrog 
336e5c9a13eSbalrog static void mixer_store (AC97LinkState *s, uint32_t i, uint16_t v)
337e5c9a13eSbalrog {
338e5c9a13eSbalrog     if (i + 2 > sizeof (s->mixer_data)) {
3390148d177SJuan Quintela         dolog ("mixer_store: index %d out of bounds %zd\n",
340e5c9a13eSbalrog                i, sizeof (s->mixer_data));
341e5c9a13eSbalrog         return;
342e5c9a13eSbalrog     }
343e5c9a13eSbalrog 
344e5c9a13eSbalrog     s->mixer_data[i + 0] = v & 0xff;
345e5c9a13eSbalrog     s->mixer_data[i + 1] = v >> 8;
346e5c9a13eSbalrog }
347e5c9a13eSbalrog 
348e5c9a13eSbalrog static uint16_t mixer_load (AC97LinkState *s, uint32_t i)
349e5c9a13eSbalrog {
350e5c9a13eSbalrog     uint16_t val = 0xffff;
351e5c9a13eSbalrog 
352e5c9a13eSbalrog     if (i + 2 > sizeof (s->mixer_data)) {
353a4e652ebSHans de Goede         dolog ("mixer_load: index %d out of bounds %zd\n",
354e5c9a13eSbalrog                i, sizeof (s->mixer_data));
355e5c9a13eSbalrog     }
356e5c9a13eSbalrog     else {
357e5c9a13eSbalrog         val = s->mixer_data[i + 0] | (s->mixer_data[i + 1] << 8);
358e5c9a13eSbalrog     }
359e5c9a13eSbalrog 
360e5c9a13eSbalrog     return val;
361e5c9a13eSbalrog }
362e5c9a13eSbalrog 
363e5c9a13eSbalrog static void open_voice (AC97LinkState *s, int index, int freq)
364e5c9a13eSbalrog {
3651ea879e5Smalc     struct audsettings as;
366e5c9a13eSbalrog 
367e5c9a13eSbalrog     as.freq = freq;
368e5c9a13eSbalrog     as.nchannels = 2;
36985bc5852SKővágó, Zoltán     as.fmt = AUDIO_FORMAT_S16;
370e5c9a13eSbalrog     as.endianness = 0;
371e5c9a13eSbalrog 
3722c44375dSmalc     if (freq > 0) {
3732c44375dSmalc         s->invalid_freq[index] = 0;
374e5c9a13eSbalrog         switch (index) {
375e5c9a13eSbalrog         case PI_INDEX:
376e5c9a13eSbalrog             s->voice_pi = AUD_open_in (
377e5c9a13eSbalrog                 &s->card,
378e5c9a13eSbalrog                 s->voice_pi,
379e5c9a13eSbalrog                 "ac97.pi",
380e5c9a13eSbalrog                 s,
381e5c9a13eSbalrog                 pi_callback,
382e5c9a13eSbalrog                 &as
383e5c9a13eSbalrog                 );
384e5c9a13eSbalrog             break;
385e5c9a13eSbalrog 
386e5c9a13eSbalrog         case PO_INDEX:
387e5c9a13eSbalrog             s->voice_po = AUD_open_out (
388e5c9a13eSbalrog                 &s->card,
389e5c9a13eSbalrog                 s->voice_po,
390e5c9a13eSbalrog                 "ac97.po",
391e5c9a13eSbalrog                 s,
392e5c9a13eSbalrog                 po_callback,
393e5c9a13eSbalrog                 &as
394e5c9a13eSbalrog                 );
395e5c9a13eSbalrog             break;
396e5c9a13eSbalrog 
397e5c9a13eSbalrog         case MC_INDEX:
398e5c9a13eSbalrog             s->voice_mc = AUD_open_in (
399e5c9a13eSbalrog                 &s->card,
400e5c9a13eSbalrog                 s->voice_mc,
401e5c9a13eSbalrog                 "ac97.mc",
402e5c9a13eSbalrog                 s,
403e5c9a13eSbalrog                 mc_callback,
404e5c9a13eSbalrog                 &as
405e5c9a13eSbalrog                 );
406e5c9a13eSbalrog             break;
407e5c9a13eSbalrog         }
408e5c9a13eSbalrog     }
4092c44375dSmalc     else {
4102c44375dSmalc         s->invalid_freq[index] = freq;
4112c44375dSmalc         switch (index) {
4122c44375dSmalc         case PI_INDEX:
4132c44375dSmalc             AUD_close_in (&s->card, s->voice_pi);
4142c44375dSmalc             s->voice_pi = NULL;
4152c44375dSmalc             break;
4162c44375dSmalc 
4172c44375dSmalc         case PO_INDEX:
4182c44375dSmalc             AUD_close_out (&s->card, s->voice_po);
4192c44375dSmalc             s->voice_po = NULL;
4202c44375dSmalc             break;
4212c44375dSmalc 
4222c44375dSmalc         case MC_INDEX:
4232c44375dSmalc             AUD_close_in (&s->card, s->voice_mc);
4242c44375dSmalc             s->voice_mc = NULL;
4252c44375dSmalc             break;
4262c44375dSmalc         }
4272c44375dSmalc     }
4282c44375dSmalc }
429e5c9a13eSbalrog 
430e5c9a13eSbalrog static void reset_voices (AC97LinkState *s, uint8_t active[LAST_INDEX])
431e5c9a13eSbalrog {
432e5c9a13eSbalrog     uint16_t freq;
433e5c9a13eSbalrog 
434e5c9a13eSbalrog     freq = mixer_load (s, AC97_PCM_LR_ADC_Rate);
435e5c9a13eSbalrog     open_voice (s, PI_INDEX, freq);
436e5c9a13eSbalrog     AUD_set_active_in (s->voice_pi, active[PI_INDEX]);
437e5c9a13eSbalrog 
438e5c9a13eSbalrog     freq = mixer_load (s, AC97_PCM_Front_DAC_Rate);
439e5c9a13eSbalrog     open_voice (s, PO_INDEX, freq);
440e5c9a13eSbalrog     AUD_set_active_out (s->voice_po, active[PO_INDEX]);
441e5c9a13eSbalrog 
442e5c9a13eSbalrog     freq = mixer_load (s, AC97_MIC_ADC_Rate);
443e5c9a13eSbalrog     open_voice (s, MC_INDEX, freq);
444e5c9a13eSbalrog     AUD_set_active_in (s->voice_mc, active[MC_INDEX]);
445e5c9a13eSbalrog }
446e5c9a13eSbalrog 
44719677a38SMarc-André Lureau static void get_volume (uint16_t vol, uint16_t mask, int inverse,
44819677a38SMarc-André Lureau                         int *mute, uint8_t *lvol, uint8_t *rvol)
44919677a38SMarc-André Lureau {
45019677a38SMarc-André Lureau     *mute = (vol >> MUTE_SHIFT) & 1;
45119677a38SMarc-André Lureau     *rvol = (255 * (vol & mask)) / mask;
45219677a38SMarc-André Lureau     *lvol = (255 * ((vol >> 8) & mask)) / mask;
45319677a38SMarc-André Lureau 
45419677a38SMarc-André Lureau     if (inverse) {
45519677a38SMarc-André Lureau         *rvol = 255 - *rvol;
45619677a38SMarc-André Lureau         *lvol = 255 - *lvol;
45719677a38SMarc-André Lureau     }
45819677a38SMarc-André Lureau }
45919677a38SMarc-André Lureau 
46019677a38SMarc-André Lureau static void update_combined_volume_out (AC97LinkState *s)
46119677a38SMarc-André Lureau {
46219677a38SMarc-André Lureau     uint8_t lvol, rvol, plvol, prvol;
46319677a38SMarc-André Lureau     int mute, pmute;
46419677a38SMarc-André Lureau 
46519677a38SMarc-André Lureau     get_volume (mixer_load (s, AC97_Master_Volume_Mute), 0x3f, 1,
46619677a38SMarc-André Lureau                 &mute, &lvol, &rvol);
4677873bfb8SHans de Goede     get_volume (mixer_load (s, AC97_PCM_Out_Volume_Mute), 0x1f, 1,
46819677a38SMarc-André Lureau                 &pmute, &plvol, &prvol);
46919677a38SMarc-André Lureau 
47019677a38SMarc-André Lureau     mute = mute | pmute;
47119677a38SMarc-André Lureau     lvol = (lvol * plvol) / 255;
47219677a38SMarc-André Lureau     rvol = (rvol * prvol) / 255;
47319677a38SMarc-André Lureau 
47419677a38SMarc-André Lureau     AUD_set_volume_out (s->voice_po, mute, lvol, rvol);
47519677a38SMarc-André Lureau }
47619677a38SMarc-André Lureau 
47719677a38SMarc-André Lureau static void update_volume_in (AC97LinkState *s)
47819677a38SMarc-André Lureau {
47919677a38SMarc-André Lureau     uint8_t lvol, rvol;
48019677a38SMarc-André Lureau     int mute;
48119677a38SMarc-André Lureau 
48219677a38SMarc-André Lureau     get_volume (mixer_load (s, AC97_Record_Gain_Mute), 0x0f, 0,
48319677a38SMarc-André Lureau                 &mute, &lvol, &rvol);
48419677a38SMarc-André Lureau 
48519677a38SMarc-André Lureau     AUD_set_volume_in (s->voice_pi, mute, lvol, rvol);
48619677a38SMarc-André Lureau }
48719677a38SMarc-André Lureau 
48819677a38SMarc-André Lureau static void set_volume (AC97LinkState *s, int index, uint32_t val)
48919677a38SMarc-André Lureau {
4907873bfb8SHans de Goede     switch (index) {
4917873bfb8SHans de Goede     case AC97_Master_Volume_Mute:
4927873bfb8SHans de Goede         val &= 0xbf3f;
49319677a38SMarc-André Lureau         mixer_store (s, index, val);
49419677a38SMarc-André Lureau         update_combined_volume_out (s);
4957873bfb8SHans de Goede         break;
4967873bfb8SHans de Goede     case AC97_PCM_Out_Volume_Mute:
4977873bfb8SHans de Goede         val &= 0x9f1f;
4987873bfb8SHans de Goede         mixer_store (s, index, val);
4997873bfb8SHans de Goede         update_combined_volume_out (s);
5007873bfb8SHans de Goede         break;
5017873bfb8SHans de Goede     case AC97_Record_Gain_Mute:
5027873bfb8SHans de Goede         val &= 0x8f0f;
5037873bfb8SHans de Goede         mixer_store (s, index, val);
50419677a38SMarc-André Lureau         update_volume_in (s);
5057873bfb8SHans de Goede         break;
50619677a38SMarc-André Lureau     }
50719677a38SMarc-André Lureau }
50819677a38SMarc-André Lureau 
50919677a38SMarc-André Lureau static void record_select (AC97LinkState *s, uint32_t val)
51019677a38SMarc-André Lureau {
51119677a38SMarc-André Lureau     uint8_t rs = val & REC_MASK;
51219677a38SMarc-André Lureau     uint8_t ls = (val >> 8) & REC_MASK;
51319677a38SMarc-André Lureau     mixer_store (s, AC97_Record_Select, rs | (ls << 8));
51419677a38SMarc-André Lureau }
51519677a38SMarc-André Lureau 
516e5c9a13eSbalrog static void mixer_reset (AC97LinkState *s)
517e5c9a13eSbalrog {
518e5c9a13eSbalrog     uint8_t active[LAST_INDEX];
519e5c9a13eSbalrog 
520e5c9a13eSbalrog     dolog ("mixer_reset\n");
521e5c9a13eSbalrog     memset (s->mixer_data, 0, sizeof (s->mixer_data));
522e5c9a13eSbalrog     memset (active, 0, sizeof (active));
523e5c9a13eSbalrog     mixer_store (s, AC97_Reset                   , 0x0000); /* 6940 */
524d044be37SHans de Goede     mixer_store (s, AC97_Headphone_Volume_Mute   , 0x0000);
525d044be37SHans de Goede     mixer_store (s, AC97_Master_Volume_Mono_Mute , 0x0000);
526d044be37SHans de Goede     mixer_store (s, AC97_Master_Tone_RL,           0x0000);
527e5c9a13eSbalrog     mixer_store (s, AC97_PC_BEEP_Volume_Mute     , 0x0000);
528d044be37SHans de Goede     mixer_store (s, AC97_Phone_Volume_Mute       , 0x0000);
529d044be37SHans de Goede     mixer_store (s, AC97_Mic_Volume_Mute         , 0x0000);
530f94e9b9bSHans de Goede     mixer_store (s, AC97_Line_In_Volume_Mute     , 0x0000);
531d044be37SHans de Goede     mixer_store (s, AC97_CD_Volume_Mute          , 0x0000);
532d044be37SHans de Goede     mixer_store (s, AC97_Video_Volume_Mute       , 0x0000);
533d044be37SHans de Goede     mixer_store (s, AC97_Aux_Volume_Mute         , 0x0000);
534d044be37SHans de Goede     mixer_store (s, AC97_Record_Gain_Mic_Mute    , 0x0000);
535e5c9a13eSbalrog     mixer_store (s, AC97_General_Purpose         , 0x0000);
536e5c9a13eSbalrog     mixer_store (s, AC97_3D_Control              , 0x0000);
537e5c9a13eSbalrog     mixer_store (s, AC97_Powerdown_Ctrl_Stat     , 0x000f);
538e5c9a13eSbalrog 
539e5c9a13eSbalrog     /*
540e5c9a13eSbalrog      * Sigmatel 9700 (STAC9700)
541e5c9a13eSbalrog      */
542e5c9a13eSbalrog     mixer_store (s, AC97_Vendor_ID1              , 0x8384);
543e5c9a13eSbalrog     mixer_store (s, AC97_Vendor_ID2              , 0x7600); /* 7608 */
544e5c9a13eSbalrog 
545e5c9a13eSbalrog     mixer_store (s, AC97_Extended_Audio_ID       , 0x0809);
546e5c9a13eSbalrog     mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
547e5c9a13eSbalrog     mixer_store (s, AC97_PCM_Front_DAC_Rate      , 0xbb80);
548e5c9a13eSbalrog     mixer_store (s, AC97_PCM_Surround_DAC_Rate   , 0xbb80);
549e5c9a13eSbalrog     mixer_store (s, AC97_PCM_LFE_DAC_Rate        , 0xbb80);
550e5c9a13eSbalrog     mixer_store (s, AC97_PCM_LR_ADC_Rate         , 0xbb80);
551e5c9a13eSbalrog     mixer_store (s, AC97_MIC_ADC_Rate            , 0xbb80);
552e5c9a13eSbalrog 
55319677a38SMarc-André Lureau     record_select (s, 0);
55419677a38SMarc-André Lureau     set_volume (s, AC97_Master_Volume_Mute, 0x8000);
55519677a38SMarc-André Lureau     set_volume (s, AC97_PCM_Out_Volume_Mute, 0x8808);
556f94e9b9bSHans de Goede     set_volume (s, AC97_Record_Gain_Mute, 0x8808);
55719677a38SMarc-André Lureau 
558e5c9a13eSbalrog     reset_voices (s, active);
559e5c9a13eSbalrog }
560e5c9a13eSbalrog 
561e5c9a13eSbalrog /**
562e5c9a13eSbalrog  * Native audio mixer
563e5c9a13eSbalrog  * I/O Reads
564e5c9a13eSbalrog  */
565e5c9a13eSbalrog static uint32_t nam_readb (void *opaque, uint32_t addr)
566e5c9a13eSbalrog {
56710ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
568e5c9a13eSbalrog     dolog ("U nam readb %#x\n", addr);
569e5c9a13eSbalrog     s->cas = 0;
570e5c9a13eSbalrog     return ~0U;
571e5c9a13eSbalrog }
572e5c9a13eSbalrog 
573e5c9a13eSbalrog static uint32_t nam_readw (void *opaque, uint32_t addr)
574e5c9a13eSbalrog {
57510ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
576e5c9a13eSbalrog     uint32_t val = ~0U;
57783c406d9SAvi Kivity     uint32_t index = addr;
578e5c9a13eSbalrog     s->cas = 0;
579e5c9a13eSbalrog     val = mixer_load (s, index);
580e5c9a13eSbalrog     return val;
581e5c9a13eSbalrog }
582e5c9a13eSbalrog 
583e5c9a13eSbalrog static uint32_t nam_readl (void *opaque, uint32_t addr)
584e5c9a13eSbalrog {
58510ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
586e5c9a13eSbalrog     dolog ("U nam readl %#x\n", addr);
587e5c9a13eSbalrog     s->cas = 0;
588e5c9a13eSbalrog     return ~0U;
589e5c9a13eSbalrog }
590e5c9a13eSbalrog 
591e5c9a13eSbalrog /**
592e5c9a13eSbalrog  * Native audio mixer
593e5c9a13eSbalrog  * I/O Writes
594e5c9a13eSbalrog  */
595e5c9a13eSbalrog static void nam_writeb (void *opaque, uint32_t addr, uint32_t val)
596e5c9a13eSbalrog {
59710ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
598e5c9a13eSbalrog     dolog ("U nam writeb %#x <- %#x\n", addr, val);
599e5c9a13eSbalrog     s->cas = 0;
600e5c9a13eSbalrog }
601e5c9a13eSbalrog 
602e5c9a13eSbalrog static void nam_writew (void *opaque, uint32_t addr, uint32_t val)
603e5c9a13eSbalrog {
60410ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
60583c406d9SAvi Kivity     uint32_t index = addr;
606e5c9a13eSbalrog     s->cas = 0;
607e5c9a13eSbalrog     switch (index) {
608e5c9a13eSbalrog     case AC97_Reset:
609e5c9a13eSbalrog         mixer_reset (s);
610e5c9a13eSbalrog         break;
611e5c9a13eSbalrog     case AC97_Powerdown_Ctrl_Stat:
612847c25d0SHans de Goede         val &= ~0x800f;
613e5c9a13eSbalrog         val |= mixer_load (s, index) & 0xf;
614e5c9a13eSbalrog         mixer_store (s, index, val);
615e5c9a13eSbalrog         break;
61619677a38SMarc-André Lureau     case AC97_PCM_Out_Volume_Mute:
61719677a38SMarc-André Lureau     case AC97_Master_Volume_Mute:
61819677a38SMarc-André Lureau     case AC97_Record_Gain_Mute:
61919677a38SMarc-André Lureau         set_volume (s, index, val);
62019677a38SMarc-André Lureau         break;
62119677a38SMarc-André Lureau     case AC97_Record_Select:
62219677a38SMarc-André Lureau         record_select (s, val);
62319677a38SMarc-André Lureau         break;
624e5c9a13eSbalrog     case AC97_Vendor_ID1:
625e5c9a13eSbalrog     case AC97_Vendor_ID2:
626e5c9a13eSbalrog         dolog ("Attempt to write vendor ID to %#x\n", val);
627e5c9a13eSbalrog         break;
628e5c9a13eSbalrog     case AC97_Extended_Audio_ID:
629e5c9a13eSbalrog         dolog ("Attempt to write extended audio ID to %#x\n", val);
630e5c9a13eSbalrog         break;
631e5c9a13eSbalrog     case AC97_Extended_Audio_Ctrl_Stat:
632e5c9a13eSbalrog         if (!(val & EACS_VRA)) {
633e5c9a13eSbalrog             mixer_store (s, AC97_PCM_Front_DAC_Rate, 0xbb80);
634e5c9a13eSbalrog             mixer_store (s, AC97_PCM_LR_ADC_Rate,    0xbb80);
635e5c9a13eSbalrog             open_voice (s, PI_INDEX, 48000);
636e5c9a13eSbalrog             open_voice (s, PO_INDEX, 48000);
637e5c9a13eSbalrog         }
638e5c9a13eSbalrog         if (!(val & EACS_VRM)) {
639e5c9a13eSbalrog             mixer_store (s, AC97_MIC_ADC_Rate, 0xbb80);
640e5c9a13eSbalrog             open_voice (s, MC_INDEX, 48000);
641e5c9a13eSbalrog         }
642e5c9a13eSbalrog         dolog ("Setting extended audio control to %#x\n", val);
643e5c9a13eSbalrog         mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, val);
644e5c9a13eSbalrog         break;
645e5c9a13eSbalrog     case AC97_PCM_Front_DAC_Rate:
646e5c9a13eSbalrog         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
647e5c9a13eSbalrog             mixer_store (s, index, val);
648e5c9a13eSbalrog             dolog ("Set front DAC rate to %d\n", val);
649e5c9a13eSbalrog             open_voice (s, PO_INDEX, val);
650e5c9a13eSbalrog         }
651e5c9a13eSbalrog         else {
652e5c9a13eSbalrog             dolog ("Attempt to set front DAC rate to %d, "
653e5c9a13eSbalrog                    "but VRA is not set\n",
654e5c9a13eSbalrog                    val);
655e5c9a13eSbalrog         }
656e5c9a13eSbalrog         break;
657e5c9a13eSbalrog     case AC97_MIC_ADC_Rate:
658e5c9a13eSbalrog         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM) {
659e5c9a13eSbalrog             mixer_store (s, index, val);
660e5c9a13eSbalrog             dolog ("Set MIC ADC rate to %d\n", val);
661e5c9a13eSbalrog             open_voice (s, MC_INDEX, val);
662e5c9a13eSbalrog         }
663e5c9a13eSbalrog         else {
664e5c9a13eSbalrog             dolog ("Attempt to set MIC ADC rate to %d, "
665e5c9a13eSbalrog                    "but VRM is not set\n",
666e5c9a13eSbalrog                    val);
667e5c9a13eSbalrog         }
668e5c9a13eSbalrog         break;
669e5c9a13eSbalrog     case AC97_PCM_LR_ADC_Rate:
670e5c9a13eSbalrog         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
671e5c9a13eSbalrog             mixer_store (s, index, val);
672e5c9a13eSbalrog             dolog ("Set front LR ADC rate to %d\n", val);
673e5c9a13eSbalrog             open_voice (s, PI_INDEX, val);
674e5c9a13eSbalrog         }
675e5c9a13eSbalrog         else {
676e5c9a13eSbalrog             dolog ("Attempt to set LR ADC rate to %d, but VRA is not set\n",
677e5c9a13eSbalrog                     val);
678e5c9a13eSbalrog         }
679e5c9a13eSbalrog         break;
680d044be37SHans de Goede     case AC97_Headphone_Volume_Mute:
681d044be37SHans de Goede     case AC97_Master_Volume_Mono_Mute:
682d044be37SHans de Goede     case AC97_Master_Tone_RL:
683d044be37SHans de Goede     case AC97_PC_BEEP_Volume_Mute:
684d044be37SHans de Goede     case AC97_Phone_Volume_Mute:
685d044be37SHans de Goede     case AC97_Mic_Volume_Mute:
686f94e9b9bSHans de Goede     case AC97_Line_In_Volume_Mute:
687d044be37SHans de Goede     case AC97_CD_Volume_Mute:
688d044be37SHans de Goede     case AC97_Video_Volume_Mute:
689d044be37SHans de Goede     case AC97_Aux_Volume_Mute:
690d044be37SHans de Goede     case AC97_Record_Gain_Mic_Mute:
691d044be37SHans de Goede     case AC97_General_Purpose:
692d044be37SHans de Goede     case AC97_3D_Control:
693d044be37SHans de Goede     case AC97_Sigmatel_Analog:
694d044be37SHans de Goede     case AC97_Sigmatel_Dac2Invert:
695d044be37SHans de Goede         /* None of the features in these regs are emulated, so they are RO */
696d044be37SHans de Goede         break;
697e5c9a13eSbalrog     default:
698e5c9a13eSbalrog         dolog ("U nam writew %#x <- %#x\n", addr, val);
699e5c9a13eSbalrog         mixer_store (s, index, val);
700e5c9a13eSbalrog         break;
701e5c9a13eSbalrog     }
702e5c9a13eSbalrog }
703e5c9a13eSbalrog 
704e5c9a13eSbalrog static void nam_writel (void *opaque, uint32_t addr, uint32_t val)
705e5c9a13eSbalrog {
70610ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
707e5c9a13eSbalrog     dolog ("U nam writel %#x <- %#x\n", addr, val);
708e5c9a13eSbalrog     s->cas = 0;
709e5c9a13eSbalrog }
710e5c9a13eSbalrog 
711e5c9a13eSbalrog /**
712e5c9a13eSbalrog  * Native audio bus master
713e5c9a13eSbalrog  * I/O Reads
714e5c9a13eSbalrog  */
715e5c9a13eSbalrog static uint32_t nabm_readb (void *opaque, uint32_t addr)
716e5c9a13eSbalrog {
71710ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
718e5c9a13eSbalrog     AC97BusMasterRegs *r = NULL;
71983c406d9SAvi Kivity     uint32_t index = addr;
720e5c9a13eSbalrog     uint32_t val = ~0U;
721e5c9a13eSbalrog 
722e5c9a13eSbalrog     switch (index) {
723e5c9a13eSbalrog     case CAS:
724e5c9a13eSbalrog         dolog ("CAS %d\n", s->cas);
725e5c9a13eSbalrog         val = s->cas;
726e5c9a13eSbalrog         s->cas = 1;
727e5c9a13eSbalrog         break;
728e5c9a13eSbalrog     case PI_CIV:
729e5c9a13eSbalrog     case PO_CIV:
730e5c9a13eSbalrog     case MC_CIV:
731e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
732e5c9a13eSbalrog         val = r->civ;
733e5c9a13eSbalrog         dolog ("CIV[%d] -> %#x\n", GET_BM (index), val);
734e5c9a13eSbalrog         break;
735e5c9a13eSbalrog     case PI_LVI:
736e5c9a13eSbalrog     case PO_LVI:
737e5c9a13eSbalrog     case MC_LVI:
738e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
739e5c9a13eSbalrog         val = r->lvi;
740e5c9a13eSbalrog         dolog ("LVI[%d] -> %#x\n", GET_BM (index), val);
741e5c9a13eSbalrog         break;
742e5c9a13eSbalrog     case PI_PIV:
743e5c9a13eSbalrog     case PO_PIV:
744e5c9a13eSbalrog     case MC_PIV:
745e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
746e5c9a13eSbalrog         val = r->piv;
747e5c9a13eSbalrog         dolog ("PIV[%d] -> %#x\n", GET_BM (index), val);
748e5c9a13eSbalrog         break;
749e5c9a13eSbalrog     case PI_CR:
750e5c9a13eSbalrog     case PO_CR:
751e5c9a13eSbalrog     case MC_CR:
752e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
753e5c9a13eSbalrog         val = r->cr;
754e5c9a13eSbalrog         dolog ("CR[%d] -> %#x\n", GET_BM (index), val);
755e5c9a13eSbalrog         break;
756e5c9a13eSbalrog     case PI_SR:
757e5c9a13eSbalrog     case PO_SR:
758e5c9a13eSbalrog     case MC_SR:
759e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
760e5c9a13eSbalrog         val = r->sr & 0xff;
761e5c9a13eSbalrog         dolog ("SRb[%d] -> %#x\n", GET_BM (index), val);
762e5c9a13eSbalrog         break;
763e5c9a13eSbalrog     default:
764e5c9a13eSbalrog         dolog ("U nabm readb %#x -> %#x\n", addr, val);
765e5c9a13eSbalrog         break;
766e5c9a13eSbalrog     }
767e5c9a13eSbalrog     return val;
768e5c9a13eSbalrog }
769e5c9a13eSbalrog 
770e5c9a13eSbalrog static uint32_t nabm_readw (void *opaque, uint32_t addr)
771e5c9a13eSbalrog {
77210ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
773e5c9a13eSbalrog     AC97BusMasterRegs *r = NULL;
77483c406d9SAvi Kivity     uint32_t index = addr;
775e5c9a13eSbalrog     uint32_t val = ~0U;
776e5c9a13eSbalrog 
777e5c9a13eSbalrog     switch (index) {
778e5c9a13eSbalrog     case PI_SR:
779e5c9a13eSbalrog     case PO_SR:
780e5c9a13eSbalrog     case MC_SR:
781e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
782e5c9a13eSbalrog         val = r->sr;
783e5c9a13eSbalrog         dolog ("SR[%d] -> %#x\n", GET_BM (index), val);
784e5c9a13eSbalrog         break;
785e5c9a13eSbalrog     case PI_PICB:
786e5c9a13eSbalrog     case PO_PICB:
787e5c9a13eSbalrog     case MC_PICB:
788e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
789e5c9a13eSbalrog         val = r->picb;
790e5c9a13eSbalrog         dolog ("PICB[%d] -> %#x\n", GET_BM (index), val);
791e5c9a13eSbalrog         break;
792e5c9a13eSbalrog     default:
793e5c9a13eSbalrog         dolog ("U nabm readw %#x -> %#x\n", addr, val);
794e5c9a13eSbalrog         break;
795e5c9a13eSbalrog     }
796e5c9a13eSbalrog     return val;
797e5c9a13eSbalrog }
798e5c9a13eSbalrog 
799e5c9a13eSbalrog static uint32_t nabm_readl (void *opaque, uint32_t addr)
800e5c9a13eSbalrog {
80110ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
802e5c9a13eSbalrog     AC97BusMasterRegs *r = NULL;
80383c406d9SAvi Kivity     uint32_t index = addr;
804e5c9a13eSbalrog     uint32_t val = ~0U;
805e5c9a13eSbalrog 
806e5c9a13eSbalrog     switch (index) {
807e5c9a13eSbalrog     case PI_BDBAR:
808e5c9a13eSbalrog     case PO_BDBAR:
809e5c9a13eSbalrog     case MC_BDBAR:
810e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
811e5c9a13eSbalrog         val = r->bdbar;
812e5c9a13eSbalrog         dolog ("BMADDR[%d] -> %#x\n", GET_BM (index), val);
813e5c9a13eSbalrog         break;
814e5c9a13eSbalrog     case PI_CIV:
815e5c9a13eSbalrog     case PO_CIV:
816e5c9a13eSbalrog     case MC_CIV:
817e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
818e5c9a13eSbalrog         val = r->civ | (r->lvi << 8) | (r->sr << 16);
819e5c9a13eSbalrog         dolog ("CIV LVI SR[%d] -> %#x, %#x, %#x\n", GET_BM (index),
820e5c9a13eSbalrog                r->civ, r->lvi, r->sr);
821e5c9a13eSbalrog         break;
822e5c9a13eSbalrog     case PI_PICB:
823e5c9a13eSbalrog     case PO_PICB:
824e5c9a13eSbalrog     case MC_PICB:
825e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
826e5c9a13eSbalrog         val = r->picb | (r->piv << 16) | (r->cr << 24);
827e5c9a13eSbalrog         dolog ("PICB PIV CR[%d] -> %#x %#x %#x %#x\n", GET_BM (index),
828e5c9a13eSbalrog                val, r->picb, r->piv, r->cr);
829e5c9a13eSbalrog         break;
830e5c9a13eSbalrog     case GLOB_CNT:
831e5c9a13eSbalrog         val = s->glob_cnt;
832e5c9a13eSbalrog         dolog ("glob_cnt -> %#x\n", val);
833e5c9a13eSbalrog         break;
834e5c9a13eSbalrog     case GLOB_STA:
835e5c9a13eSbalrog         val = s->glob_sta | GS_S0CR;
836e5c9a13eSbalrog         dolog ("glob_sta -> %#x\n", val);
837e5c9a13eSbalrog         break;
838e5c9a13eSbalrog     default:
839e5c9a13eSbalrog         dolog ("U nabm readl %#x -> %#x\n", addr, val);
840e5c9a13eSbalrog         break;
841e5c9a13eSbalrog     }
842e5c9a13eSbalrog     return val;
843e5c9a13eSbalrog }
844e5c9a13eSbalrog 
845e5c9a13eSbalrog /**
846e5c9a13eSbalrog  * Native audio bus master
847e5c9a13eSbalrog  * I/O Writes
848e5c9a13eSbalrog  */
849e5c9a13eSbalrog static void nabm_writeb (void *opaque, uint32_t addr, uint32_t val)
850e5c9a13eSbalrog {
85110ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
852e5c9a13eSbalrog     AC97BusMasterRegs *r = NULL;
85383c406d9SAvi Kivity     uint32_t index = addr;
854e5c9a13eSbalrog     switch (index) {
855e5c9a13eSbalrog     case PI_LVI:
856e5c9a13eSbalrog     case PO_LVI:
857e5c9a13eSbalrog     case MC_LVI:
858e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
859e5c9a13eSbalrog         if ((r->cr & CR_RPBM) && (r->sr & SR_DCH)) {
860e5c9a13eSbalrog             r->sr &= ~(SR_DCH | SR_CELV);
861e5c9a13eSbalrog             r->civ = r->piv;
862e5c9a13eSbalrog             r->piv = (r->piv + 1) % 32;
863e5c9a13eSbalrog             fetch_bd (s, r);
864e5c9a13eSbalrog         }
865e5c9a13eSbalrog         r->lvi = val % 32;
866e5c9a13eSbalrog         dolog ("LVI[%d] <- %#x\n", GET_BM (index), val);
867e5c9a13eSbalrog         break;
868e5c9a13eSbalrog     case PI_CR:
869e5c9a13eSbalrog     case PO_CR:
870e5c9a13eSbalrog     case MC_CR:
871e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
872e5c9a13eSbalrog         if (val & CR_RR) {
873e5c9a13eSbalrog             reset_bm_regs (s, r);
874e5c9a13eSbalrog         }
875e5c9a13eSbalrog         else {
876e5c9a13eSbalrog             r->cr = val & CR_VALID_MASK;
877e5c9a13eSbalrog             if (!(r->cr & CR_RPBM)) {
878e5c9a13eSbalrog                 voice_set_active (s, r - s->bm_regs, 0);
879e5c9a13eSbalrog                 r->sr |= SR_DCH;
880e5c9a13eSbalrog             }
881e5c9a13eSbalrog             else {
882e5c9a13eSbalrog                 r->civ = r->piv;
883e5c9a13eSbalrog                 r->piv = (r->piv + 1) % 32;
884e5c9a13eSbalrog                 fetch_bd (s, r);
885e5c9a13eSbalrog                 r->sr &= ~SR_DCH;
886e5c9a13eSbalrog                 voice_set_active (s, r - s->bm_regs, 1);
887e5c9a13eSbalrog             }
888e5c9a13eSbalrog         }
889e5c9a13eSbalrog         dolog ("CR[%d] <- %#x (cr %#x)\n", GET_BM (index), val, r->cr);
890e5c9a13eSbalrog         break;
891e5c9a13eSbalrog     case PI_SR:
892e5c9a13eSbalrog     case PO_SR:
893e5c9a13eSbalrog     case MC_SR:
894e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
895e5c9a13eSbalrog         r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
896e5c9a13eSbalrog         update_sr (s, r, r->sr & ~(val & SR_WCLEAR_MASK));
897e5c9a13eSbalrog         dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index), val, r->sr);
898e5c9a13eSbalrog         break;
899e5c9a13eSbalrog     default:
900e5c9a13eSbalrog         dolog ("U nabm writeb %#x <- %#x\n", addr, val);
901e5c9a13eSbalrog         break;
902e5c9a13eSbalrog     }
903e5c9a13eSbalrog }
904e5c9a13eSbalrog 
905e5c9a13eSbalrog static void nabm_writew (void *opaque, uint32_t addr, uint32_t val)
906e5c9a13eSbalrog {
90710ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
908e5c9a13eSbalrog     AC97BusMasterRegs *r = NULL;
90983c406d9SAvi Kivity     uint32_t index = addr;
910e5c9a13eSbalrog     switch (index) {
911e5c9a13eSbalrog     case PI_SR:
912e5c9a13eSbalrog     case PO_SR:
913e5c9a13eSbalrog     case MC_SR:
914e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
915e5c9a13eSbalrog         r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
916e5c9a13eSbalrog         update_sr (s, r, r->sr & ~(val & SR_WCLEAR_MASK));
917e5c9a13eSbalrog         dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index), val, r->sr);
918e5c9a13eSbalrog         break;
919e5c9a13eSbalrog     default:
920e5c9a13eSbalrog         dolog ("U nabm writew %#x <- %#x\n", addr, val);
921e5c9a13eSbalrog         break;
922e5c9a13eSbalrog     }
923e5c9a13eSbalrog }
924e5c9a13eSbalrog 
925e5c9a13eSbalrog static void nabm_writel (void *opaque, uint32_t addr, uint32_t val)
926e5c9a13eSbalrog {
92710ee2aaaSJuan Quintela     AC97LinkState *s = opaque;
928e5c9a13eSbalrog     AC97BusMasterRegs *r = NULL;
92983c406d9SAvi Kivity     uint32_t index = addr;
930e5c9a13eSbalrog     switch (index) {
931e5c9a13eSbalrog     case PI_BDBAR:
932e5c9a13eSbalrog     case PO_BDBAR:
933e5c9a13eSbalrog     case MC_BDBAR:
934e5c9a13eSbalrog         r = &s->bm_regs[GET_BM (index)];
935e5c9a13eSbalrog         r->bdbar = val & ~3;
936e5c9a13eSbalrog         dolog ("BDBAR[%d] <- %#x (bdbar %#x)\n",
937e5c9a13eSbalrog                GET_BM (index), val, r->bdbar);
938e5c9a13eSbalrog         break;
939e5c9a13eSbalrog     case GLOB_CNT:
940e5c9a13eSbalrog         if (val & GC_WR)
941e5c9a13eSbalrog             warm_reset (s);
942e5c9a13eSbalrog         if (val & GC_CR)
943e5c9a13eSbalrog             cold_reset (s);
944e5c9a13eSbalrog         if (!(val & (GC_WR | GC_CR)))
945e5c9a13eSbalrog             s->glob_cnt = val & GC_VALID_MASK;
946e5c9a13eSbalrog         dolog ("glob_cnt <- %#x (glob_cnt %#x)\n", val, s->glob_cnt);
947e5c9a13eSbalrog         break;
948e5c9a13eSbalrog     case GLOB_STA:
949e5c9a13eSbalrog         s->glob_sta &= ~(val & GS_WCLEAR_MASK);
950e5c9a13eSbalrog         s->glob_sta |= (val & ~(GS_WCLEAR_MASK | GS_RO_MASK)) & GS_VALID_MASK;
951e5c9a13eSbalrog         dolog ("glob_sta <- %#x (glob_sta %#x)\n", val, s->glob_sta);
952e5c9a13eSbalrog         break;
953e5c9a13eSbalrog     default:
954e5c9a13eSbalrog         dolog ("U nabm writel %#x <- %#x\n", addr, val);
955e5c9a13eSbalrog         break;
956e5c9a13eSbalrog     }
957e5c9a13eSbalrog }
958e5c9a13eSbalrog 
959e5c9a13eSbalrog static int write_audio (AC97LinkState *s, AC97BusMasterRegs *r,
960e5c9a13eSbalrog                         int max, int *stop)
961e5c9a13eSbalrog {
962e5c9a13eSbalrog     uint8_t tmpbuf[4096];
963e5c9a13eSbalrog     uint32_t addr = r->bd.addr;
964e5c9a13eSbalrog     uint32_t temp = r->picb << 1;
965e5c9a13eSbalrog     uint32_t written = 0;
966e5c9a13eSbalrog     int to_copy = 0;
967e5c9a13eSbalrog     temp = audio_MIN (temp, max);
968e5c9a13eSbalrog 
969e5c9a13eSbalrog     if (!temp) {
970e5c9a13eSbalrog         *stop = 1;
971e5c9a13eSbalrog         return 0;
972e5c9a13eSbalrog     }
973e5c9a13eSbalrog 
974e5c9a13eSbalrog     while (temp) {
975e5c9a13eSbalrog         int copied;
976e5c9a13eSbalrog         to_copy = audio_MIN (temp, sizeof (tmpbuf));
97793f43c48SEduard - Gabriel Munteanu         pci_dma_read (&s->dev, addr, tmpbuf, to_copy);
978e5c9a13eSbalrog         copied = AUD_write (s->voice_po, tmpbuf, to_copy);
979e5c9a13eSbalrog         dolog ("write_audio max=%x to_copy=%x copied=%x\n",
980e5c9a13eSbalrog                max, to_copy, copied);
981e5c9a13eSbalrog         if (!copied) {
982e5c9a13eSbalrog             *stop = 1;
983e5c9a13eSbalrog             break;
984e5c9a13eSbalrog         }
985e5c9a13eSbalrog         temp -= copied;
986e5c9a13eSbalrog         addr += copied;
987e5c9a13eSbalrog         written += copied;
988e5c9a13eSbalrog     }
989e5c9a13eSbalrog 
990e5c9a13eSbalrog     if (!temp) {
991e5c9a13eSbalrog         if (to_copy < 4) {
992e5c9a13eSbalrog             dolog ("whoops\n");
993e5c9a13eSbalrog             s->last_samp = 0;
994e5c9a13eSbalrog         }
995e5c9a13eSbalrog         else {
996e5c9a13eSbalrog             s->last_samp = *(uint32_t *) &tmpbuf[to_copy - 4];
997e5c9a13eSbalrog         }
998e5c9a13eSbalrog     }
999e5c9a13eSbalrog 
1000e5c9a13eSbalrog     r->bd.addr = addr;
1001e5c9a13eSbalrog     return written;
1002e5c9a13eSbalrog }
1003e5c9a13eSbalrog 
1004e5c9a13eSbalrog static void write_bup (AC97LinkState *s, int elapsed)
1005e5c9a13eSbalrog {
1006e5c9a13eSbalrog     dolog ("write_bup\n");
1007e5c9a13eSbalrog     if (!(s->bup_flag & BUP_SET)) {
1008e5c9a13eSbalrog         if (s->bup_flag & BUP_LAST) {
1009e5c9a13eSbalrog             int i;
1010e5c9a13eSbalrog             uint8_t *p = s->silence;
1011e5c9a13eSbalrog             for (i = 0; i < sizeof (s->silence) / 4; i++, p += 4) {
1012e5c9a13eSbalrog                 *(uint32_t *) p = s->last_samp;
1013e5c9a13eSbalrog             }
1014e5c9a13eSbalrog         }
1015e5c9a13eSbalrog         else {
1016e5c9a13eSbalrog             memset (s->silence, 0, sizeof (s->silence));
1017e5c9a13eSbalrog         }
1018e5c9a13eSbalrog         s->bup_flag |= BUP_SET;
1019e5c9a13eSbalrog     }
1020e5c9a13eSbalrog 
1021e5c9a13eSbalrog     while (elapsed) {
1022e5c9a13eSbalrog         int temp = audio_MIN (elapsed, sizeof (s->silence));
1023e5c9a13eSbalrog         while (temp) {
1024e5c9a13eSbalrog             int copied = AUD_write (s->voice_po, s->silence, temp);
1025e5c9a13eSbalrog             if (!copied)
1026e5c9a13eSbalrog                 return;
1027e5c9a13eSbalrog             temp -= copied;
1028e5c9a13eSbalrog             elapsed -= copied;
1029e5c9a13eSbalrog         }
1030e5c9a13eSbalrog     }
1031e5c9a13eSbalrog }
1032e5c9a13eSbalrog 
1033e5c9a13eSbalrog static int read_audio (AC97LinkState *s, AC97BusMasterRegs *r,
1034e5c9a13eSbalrog                        int max, int *stop)
1035e5c9a13eSbalrog {
1036e5c9a13eSbalrog     uint8_t tmpbuf[4096];
1037e5c9a13eSbalrog     uint32_t addr = r->bd.addr;
1038e5c9a13eSbalrog     uint32_t temp = r->picb << 1;
1039e5c9a13eSbalrog     uint32_t nread = 0;
1040e5c9a13eSbalrog     int to_copy = 0;
1041e5c9a13eSbalrog     SWVoiceIn *voice = (r - s->bm_regs) == MC_INDEX ? s->voice_mc : s->voice_pi;
1042e5c9a13eSbalrog 
1043e5c9a13eSbalrog     temp = audio_MIN (temp, max);
1044e5c9a13eSbalrog 
1045e5c9a13eSbalrog     if (!temp) {
1046e5c9a13eSbalrog         *stop = 1;
1047e5c9a13eSbalrog         return 0;
1048e5c9a13eSbalrog     }
1049e5c9a13eSbalrog 
1050e5c9a13eSbalrog     while (temp) {
1051e5c9a13eSbalrog         int acquired;
1052e5c9a13eSbalrog         to_copy = audio_MIN (temp, sizeof (tmpbuf));
1053e5c9a13eSbalrog         acquired = AUD_read (voice, tmpbuf, to_copy);
1054e5c9a13eSbalrog         if (!acquired) {
1055e5c9a13eSbalrog             *stop = 1;
1056e5c9a13eSbalrog             break;
1057e5c9a13eSbalrog         }
105893f43c48SEduard - Gabriel Munteanu         pci_dma_write (&s->dev, addr, tmpbuf, acquired);
1059e5c9a13eSbalrog         temp -= acquired;
1060e5c9a13eSbalrog         addr += acquired;
1061e5c9a13eSbalrog         nread += acquired;
1062e5c9a13eSbalrog     }
1063e5c9a13eSbalrog 
1064e5c9a13eSbalrog     r->bd.addr = addr;
1065e5c9a13eSbalrog     return nread;
1066e5c9a13eSbalrog }
1067e5c9a13eSbalrog 
1068e5c9a13eSbalrog static void transfer_audio (AC97LinkState *s, int index, int elapsed)
1069e5c9a13eSbalrog {
1070e5c9a13eSbalrog     AC97BusMasterRegs *r = &s->bm_regs[index];
10717ba4cbbfSStefan Weil     int stop = 0;
1072e5c9a13eSbalrog 
10732c44375dSmalc     if (s->invalid_freq[index]) {
10742c44375dSmalc         AUD_log ("ac97", "attempt to use voice %d with invalid frequency %d\n",
10752c44375dSmalc                  index, s->invalid_freq[index]);
10762c44375dSmalc         return;
10772c44375dSmalc     }
10782c44375dSmalc 
1079e5c9a13eSbalrog     if (r->sr & SR_DCH) {
1080e5c9a13eSbalrog         if (r->cr & CR_RPBM) {
1081e5c9a13eSbalrog             switch (index) {
1082e5c9a13eSbalrog             case PO_INDEX:
1083e5c9a13eSbalrog                 write_bup (s, elapsed);
1084e5c9a13eSbalrog                 break;
1085e5c9a13eSbalrog             }
1086e5c9a13eSbalrog         }
1087e5c9a13eSbalrog         return;
1088e5c9a13eSbalrog     }
1089e5c9a13eSbalrog 
1090e5c9a13eSbalrog     while ((elapsed >> 1) && !stop) {
1091e5c9a13eSbalrog         int temp;
1092e5c9a13eSbalrog 
1093e5c9a13eSbalrog         if (!r->bd_valid) {
1094e5c9a13eSbalrog             dolog ("invalid bd\n");
1095e5c9a13eSbalrog             fetch_bd (s, r);
1096e5c9a13eSbalrog         }
1097e5c9a13eSbalrog 
1098e5c9a13eSbalrog         if (!r->picb) {
1099e5c9a13eSbalrog             dolog ("fresh bd %d is empty %#x %#x\n",
1100e5c9a13eSbalrog                    r->civ, r->bd.addr, r->bd.ctl_len);
1101e5c9a13eSbalrog             if (r->civ == r->lvi) {
1102e5c9a13eSbalrog                 r->sr |= SR_DCH; /* CELV? */
1103e5c9a13eSbalrog                 s->bup_flag = 0;
1104e5c9a13eSbalrog                 break;
1105e5c9a13eSbalrog             }
1106e5c9a13eSbalrog             r->sr &= ~SR_CELV;
1107e5c9a13eSbalrog             r->civ = r->piv;
1108e5c9a13eSbalrog             r->piv = (r->piv + 1) % 32;
1109e5c9a13eSbalrog             fetch_bd (s, r);
1110e5c9a13eSbalrog             return;
1111e5c9a13eSbalrog         }
1112e5c9a13eSbalrog 
1113e5c9a13eSbalrog         switch (index) {
1114e5c9a13eSbalrog         case PO_INDEX:
1115e5c9a13eSbalrog             temp = write_audio (s, r, elapsed, &stop);
1116e5c9a13eSbalrog             elapsed -= temp;
1117e5c9a13eSbalrog             r->picb -= (temp >> 1);
1118e5c9a13eSbalrog             break;
1119e5c9a13eSbalrog 
1120e5c9a13eSbalrog         case PI_INDEX:
1121e5c9a13eSbalrog         case MC_INDEX:
1122e5c9a13eSbalrog             temp = read_audio (s, r, elapsed, &stop);
1123e5c9a13eSbalrog             elapsed -= temp;
1124e5c9a13eSbalrog             r->picb -= (temp >> 1);
1125e5c9a13eSbalrog             break;
1126e5c9a13eSbalrog         }
1127e5c9a13eSbalrog 
1128e5c9a13eSbalrog         if (!r->picb) {
1129e5c9a13eSbalrog             uint32_t new_sr = r->sr & ~SR_CELV;
1130e5c9a13eSbalrog 
1131e5c9a13eSbalrog             if (r->bd.ctl_len & BD_IOC) {
1132e5c9a13eSbalrog                 new_sr |= SR_BCIS;
1133e5c9a13eSbalrog             }
1134e5c9a13eSbalrog 
1135e5c9a13eSbalrog             if (r->civ == r->lvi) {
1136e5c9a13eSbalrog                 dolog ("Underrun civ (%d) == lvi (%d)\n", r->civ, r->lvi);
1137e5c9a13eSbalrog 
1138e5c9a13eSbalrog                 new_sr |= SR_LVBCI | SR_DCH | SR_CELV;
1139e5c9a13eSbalrog                 stop = 1;
1140e5c9a13eSbalrog                 s->bup_flag = (r->bd.ctl_len & BD_BUP) ? BUP_LAST : 0;
1141e5c9a13eSbalrog             }
1142e5c9a13eSbalrog             else {
1143e5c9a13eSbalrog                 r->civ = r->piv;
1144e5c9a13eSbalrog                 r->piv = (r->piv + 1) % 32;
1145e5c9a13eSbalrog                 fetch_bd (s, r);
1146e5c9a13eSbalrog             }
1147e5c9a13eSbalrog 
1148e5c9a13eSbalrog             update_sr (s, r, new_sr);
1149e5c9a13eSbalrog         }
1150e5c9a13eSbalrog     }
1151e5c9a13eSbalrog }
1152e5c9a13eSbalrog 
1153e5c9a13eSbalrog static void pi_callback (void *opaque, int avail)
1154e5c9a13eSbalrog {
1155e5c9a13eSbalrog     transfer_audio (opaque, PI_INDEX, avail);
1156e5c9a13eSbalrog }
1157e5c9a13eSbalrog 
1158e5c9a13eSbalrog static void mc_callback (void *opaque, int avail)
1159e5c9a13eSbalrog {
1160e5c9a13eSbalrog     transfer_audio (opaque, MC_INDEX, avail);
1161e5c9a13eSbalrog }
1162e5c9a13eSbalrog 
1163e5c9a13eSbalrog static void po_callback (void *opaque, int free)
1164e5c9a13eSbalrog {
1165e5c9a13eSbalrog     transfer_audio (opaque, PO_INDEX, free);
1166e5c9a13eSbalrog }
1167e5c9a13eSbalrog 
1168a90ffa49SJuan Quintela static const VMStateDescription vmstate_ac97_bm_regs = {
1169a90ffa49SJuan Quintela     .name = "ac97_bm_regs",
1170a90ffa49SJuan Quintela     .version_id = 1,
1171a90ffa49SJuan Quintela     .minimum_version_id = 1,
1172a90ffa49SJuan Quintela     .fields = (VMStateField[]) {
1173a90ffa49SJuan Quintela         VMSTATE_UINT32 (bdbar, AC97BusMasterRegs),
1174a90ffa49SJuan Quintela         VMSTATE_UINT8 (civ, AC97BusMasterRegs),
1175a90ffa49SJuan Quintela         VMSTATE_UINT8 (lvi, AC97BusMasterRegs),
1176a90ffa49SJuan Quintela         VMSTATE_UINT16 (sr, AC97BusMasterRegs),
1177a90ffa49SJuan Quintela         VMSTATE_UINT16 (picb, AC97BusMasterRegs),
1178a90ffa49SJuan Quintela         VMSTATE_UINT8 (piv, AC97BusMasterRegs),
1179a90ffa49SJuan Quintela         VMSTATE_UINT8 (cr, AC97BusMasterRegs),
1180a90ffa49SJuan Quintela         VMSTATE_UINT32 (bd_valid, AC97BusMasterRegs),
1181a90ffa49SJuan Quintela         VMSTATE_UINT32 (bd.addr, AC97BusMasterRegs),
1182a90ffa49SJuan Quintela         VMSTATE_UINT32 (bd.ctl_len, AC97BusMasterRegs),
1183a90ffa49SJuan Quintela         VMSTATE_END_OF_LIST ()
1184e5c9a13eSbalrog     }
1185a90ffa49SJuan Quintela };
1186e5c9a13eSbalrog 
1187a90ffa49SJuan Quintela static int ac97_post_load (void *opaque, int version_id)
1188e5c9a13eSbalrog {
1189e5c9a13eSbalrog     uint8_t active[LAST_INDEX];
1190e5c9a13eSbalrog     AC97LinkState *s = opaque;
1191e5c9a13eSbalrog 
119219677a38SMarc-André Lureau     record_select (s, mixer_load (s, AC97_Record_Select));
119319677a38SMarc-André Lureau     set_volume (s, AC97_Master_Volume_Mute,
119419677a38SMarc-André Lureau                 mixer_load (s, AC97_Master_Volume_Mute));
119519677a38SMarc-André Lureau     set_volume (s, AC97_PCM_Out_Volume_Mute,
119619677a38SMarc-André Lureau                 mixer_load (s, AC97_PCM_Out_Volume_Mute));
1197f94e9b9bSHans de Goede     set_volume (s, AC97_Record_Gain_Mute,
1198f94e9b9bSHans de Goede                 mixer_load (s, AC97_Record_Gain_Mute));
119919677a38SMarc-André Lureau 
12007626f39fSJuan Quintela     active[PI_INDEX] = !!(s->bm_regs[PI_INDEX].cr & CR_RPBM);
12017626f39fSJuan Quintela     active[PO_INDEX] = !!(s->bm_regs[PO_INDEX].cr & CR_RPBM);
12027626f39fSJuan Quintela     active[MC_INDEX] = !!(s->bm_regs[MC_INDEX].cr & CR_RPBM);
1203e5c9a13eSbalrog     reset_voices (s, active);
1204e5c9a13eSbalrog 
1205e5c9a13eSbalrog     s->bup_flag = 0;
1206e5c9a13eSbalrog     s->last_samp = 0;
1207e5c9a13eSbalrog     return 0;
1208e5c9a13eSbalrog }
1209e5c9a13eSbalrog 
1210a90ffa49SJuan Quintela static bool is_version_2 (void *opaque, int version_id)
1211a90ffa49SJuan Quintela {
1212a90ffa49SJuan Quintela     return version_id == 2;
1213a90ffa49SJuan Quintela }
1214a90ffa49SJuan Quintela 
1215a90ffa49SJuan Quintela static const VMStateDescription vmstate_ac97 = {
1216a90ffa49SJuan Quintela     .name = "ac97",
1217a90ffa49SJuan Quintela     .version_id = 3,
1218a90ffa49SJuan Quintela     .minimum_version_id = 2,
1219a90ffa49SJuan Quintela     .post_load = ac97_post_load,
1220a90ffa49SJuan Quintela     .fields = (VMStateField[]) {
1221a90ffa49SJuan Quintela         VMSTATE_PCI_DEVICE (dev, AC97LinkState),
1222a90ffa49SJuan Quintela         VMSTATE_UINT32 (glob_cnt, AC97LinkState),
1223a90ffa49SJuan Quintela         VMSTATE_UINT32 (glob_sta, AC97LinkState),
1224a90ffa49SJuan Quintela         VMSTATE_UINT32 (cas, AC97LinkState),
1225a90ffa49SJuan Quintela         VMSTATE_STRUCT_ARRAY (bm_regs, AC97LinkState, 3, 1,
1226a90ffa49SJuan Quintela                               vmstate_ac97_bm_regs, AC97BusMasterRegs),
1227a90ffa49SJuan Quintela         VMSTATE_BUFFER (mixer_data, AC97LinkState),
1228a90ffa49SJuan Quintela         VMSTATE_UNUSED_TEST (is_version_2, 3),
1229a90ffa49SJuan Quintela         VMSTATE_END_OF_LIST ()
1230a90ffa49SJuan Quintela     }
1231a90ffa49SJuan Quintela };
1232a90ffa49SJuan Quintela 
1233d6a6d362SAlexander Graf static uint64_t nam_read(void *opaque, hwaddr addr, unsigned size)
1234d6a6d362SAlexander Graf {
1235d6a6d362SAlexander Graf     if ((addr / size) > 256) {
1236d6a6d362SAlexander Graf         return -1;
1237d6a6d362SAlexander Graf     }
1238d6a6d362SAlexander Graf 
1239d6a6d362SAlexander Graf     switch (size) {
1240d6a6d362SAlexander Graf     case 1:
1241d6a6d362SAlexander Graf         return nam_readb(opaque, addr);
1242d6a6d362SAlexander Graf     case 2:
1243d6a6d362SAlexander Graf         return nam_readw(opaque, addr);
1244d6a6d362SAlexander Graf     case 4:
1245d6a6d362SAlexander Graf         return nam_readl(opaque, addr);
1246d6a6d362SAlexander Graf     default:
1247d6a6d362SAlexander Graf         return -1;
1248d6a6d362SAlexander Graf     }
1249d6a6d362SAlexander Graf }
1250d6a6d362SAlexander Graf 
1251d6a6d362SAlexander Graf static void nam_write(void *opaque, hwaddr addr, uint64_t val,
1252d6a6d362SAlexander Graf                       unsigned size)
1253d6a6d362SAlexander Graf {
1254d6a6d362SAlexander Graf     if ((addr / size) > 256) {
1255d6a6d362SAlexander Graf         return;
1256d6a6d362SAlexander Graf     }
1257d6a6d362SAlexander Graf 
1258d6a6d362SAlexander Graf     switch (size) {
1259d6a6d362SAlexander Graf     case 1:
1260d6a6d362SAlexander Graf         nam_writeb(opaque, addr, val);
1261d6a6d362SAlexander Graf         break;
1262d6a6d362SAlexander Graf     case 2:
1263d6a6d362SAlexander Graf         nam_writew(opaque, addr, val);
1264d6a6d362SAlexander Graf         break;
1265d6a6d362SAlexander Graf     case 4:
1266d6a6d362SAlexander Graf         nam_writel(opaque, addr, val);
1267d6a6d362SAlexander Graf         break;
1268d6a6d362SAlexander Graf     }
1269d6a6d362SAlexander Graf }
1270e5c9a13eSbalrog 
127183c406d9SAvi Kivity static const MemoryRegionOps ac97_io_nam_ops = {
1272d6a6d362SAlexander Graf     .read = nam_read,
1273d6a6d362SAlexander Graf     .write = nam_write,
1274d6a6d362SAlexander Graf     .impl = {
1275d6a6d362SAlexander Graf         .min_access_size = 1,
1276d6a6d362SAlexander Graf         .max_access_size = 4,
1277d6a6d362SAlexander Graf     },
1278d6a6d362SAlexander Graf     .endianness = DEVICE_LITTLE_ENDIAN,
127983c406d9SAvi Kivity };
128083c406d9SAvi Kivity 
1281d6a6d362SAlexander Graf static uint64_t nabm_read(void *opaque, hwaddr addr, unsigned size)
1282d6a6d362SAlexander Graf {
1283d6a6d362SAlexander Graf     if ((addr / size) > 64) {
1284d6a6d362SAlexander Graf         return -1;
1285d6a6d362SAlexander Graf     }
1286d6a6d362SAlexander Graf 
1287d6a6d362SAlexander Graf     switch (size) {
1288d6a6d362SAlexander Graf     case 1:
1289d6a6d362SAlexander Graf         return nabm_readb(opaque, addr);
1290d6a6d362SAlexander Graf     case 2:
1291d6a6d362SAlexander Graf         return nabm_readw(opaque, addr);
1292d6a6d362SAlexander Graf     case 4:
1293d6a6d362SAlexander Graf         return nabm_readl(opaque, addr);
1294d6a6d362SAlexander Graf     default:
1295d6a6d362SAlexander Graf         return -1;
1296d6a6d362SAlexander Graf     }
1297d6a6d362SAlexander Graf }
1298d6a6d362SAlexander Graf 
1299d6a6d362SAlexander Graf static void nabm_write(void *opaque, hwaddr addr, uint64_t val,
1300d6a6d362SAlexander Graf                       unsigned size)
1301d6a6d362SAlexander Graf {
1302d6a6d362SAlexander Graf     if ((addr / size) > 64) {
1303d6a6d362SAlexander Graf         return;
1304d6a6d362SAlexander Graf     }
1305d6a6d362SAlexander Graf 
1306d6a6d362SAlexander Graf     switch (size) {
1307d6a6d362SAlexander Graf     case 1:
1308d6a6d362SAlexander Graf         nabm_writeb(opaque, addr, val);
1309d6a6d362SAlexander Graf         break;
1310d6a6d362SAlexander Graf     case 2:
1311d6a6d362SAlexander Graf         nabm_writew(opaque, addr, val);
1312d6a6d362SAlexander Graf         break;
1313d6a6d362SAlexander Graf     case 4:
1314d6a6d362SAlexander Graf         nabm_writel(opaque, addr, val);
1315d6a6d362SAlexander Graf         break;
1316d6a6d362SAlexander Graf     }
1317d6a6d362SAlexander Graf }
1318d6a6d362SAlexander Graf 
131983c406d9SAvi Kivity 
132083c406d9SAvi Kivity static const MemoryRegionOps ac97_io_nabm_ops = {
1321d6a6d362SAlexander Graf     .read = nabm_read,
1322d6a6d362SAlexander Graf     .write = nabm_write,
1323d6a6d362SAlexander Graf     .impl = {
1324d6a6d362SAlexander Graf         .min_access_size = 1,
1325d6a6d362SAlexander Graf         .max_access_size = 4,
1326d6a6d362SAlexander Graf     },
1327d6a6d362SAlexander Graf     .endianness = DEVICE_LITTLE_ENDIAN,
132883c406d9SAvi Kivity };
1329e5c9a13eSbalrog 
133013377147SGerd Hoffmann static void ac97_on_reset (DeviceState *dev)
1331e5c9a13eSbalrog {
133213377147SGerd Hoffmann     AC97LinkState *s = container_of(dev, AC97LinkState, dev.qdev);
1333e5c9a13eSbalrog 
1334e5c9a13eSbalrog     reset_bm_regs (s, &s->bm_regs[0]);
1335e5c9a13eSbalrog     reset_bm_regs (s, &s->bm_regs[1]);
1336e5c9a13eSbalrog     reset_bm_regs (s, &s->bm_regs[2]);
1337e5c9a13eSbalrog 
1338e5c9a13eSbalrog     /*
1339e5c9a13eSbalrog      * Reset the mixer too. The Windows XP driver seems to rely on
1340e5c9a13eSbalrog      * this. At least it wants to read the vendor id before it resets
1341e5c9a13eSbalrog      * the codec manually.
1342e5c9a13eSbalrog      */
1343e5c9a13eSbalrog     mixer_reset (s);
1344e5c9a13eSbalrog }
1345e5c9a13eSbalrog 
13469af21dbeSMarkus Armbruster static void ac97_realize(PCIDevice *dev, Error **errp)
1347e5c9a13eSbalrog {
1348417d430eSLi Qiang     AC97LinkState *s = AC97(dev);
134910ee2aaaSJuan Quintela     uint8_t *c = s->dev.config;
1350e5c9a13eSbalrog 
13514468fb63SMichael S. Tsirkin     /* TODO: no need to override */
13524468fb63SMichael S. Tsirkin     c[PCI_COMMAND] = 0x00;      /* pcicmd pci command rw, ro */
13534468fb63SMichael S. Tsirkin     c[PCI_COMMAND + 1] = 0x00;
1354e5c9a13eSbalrog 
13554468fb63SMichael S. Tsirkin     /* TODO: */
13564468fb63SMichael S. Tsirkin     c[PCI_STATUS] = PCI_STATUS_FAST_BACK;      /* pcists pci status rwc, ro */
13574468fb63SMichael S. Tsirkin     c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_MEDIUM >> 8;
1358e5c9a13eSbalrog 
13594468fb63SMichael S. Tsirkin     c[PCI_CLASS_PROG] = 0x00;      /* pi programming interface ro */
1360e5c9a13eSbalrog 
13614468fb63SMichael S. Tsirkin     /* TODO set when bar is registered. no need to override. */
13624468fb63SMichael S. Tsirkin     /* nabmar native audio mixer base address rw */
13634468fb63SMichael S. Tsirkin     c[PCI_BASE_ADDRESS_0] = PCI_BASE_ADDRESS_SPACE_IO;
13644468fb63SMichael S. Tsirkin     c[PCI_BASE_ADDRESS_0 + 1] = 0x00;
13654468fb63SMichael S. Tsirkin     c[PCI_BASE_ADDRESS_0 + 2] = 0x00;
13664468fb63SMichael S. Tsirkin     c[PCI_BASE_ADDRESS_0 + 3] = 0x00;
1367e5c9a13eSbalrog 
13684468fb63SMichael S. Tsirkin     /* TODO set when bar is registered. no need to override. */
13694468fb63SMichael S. Tsirkin       /* nabmbar native audio bus mastering base address rw */
13704468fb63SMichael S. Tsirkin     c[PCI_BASE_ADDRESS_0 + 4] = PCI_BASE_ADDRESS_SPACE_IO;
13714468fb63SMichael S. Tsirkin     c[PCI_BASE_ADDRESS_0 + 5] = 0x00;
13724468fb63SMichael S. Tsirkin     c[PCI_BASE_ADDRESS_0 + 6] = 0x00;
13734468fb63SMichael S. Tsirkin     c[PCI_BASE_ADDRESS_0 + 7] = 0x00;
1374e5c9a13eSbalrog 
137525a21c94SGerd Hoffmann     if (s->use_broken_id) {
137625a21c94SGerd Hoffmann         c[PCI_SUBSYSTEM_VENDOR_ID] = 0x86;
13774468fb63SMichael S. Tsirkin         c[PCI_SUBSYSTEM_VENDOR_ID + 1] = 0x80;
137825a21c94SGerd Hoffmann         c[PCI_SUBSYSTEM_ID] = 0x00;
13794468fb63SMichael S. Tsirkin         c[PCI_SUBSYSTEM_ID + 1] = 0x00;
138025a21c94SGerd Hoffmann     }
1381e5c9a13eSbalrog 
13824468fb63SMichael S. Tsirkin     c[PCI_INTERRUPT_LINE] = 0x00;      /* intr_ln interrupt line rw */
13834468fb63SMichael S. Tsirkin     c[PCI_INTERRUPT_PIN] = 0x01;      /* intr_pn interrupt pin ro */
1384e5c9a13eSbalrog 
138564bde0f3SPaolo Bonzini     memory_region_init_io (&s->io_nam, OBJECT(s), &ac97_io_nam_ops, s,
138664bde0f3SPaolo Bonzini                            "ac97-nam", 1024);
138764bde0f3SPaolo Bonzini     memory_region_init_io (&s->io_nabm, OBJECT(s), &ac97_io_nabm_ops, s,
138864bde0f3SPaolo Bonzini                            "ac97-nabm", 256);
1389e824b2ccSAvi Kivity     pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nam);
1390e824b2ccSAvi Kivity     pci_register_bar (&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nabm);
13911a7dafceSmalc     AUD_register_card ("ac97", &s->card);
13920ce5e020SPhilippe Mathieu-Daudé     ac97_on_reset(DEVICE(s));
1393d88a76d1SGerd Hoffmann }
1394d88a76d1SGerd Hoffmann 
139512351a91SLi Qiang static void ac97_exit(PCIDevice *dev)
139612351a91SLi Qiang {
1397417d430eSLi Qiang     AC97LinkState *s = AC97(dev);
139812351a91SLi Qiang 
139912351a91SLi Qiang     AUD_close_in(&s->card, s->voice_pi);
140012351a91SLi Qiang     AUD_close_out(&s->card, s->voice_po);
140112351a91SLi Qiang     AUD_close_in(&s->card, s->voice_mc);
140212351a91SLi Qiang     AUD_remove_card(&s->card);
140312351a91SLi Qiang }
140412351a91SLi Qiang 
140536cd6f6fSPaolo Bonzini static int ac97_init (PCIBus *bus)
1406d88a76d1SGerd Hoffmann {
1407417d430eSLi Qiang     pci_create_simple(bus, -1, TYPE_AC97);
1408e5c9a13eSbalrog     return 0;
1409e5c9a13eSbalrog }
1410d88a76d1SGerd Hoffmann 
141140021f08SAnthony Liguori static Property ac97_properties[] = {
141225a21c94SGerd Hoffmann     DEFINE_PROP_UINT32 ("use_broken_id", AC97LinkState, use_broken_id, 0),
141325a21c94SGerd Hoffmann     DEFINE_PROP_END_OF_LIST (),
141440021f08SAnthony Liguori };
141540021f08SAnthony Liguori 
141640021f08SAnthony Liguori static void ac97_class_init (ObjectClass *klass, void *data)
141740021f08SAnthony Liguori {
141839bffca2SAnthony Liguori     DeviceClass *dc = DEVICE_CLASS (klass);
141940021f08SAnthony Liguori     PCIDeviceClass *k = PCI_DEVICE_CLASS (klass);
142040021f08SAnthony Liguori 
14219af21dbeSMarkus Armbruster     k->realize = ac97_realize;
142212351a91SLi Qiang     k->exit = ac97_exit;
142340021f08SAnthony Liguori     k->vendor_id = PCI_VENDOR_ID_INTEL;
142440021f08SAnthony Liguori     k->device_id = PCI_DEVICE_ID_INTEL_82801AA_5;
142540021f08SAnthony Liguori     k->revision = 0x01;
142640021f08SAnthony Liguori     k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
1427125ee0edSMarcel Apfelbaum     set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
142839bffca2SAnthony Liguori     dc->desc = "Intel 82801AA AC97 Audio";
142939bffca2SAnthony Liguori     dc->vmsd = &vmstate_ac97;
143039bffca2SAnthony Liguori     dc->props = ac97_properties;
143113377147SGerd Hoffmann     dc->reset = ac97_on_reset;
143225a21c94SGerd Hoffmann }
143340021f08SAnthony Liguori 
14348c43a6f0SAndreas Färber static const TypeInfo ac97_info = {
1435417d430eSLi Qiang     .name          = TYPE_AC97,
143639bffca2SAnthony Liguori     .parent        = TYPE_PCI_DEVICE,
143739bffca2SAnthony Liguori     .instance_size = sizeof (AC97LinkState),
143840021f08SAnthony Liguori     .class_init    = ac97_class_init,
1439fd3b02c8SEduardo Habkost     .interfaces = (InterfaceInfo[]) {
1440fd3b02c8SEduardo Habkost         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
1441fd3b02c8SEduardo Habkost         { },
1442fd3b02c8SEduardo Habkost     },
1443d88a76d1SGerd Hoffmann };
1444d88a76d1SGerd Hoffmann 
144583f7d43aSAndreas Färber static void ac97_register_types (void)
1446d88a76d1SGerd Hoffmann {
144739bffca2SAnthony Liguori     type_register_static (&ac97_info);
144836cd6f6fSPaolo Bonzini     pci_register_soundhw("ac97", "Intel 82801AA AC97 Audio", ac97_init);
1449d88a76d1SGerd Hoffmann }
1450d88a76d1SGerd Hoffmann 
145183f7d43aSAndreas Färber type_init (ac97_register_types)
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