1 /* 2 * Xilinx ZynqMP ZCU102 board 3 * 4 * Copyright (C) 2015 Xilinx Inc 5 * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qapi/error.h" 20 #include "qemu-common.h" 21 #include "cpu.h" 22 #include "hw/arm/xlnx-zynqmp.h" 23 #include "hw/boards.h" 24 #include "qemu/error-report.h" 25 #include "qemu/log.h" 26 #include "sysemu/qtest.h" 27 28 typedef struct XlnxZCU102 { 29 MachineState parent_obj; 30 31 XlnxZynqMPState soc; 32 MemoryRegion ddr_ram; 33 34 bool secure; 35 bool virt; 36 } XlnxZCU102; 37 38 #define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102") 39 #define ZCU102_MACHINE(obj) \ 40 OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE) 41 42 #define TYPE_EP108_MACHINE MACHINE_TYPE_NAME("xlnx-ep108") 43 #define EP108_MACHINE(obj) \ 44 OBJECT_CHECK(XlnxZCU102, (obj), TYPE_EP108_MACHINE) 45 46 static struct arm_boot_info xlnx_zcu102_binfo; 47 48 static bool zcu102_get_secure(Object *obj, Error **errp) 49 { 50 XlnxZCU102 *s = ZCU102_MACHINE(obj); 51 52 return s->secure; 53 } 54 55 static void zcu102_set_secure(Object *obj, bool value, Error **errp) 56 { 57 XlnxZCU102 *s = ZCU102_MACHINE(obj); 58 59 s->secure = value; 60 } 61 62 static bool zcu102_get_virt(Object *obj, Error **errp) 63 { 64 XlnxZCU102 *s = ZCU102_MACHINE(obj); 65 66 return s->virt; 67 } 68 69 static void zcu102_set_virt(Object *obj, bool value, Error **errp) 70 { 71 XlnxZCU102 *s = ZCU102_MACHINE(obj); 72 73 s->virt = value; 74 } 75 76 static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine) 77 { 78 int i; 79 uint64_t ram_size = machine->ram_size; 80 81 /* Create the memory region to pass to the SoC */ 82 if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) { 83 error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of " 84 "0x%llx", ram_size, 85 XLNX_ZYNQMP_MAX_RAM_SIZE); 86 exit(1); 87 } 88 89 if (ram_size < 0x08000000) { 90 qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102", 91 ram_size); 92 } 93 94 memory_region_allocate_system_memory(&s->ddr_ram, NULL, "ddr-ram", 95 ram_size); 96 97 object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP); 98 object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), 99 &error_abort); 100 101 object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram), 102 "ddr-ram", &error_abort); 103 object_property_set_bool(OBJECT(&s->soc), s->secure, "secure", 104 &error_fatal); 105 object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization", 106 &error_fatal); 107 108 object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); 109 110 /* Create and plug in the SD cards */ 111 for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) { 112 BusState *bus; 113 DriveInfo *di = drive_get_next(IF_SD); 114 BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL; 115 DeviceState *carddev; 116 char *bus_name; 117 118 bus_name = g_strdup_printf("sd-bus%d", i); 119 bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name); 120 g_free(bus_name); 121 if (!bus) { 122 error_report("No SD bus found for SD card %d", i); 123 exit(1); 124 } 125 carddev = qdev_create(bus, TYPE_SD_CARD); 126 qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); 127 object_property_set_bool(OBJECT(carddev), true, "realized", 128 &error_fatal); 129 } 130 131 for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { 132 SSIBus *spi_bus; 133 DeviceState *flash_dev; 134 qemu_irq cs_line; 135 DriveInfo *dinfo = drive_get_next(IF_MTD); 136 gchar *bus_name = g_strdup_printf("spi%d", i); 137 138 spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name); 139 g_free(bus_name); 140 141 flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080"); 142 if (dinfo) { 143 qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo), 144 &error_fatal); 145 } 146 qdev_init_nofail(flash_dev); 147 148 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); 149 150 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line); 151 } 152 153 for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) { 154 SSIBus *spi_bus; 155 DeviceState *flash_dev; 156 qemu_irq cs_line; 157 DriveInfo *dinfo = drive_get_next(IF_MTD); 158 int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS; 159 gchar *bus_name = g_strdup_printf("qspi%d", bus); 160 161 spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name); 162 g_free(bus_name); 163 164 flash_dev = ssi_create_slave_no_init(spi_bus, "n25q512a11"); 165 if (dinfo) { 166 qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo), 167 &error_fatal); 168 } 169 qdev_init_nofail(flash_dev); 170 171 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); 172 173 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line); 174 } 175 176 /* TODO create and connect IDE devices for ide_drive_get() */ 177 178 xlnx_zcu102_binfo.ram_size = ram_size; 179 xlnx_zcu102_binfo.kernel_filename = machine->kernel_filename; 180 xlnx_zcu102_binfo.kernel_cmdline = machine->kernel_cmdline; 181 xlnx_zcu102_binfo.initrd_filename = machine->initrd_filename; 182 xlnx_zcu102_binfo.loader_start = 0; 183 arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo); 184 } 185 186 static void xlnx_ep108_init(MachineState *machine) 187 { 188 XlnxZCU102 *s = EP108_MACHINE(machine); 189 190 if (!qtest_enabled()) { 191 info_report("The Xilinx EP108 machine is deprecated, please use the " 192 "ZCU102 machine (which has the same features) instead."); 193 } 194 195 xlnx_zynqmp_init(s, machine); 196 } 197 198 static void xlnx_ep108_machine_instance_init(Object *obj) 199 { 200 XlnxZCU102 *s = EP108_MACHINE(obj); 201 202 /* EP108, we don't support setting secure or virt */ 203 s->secure = false; 204 s->virt = false; 205 } 206 207 static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data) 208 { 209 MachineClass *mc = MACHINE_CLASS(oc); 210 211 mc->desc = "Xilinx ZynqMP EP108 board (Deprecated, please use xlnx-zcu102)"; 212 mc->init = xlnx_ep108_init; 213 mc->block_default_type = IF_IDE; 214 mc->units_per_default_bus = 1; 215 mc->ignore_memory_transaction_failures = true; 216 mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; 217 mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS; 218 } 219 220 static const TypeInfo xlnx_ep108_machine_init_typeinfo = { 221 .name = MACHINE_TYPE_NAME("xlnx-ep108"), 222 .parent = TYPE_MACHINE, 223 .class_init = xlnx_ep108_machine_class_init, 224 .instance_init = xlnx_ep108_machine_instance_init, 225 .instance_size = sizeof(XlnxZCU102), 226 }; 227 228 static void xlnx_ep108_machine_init_register_types(void) 229 { 230 type_register_static(&xlnx_ep108_machine_init_typeinfo); 231 } 232 233 static void xlnx_zcu102_init(MachineState *machine) 234 { 235 XlnxZCU102 *s = ZCU102_MACHINE(machine); 236 237 xlnx_zynqmp_init(s, machine); 238 } 239 240 static void xlnx_zcu102_machine_instance_init(Object *obj) 241 { 242 XlnxZCU102 *s = ZCU102_MACHINE(obj); 243 244 /* Default to secure mode being disabled */ 245 s->secure = false; 246 object_property_add_bool(obj, "secure", zcu102_get_secure, 247 zcu102_set_secure, NULL); 248 object_property_set_description(obj, "secure", 249 "Set on/off to enable/disable the ARM " 250 "Security Extensions (TrustZone)", 251 NULL); 252 253 /* Default to virt (EL2) being disabled */ 254 s->virt = false; 255 object_property_add_bool(obj, "virtualization", zcu102_get_virt, 256 zcu102_set_virt, NULL); 257 object_property_set_description(obj, "virtualization", 258 "Set on/off to enable/disable emulating a " 259 "guest CPU which implements the ARM " 260 "Virtualization Extensions", 261 NULL); 262 } 263 264 static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) 265 { 266 MachineClass *mc = MACHINE_CLASS(oc); 267 268 mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5s based on " \ 269 "the value of smp"; 270 mc->init = xlnx_zcu102_init; 271 mc->block_default_type = IF_IDE; 272 mc->units_per_default_bus = 1; 273 mc->ignore_memory_transaction_failures = true; 274 mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; 275 mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS; 276 } 277 278 static const TypeInfo xlnx_zcu102_machine_init_typeinfo = { 279 .name = MACHINE_TYPE_NAME("xlnx-zcu102"), 280 .parent = TYPE_MACHINE, 281 .class_init = xlnx_zcu102_machine_class_init, 282 .instance_init = xlnx_zcu102_machine_instance_init, 283 .instance_size = sizeof(XlnxZCU102), 284 }; 285 286 static void xlnx_zcu102_machine_init_register_types(void) 287 { 288 type_register_static(&xlnx_zcu102_machine_init_typeinfo); 289 } 290 291 type_init(xlnx_zcu102_machine_init_register_types) 292 type_init(xlnx_ep108_machine_init_register_types) 293