1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * Raspberry Pi 3 emulation Copyright (c) 2018 Zoltán Baldaszti 9 * Upstream code cleanup (c) 2018 Pekka Enberg 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2 or later. 12 * See the COPYING file in the top-level directory. 13 */ 14 15 #include "qemu/osdep.h" 16 #include "qemu/units.h" 17 #include "qemu/cutils.h" 18 #include "qapi/error.h" 19 #include "hw/arm/boot.h" 20 #include "hw/arm/bcm2836.h" 21 #include "hw/arm/raspi_platform.h" 22 #include "hw/registerfields.h" 23 #include "qemu/error-report.h" 24 #include "hw/boards.h" 25 #include "hw/loader.h" 26 #include "hw/arm/boot.h" 27 #include "qom/object.h" 28 29 #define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common") 30 OBJECT_DECLARE_SIMPLE_TYPE(RaspiMachineState, RASPI_MACHINE) 31 32 #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */ 33 #define MVBAR_ADDR 0x400 /* secure vectors */ 34 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */ 35 #define FIRMWARE_ADDR_2 0x8000 /* Pi 2 loads kernel.img here by default */ 36 #define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */ 37 #define SPINTABLE_ADDR 0xd8 /* Pi 3 bootloader spintable */ 38 39 /* Registered machine type (matches RPi Foundation bootloader and U-Boot) */ 40 #define MACH_TYPE_BCM2708 3138 41 42 struct RaspiMachineState { 43 /*< private >*/ 44 RaspiBaseMachineState parent_obj; 45 /*< public >*/ 46 BCM283XState soc; 47 }; 48 49 /* 50 * Board revision codes: 51 * www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/ 52 */ 53 FIELD(REV_CODE, REVISION, 0, 4); 54 FIELD(REV_CODE, TYPE, 4, 8); 55 FIELD(REV_CODE, PROCESSOR, 12, 4); 56 FIELD(REV_CODE, MANUFACTURER, 16, 4); 57 FIELD(REV_CODE, MEMORY_SIZE, 20, 3); 58 FIELD(REV_CODE, STYLE, 23, 1); 59 60 typedef enum RaspiProcessorId { 61 PROCESSOR_ID_BCM2835 = 0, 62 PROCESSOR_ID_BCM2836 = 1, 63 PROCESSOR_ID_BCM2837 = 2, 64 } RaspiProcessorId; 65 66 static const struct { 67 const char *type; 68 int cores_count; 69 } soc_property[] = { 70 [PROCESSOR_ID_BCM2835] = {TYPE_BCM2835, 1}, 71 [PROCESSOR_ID_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS}, 72 [PROCESSOR_ID_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS}, 73 }; 74 75 static void raspi_base_machine_init(MachineState *machine, 76 BCM283XBaseState *soc); 77 static void raspi_machine_class_common_init(MachineClass *mc, 78 uint32_t board_rev); 79 80 static uint64_t board_ram_size(uint32_t board_rev) 81 { 82 assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */ 83 return 256 * MiB << FIELD_EX32(board_rev, REV_CODE, MEMORY_SIZE); 84 } 85 86 static RaspiProcessorId board_processor_id(uint32_t board_rev) 87 { 88 int proc_id = FIELD_EX32(board_rev, REV_CODE, PROCESSOR); 89 90 assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */ 91 assert(proc_id < ARRAY_SIZE(soc_property) && soc_property[proc_id].type); 92 93 return proc_id; 94 } 95 96 static const char *board_soc_type(uint32_t board_rev) 97 { 98 return soc_property[board_processor_id(board_rev)].type; 99 } 100 101 static int cores_count(uint32_t board_rev) 102 { 103 return soc_property[board_processor_id(board_rev)].cores_count; 104 } 105 106 static const char *board_type(uint32_t board_rev) 107 { 108 static const char *types[] = { 109 "A", "B", "A+", "B+", "2B", "Alpha", "CM1", NULL, "3B", "Zero", 110 "CM3", NULL, "Zero W", "3B+", "3A+", NULL, "CM3+", "4B", 111 }; 112 assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */ 113 int bt = FIELD_EX32(board_rev, REV_CODE, TYPE); 114 if (bt >= ARRAY_SIZE(types) || !types[bt]) { 115 return "Unknown"; 116 } 117 return types[bt]; 118 } 119 120 static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info) 121 { 122 static const ARMInsnFixup smpboot[] = { 123 { 0xe1a0e00f }, /* mov lr, pc */ 124 { 0xe3a0fe00 + (BOARDSETUP_ADDR >> 4) }, /* mov pc, BOARDSETUP_ADDR */ 125 { 0xee100fb0 }, /* mrc p15, 0, r0, c0, c0, 5;get core ID */ 126 { 0xe7e10050 }, /* ubfx r0, r0, #0, #2 ;extract LSB */ 127 { 0xe59f5014 }, /* ldr r5, =0x400000CC ;load mbox base */ 128 { 0xe320f001 }, /* 1: yield */ 129 { 0xe7953200 }, /* ldr r3, [r5, r0, lsl #4] ;read mbox for our core */ 130 { 0xe3530000 }, /* cmp r3, #0 ;spin while zero */ 131 { 0x0afffffb }, /* beq 1b */ 132 { 0xe7853200 }, /* str r3, [r5, r0, lsl #4] ;clear mbox */ 133 { 0xe12fff13 }, /* bx r3 ;jump to target */ 134 { 0x400000cc }, /* (constant: mailbox 3 read/clear base) */ 135 { 0, FIXUP_TERMINATOR } 136 }; 137 static const uint32_t fixupcontext[FIXUP_MAX] = { 0 }; 138 139 /* check that we don't overrun board setup vectors */ 140 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); 141 /* check that board setup address is correctly relocated */ 142 QEMU_BUILD_BUG_ON((BOARDSETUP_ADDR & 0xf) != 0 143 || (BOARDSETUP_ADDR >> 4) >= 0x100); 144 145 arm_write_bootloader("raspi_smpboot", arm_boot_address_space(cpu, info), 146 info->smp_loader_start, smpboot, fixupcontext); 147 } 148 149 static void write_smpboot64(ARMCPU *cpu, const struct arm_boot_info *info) 150 { 151 AddressSpace *as = arm_boot_address_space(cpu, info); 152 /* Unlike the AArch32 version we don't need to call the board setup hook. 153 * The mechanism for doing the spin-table is also entirely different. 154 * We must have four 64-bit fields at absolute addresses 155 * 0xd8, 0xe0, 0xe8, 0xf0 in RAM, which are the flag variables for 156 * our CPUs, and which we must ensure are zero initialized before 157 * the primary CPU goes into the kernel. We put these variables inside 158 * a rom blob, so that the reset for ROM contents zeroes them for us. 159 */ 160 static const ARMInsnFixup smpboot[] = { 161 { 0xd2801b05 }, /* mov x5, 0xd8 */ 162 { 0xd53800a6 }, /* mrs x6, mpidr_el1 */ 163 { 0x924004c6 }, /* and x6, x6, #0x3 */ 164 { 0xd503205f }, /* spin: wfe */ 165 { 0xf86678a4 }, /* ldr x4, [x5,x6,lsl #3] */ 166 { 0xb4ffffc4 }, /* cbz x4, spin */ 167 { 0xd2800000 }, /* mov x0, #0x0 */ 168 { 0xd2800001 }, /* mov x1, #0x0 */ 169 { 0xd2800002 }, /* mov x2, #0x0 */ 170 { 0xd2800003 }, /* mov x3, #0x0 */ 171 { 0xd61f0080 }, /* br x4 */ 172 { 0, FIXUP_TERMINATOR } 173 }; 174 static const uint32_t fixupcontext[FIXUP_MAX] = { 0 }; 175 176 static const uint64_t spintables[] = { 177 0, 0, 0, 0 178 }; 179 180 arm_write_bootloader("raspi_smpboot", as, info->smp_loader_start, 181 smpboot, fixupcontext); 182 rom_add_blob_fixed_as("raspi_spintables", spintables, sizeof(spintables), 183 SPINTABLE_ADDR, as); 184 } 185 186 static void write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info) 187 { 188 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); 189 } 190 191 static void reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info) 192 { 193 CPUState *cs = CPU(cpu); 194 cpu_set_pc(cs, info->smp_loader_start); 195 } 196 197 static void setup_boot(MachineState *machine, ARMCPU *cpu, 198 RaspiProcessorId processor_id, size_t ram_size) 199 { 200 RaspiBaseMachineState *s = RASPI_BASE_MACHINE(machine); 201 int r; 202 203 s->binfo.ram_size = ram_size; 204 205 if (processor_id <= PROCESSOR_ID_BCM2836) { 206 /* 207 * The BCM2835 and BCM2836 require some custom setup code to run 208 * in Secure mode before booting a kernel (to set up the SMC vectors 209 * so that we get a no-op SMC; this is used by Linux to call the 210 * firmware for some cache maintenance operations. 211 * The BCM2837 doesn't need this. 212 */ 213 s->binfo.board_setup_addr = BOARDSETUP_ADDR; 214 s->binfo.write_board_setup = write_board_setup; 215 s->binfo.secure_board_setup = true; 216 s->binfo.secure_boot = true; 217 } 218 219 /* BCM2836 and BCM2837 requires SMP setup */ 220 if (processor_id >= PROCESSOR_ID_BCM2836) { 221 s->binfo.smp_loader_start = SMPBOOT_ADDR; 222 if (processor_id == PROCESSOR_ID_BCM2836) { 223 s->binfo.write_secondary_boot = write_smpboot; 224 } else { 225 s->binfo.write_secondary_boot = write_smpboot64; 226 } 227 s->binfo.secondary_cpu_reset_hook = reset_secondary; 228 } 229 230 /* If the user specified a "firmware" image (e.g. UEFI), we bypass 231 * the normal Linux boot process 232 */ 233 if (machine->firmware) { 234 hwaddr firmware_addr = processor_id <= PROCESSOR_ID_BCM2836 235 ? FIRMWARE_ADDR_2 : FIRMWARE_ADDR_3; 236 /* load the firmware image (typically kernel.img) */ 237 r = load_image_targphys(machine->firmware, firmware_addr, 238 ram_size - firmware_addr); 239 if (r < 0) { 240 error_report("Failed to load firmware from %s", machine->firmware); 241 exit(1); 242 } 243 244 s->binfo.entry = firmware_addr; 245 s->binfo.firmware_loaded = true; 246 } 247 248 arm_load_kernel(cpu, machine, &s->binfo); 249 } 250 251 static void raspi_base_machine_init(MachineState *machine, 252 BCM283XBaseState *soc) 253 { 254 RaspiBaseMachineClass *mc = RASPI_BASE_MACHINE_GET_CLASS(machine); 255 uint32_t board_rev = mc->board_rev; 256 uint64_t ram_size = board_ram_size(board_rev); 257 uint32_t vcram_size; 258 DriveInfo *di; 259 BlockBackend *blk; 260 BusState *bus; 261 DeviceState *carddev; 262 263 if (machine->ram_size != ram_size) { 264 char *size_str = size_to_str(ram_size); 265 error_report("Invalid RAM size, should be %s", size_str); 266 g_free(size_str); 267 exit(1); 268 } 269 270 /* FIXME: Remove when we have custom CPU address space support */ 271 memory_region_add_subregion_overlap(get_system_memory(), 0, 272 machine->ram, 0); 273 274 /* Setup the SOC */ 275 object_property_add_const_link(OBJECT(soc), "ram", OBJECT(machine->ram)); 276 object_property_set_int(OBJECT(soc), "board-rev", board_rev, 277 &error_abort); 278 object_property_set_str(OBJECT(soc), "command-line", 279 machine->kernel_cmdline, &error_abort); 280 qdev_realize(DEVICE(soc), NULL, &error_fatal); 281 282 /* Create and plug in the SD cards */ 283 di = drive_get(IF_SD, 0, 0); 284 blk = di ? blk_by_legacy_dinfo(di) : NULL; 285 bus = qdev_get_child_bus(DEVICE(soc), "sd-bus"); 286 if (bus == NULL) { 287 error_report("No SD bus found in SOC object"); 288 exit(1); 289 } 290 carddev = qdev_new(TYPE_SD_CARD); 291 qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal); 292 qdev_realize_and_unref(carddev, bus, &error_fatal); 293 294 vcram_size = object_property_get_uint(OBJECT(soc), "vcram-size", 295 &error_abort); 296 setup_boot(machine, &soc->cpu[0].core, board_processor_id(board_rev), 297 machine->ram_size - vcram_size); 298 } 299 300 static void raspi_machine_init(MachineState *machine) 301 { 302 RaspiMachineState *s = RASPI_MACHINE(machine); 303 RaspiBaseMachineState *s_base = RASPI_BASE_MACHINE(machine); 304 RaspiBaseMachineClass *mc = RASPI_BASE_MACHINE_GET_CLASS(machine); 305 BCM283XState *soc = &s->soc; 306 307 s_base->binfo.board_id = MACH_TYPE_BCM2708; 308 309 object_initialize_child(OBJECT(machine), "soc", soc, 310 board_soc_type(mc->board_rev)); 311 raspi_base_machine_init(machine, &soc->parent_obj); 312 } 313 314 void raspi_machine_class_common_init(MachineClass *mc, 315 uint32_t board_rev) 316 { 317 mc->desc = g_strdup_printf("Raspberry Pi %s (revision 1.%u)", 318 board_type(board_rev), 319 FIELD_EX32(board_rev, REV_CODE, REVISION)); 320 mc->block_default_type = IF_SD; 321 mc->no_parallel = 1; 322 mc->no_floppy = 1; 323 mc->no_cdrom = 1; 324 mc->default_cpus = mc->min_cpus = mc->max_cpus = cores_count(board_rev); 325 mc->default_ram_size = board_ram_size(board_rev); 326 mc->default_ram_id = "ram"; 327 }; 328 329 static void raspi_machine_class_init(MachineClass *mc, 330 uint32_t board_rev) 331 { 332 raspi_machine_class_common_init(mc, board_rev); 333 mc->init = raspi_machine_init; 334 }; 335 336 static void raspi0_machine_class_init(ObjectClass *oc, void *data) 337 { 338 MachineClass *mc = MACHINE_CLASS(oc); 339 RaspiBaseMachineClass *rmc = RASPI_BASE_MACHINE_CLASS(oc); 340 341 rmc->board_rev = 0x920092; /* Revision 1.2 */ 342 raspi_machine_class_init(mc, rmc->board_rev); 343 }; 344 345 static void raspi1ap_machine_class_init(ObjectClass *oc, void *data) 346 { 347 MachineClass *mc = MACHINE_CLASS(oc); 348 RaspiBaseMachineClass *rmc = RASPI_BASE_MACHINE_CLASS(oc); 349 350 rmc->board_rev = 0x900021; /* Revision 1.1 */ 351 raspi_machine_class_init(mc, rmc->board_rev); 352 }; 353 354 static void raspi2b_machine_class_init(ObjectClass *oc, void *data) 355 { 356 MachineClass *mc = MACHINE_CLASS(oc); 357 RaspiBaseMachineClass *rmc = RASPI_BASE_MACHINE_CLASS(oc); 358 359 rmc->board_rev = 0xa21041; 360 raspi_machine_class_init(mc, rmc->board_rev); 361 }; 362 363 #ifdef TARGET_AARCH64 364 static void raspi3ap_machine_class_init(ObjectClass *oc, void *data) 365 { 366 MachineClass *mc = MACHINE_CLASS(oc); 367 RaspiBaseMachineClass *rmc = RASPI_BASE_MACHINE_CLASS(oc); 368 369 rmc->board_rev = 0x9020e0; /* Revision 1.0 */ 370 raspi_machine_class_init(mc, rmc->board_rev); 371 }; 372 373 static void raspi3b_machine_class_init(ObjectClass *oc, void *data) 374 { 375 MachineClass *mc = MACHINE_CLASS(oc); 376 RaspiBaseMachineClass *rmc = RASPI_BASE_MACHINE_CLASS(oc); 377 378 rmc->board_rev = 0xa02082; 379 raspi_machine_class_init(mc, rmc->board_rev); 380 }; 381 #endif /* TARGET_AARCH64 */ 382 383 static const TypeInfo raspi_machine_types[] = { 384 { 385 .name = MACHINE_TYPE_NAME("raspi0"), 386 .parent = TYPE_RASPI_MACHINE, 387 .class_init = raspi0_machine_class_init, 388 }, { 389 .name = MACHINE_TYPE_NAME("raspi1ap"), 390 .parent = TYPE_RASPI_MACHINE, 391 .class_init = raspi1ap_machine_class_init, 392 }, { 393 .name = MACHINE_TYPE_NAME("raspi2b"), 394 .parent = TYPE_RASPI_MACHINE, 395 .class_init = raspi2b_machine_class_init, 396 #ifdef TARGET_AARCH64 397 }, { 398 .name = MACHINE_TYPE_NAME("raspi3ap"), 399 .parent = TYPE_RASPI_MACHINE, 400 .class_init = raspi3ap_machine_class_init, 401 }, { 402 .name = MACHINE_TYPE_NAME("raspi3b"), 403 .parent = TYPE_RASPI_MACHINE, 404 .class_init = raspi3b_machine_class_init, 405 #endif 406 }, { 407 .name = TYPE_RASPI_MACHINE, 408 .parent = TYPE_RASPI_BASE_MACHINE, 409 .instance_size = sizeof(RaspiMachineState), 410 .abstract = true, 411 }, { 412 .name = TYPE_RASPI_BASE_MACHINE, 413 .parent = TYPE_MACHINE, 414 .instance_size = sizeof(RaspiBaseMachineState), 415 .class_size = sizeof(RaspiBaseMachineClass), 416 .abstract = true, 417 } 418 }; 419 420 DEFINE_TYPES(raspi_machine_types) 421