1 /* omap_sx1.c Support for the Siemens SX1 smartphone emulation. 2 * 3 * Copyright (C) 2008 4 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 5 * Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com> 6 * 7 * based on PalmOne's (TM) PDAs support (palm.c) 8 */ 9 10 /* 11 * PalmOne's (TM) PDAs. 12 * 13 * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org> 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License along 26 * with this program; if not, see <http://www.gnu.org/licenses/>. 27 */ 28 #include "hw.h" 29 #include "console.h" 30 #include "omap.h" 31 #include "boards.h" 32 #include "arm-misc.h" 33 #include "flash.h" 34 #include "blockdev.h" 35 #include "exec-memory.h" 36 37 /*****************************************************************************/ 38 /* Siemens SX1 Cellphone V1 */ 39 /* - ARM OMAP310 processor 40 * - SRAM 192 kB 41 * - SDRAM 32 MB at 0x10000000 42 * - Boot flash 16 MB at 0x00000000 43 * - Application flash 8 MB at 0x04000000 44 * - 3 serial ports 45 * - 1 SecureDigital 46 * - 1 LCD display 47 * - 1 RTC 48 */ 49 50 /*****************************************************************************/ 51 /* Siemens SX1 Cellphone V2 */ 52 /* - ARM OMAP310 processor 53 * - SRAM 192 kB 54 * - SDRAM 32 MB at 0x10000000 55 * - Boot flash 32 MB at 0x00000000 56 * - 3 serial ports 57 * - 1 SecureDigital 58 * - 1 LCD display 59 * - 1 RTC 60 */ 61 62 static uint64_t static_read(void *opaque, target_phys_addr_t offset, 63 unsigned size) 64 { 65 uint32_t *val = (uint32_t *) opaque; 66 uint32_t mask = (4 / size) - 1; 67 68 return *val >> ((offset & mask) << 3); 69 } 70 71 static void static_write(void *opaque, target_phys_addr_t offset, 72 uint64_t value, unsigned size) 73 { 74 #ifdef SPY 75 printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n", 76 __func__, value, size, (int)offset); 77 #endif 78 } 79 80 static const MemoryRegionOps static_ops = { 81 .read = static_read, 82 .write = static_write, 83 .endianness = DEVICE_NATIVE_ENDIAN, 84 }; 85 86 #define sdram_size 0x02000000 87 #define sector_size (128 * 1024) 88 #define flash0_size (16 * 1024 * 1024) 89 #define flash1_size ( 8 * 1024 * 1024) 90 #define flash2_size (32 * 1024 * 1024) 91 #define total_ram_v1 (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE) 92 #define total_ram_v2 (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE) 93 94 static struct arm_boot_info sx1_binfo = { 95 .loader_start = OMAP_EMIFF_BASE, 96 .ram_size = sdram_size, 97 .board_id = 0x265, 98 }; 99 100 static void sx1_init(ram_addr_t ram_size, 101 const char *boot_device, 102 const char *kernel_filename, const char *kernel_cmdline, 103 const char *initrd_filename, const char *cpu_model, 104 const int version) 105 { 106 struct omap_mpu_state_s *cpu; 107 MemoryRegion *address_space = get_system_memory(); 108 MemoryRegion *flash = g_new(MemoryRegion, 1); 109 MemoryRegion *flash_1 = g_new(MemoryRegion, 1); 110 MemoryRegion *cs = g_new(MemoryRegion, 4); 111 static uint32_t cs0val = 0x00213090; 112 static uint32_t cs1val = 0x00215070; 113 static uint32_t cs2val = 0x00001139; 114 static uint32_t cs3val = 0x00001139; 115 DriveInfo *dinfo; 116 int fl_idx; 117 uint32_t flash_size = flash0_size; 118 int be; 119 120 if (version == 2) { 121 flash_size = flash2_size; 122 } 123 124 cpu = omap310_mpu_init(address_space, sx1_binfo.ram_size, cpu_model); 125 126 /* External Flash (EMIFS) */ 127 memory_region_init_ram(flash, "omap_sx1.flash0-0", flash_size); 128 vmstate_register_ram_global(flash); 129 memory_region_set_readonly(flash, true); 130 memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash); 131 132 memory_region_init_io(&cs[0], &static_ops, &cs0val, 133 "sx1.cs0", OMAP_CS0_SIZE - flash_size); 134 memory_region_add_subregion(address_space, 135 OMAP_CS0_BASE + flash_size, &cs[0]); 136 137 138 memory_region_init_io(&cs[2], &static_ops, &cs2val, 139 "sx1.cs2", OMAP_CS2_SIZE); 140 memory_region_add_subregion(address_space, 141 OMAP_CS2_BASE, &cs[2]); 142 143 memory_region_init_io(&cs[3], &static_ops, &cs3val, 144 "sx1.cs3", OMAP_CS3_SIZE); 145 memory_region_add_subregion(address_space, 146 OMAP_CS2_BASE, &cs[3]); 147 148 fl_idx = 0; 149 #ifdef TARGET_WORDS_BIGENDIAN 150 be = 1; 151 #else 152 be = 0; 153 #endif 154 155 if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { 156 if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL, 157 "omap_sx1.flash0-1", flash_size, 158 dinfo->bdrv, sector_size, 159 flash_size / sector_size, 160 4, 0, 0, 0, 0, be)) { 161 fprintf(stderr, "qemu: Error registering flash memory %d.\n", 162 fl_idx); 163 } 164 fl_idx++; 165 } 166 167 if ((version == 1) && 168 (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { 169 memory_region_init_ram(flash_1, "omap_sx1.flash1-0", flash1_size); 170 vmstate_register_ram_global(flash_1); 171 memory_region_set_readonly(flash_1, true); 172 memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1); 173 174 memory_region_init_io(&cs[1], &static_ops, &cs1val, 175 "sx1.cs1", OMAP_CS1_SIZE - flash1_size); 176 memory_region_add_subregion(address_space, 177 OMAP_CS1_BASE + flash1_size, &cs[1]); 178 179 if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL, 180 "omap_sx1.flash1-1", flash1_size, 181 dinfo->bdrv, sector_size, 182 flash1_size / sector_size, 183 4, 0, 0, 0, 0, be)) { 184 fprintf(stderr, "qemu: Error registering flash memory %d.\n", 185 fl_idx); 186 } 187 fl_idx++; 188 } else { 189 memory_region_init_io(&cs[1], &static_ops, &cs1val, 190 "sx1.cs1", OMAP_CS1_SIZE); 191 memory_region_add_subregion(address_space, 192 OMAP_CS1_BASE, &cs[1]); 193 } 194 195 if (!kernel_filename && !fl_idx) { 196 fprintf(stderr, "Kernel or Flash image must be specified\n"); 197 exit(1); 198 } 199 200 /* Load the kernel. */ 201 if (kernel_filename) { 202 sx1_binfo.kernel_filename = kernel_filename; 203 sx1_binfo.kernel_cmdline = kernel_cmdline; 204 sx1_binfo.initrd_filename = initrd_filename; 205 arm_load_kernel(&cpu->cpu->env, &sx1_binfo); 206 } 207 208 /* TODO: fix next line */ 209 //~ qemu_console_resize(ds, 640, 480); 210 } 211 212 static void sx1_init_v1(ram_addr_t ram_size, 213 const char *boot_device, 214 const char *kernel_filename, const char *kernel_cmdline, 215 const char *initrd_filename, const char *cpu_model) 216 { 217 sx1_init(ram_size, boot_device, kernel_filename, 218 kernel_cmdline, initrd_filename, cpu_model, 1); 219 } 220 221 static void sx1_init_v2(ram_addr_t ram_size, 222 const char *boot_device, 223 const char *kernel_filename, const char *kernel_cmdline, 224 const char *initrd_filename, const char *cpu_model) 225 { 226 sx1_init(ram_size, boot_device, kernel_filename, 227 kernel_cmdline, initrd_filename, cpu_model, 2); 228 } 229 230 static QEMUMachine sx1_machine_v2 = { 231 .name = "sx1", 232 .desc = "Siemens SX1 (OMAP310) V2", 233 .init = sx1_init_v2, 234 }; 235 236 static QEMUMachine sx1_machine_v1 = { 237 .name = "sx1-v1", 238 .desc = "Siemens SX1 (OMAP310) V1", 239 .init = sx1_init_v1, 240 }; 241 242 static void sx1_machine_init(void) 243 { 244 qemu_register_machine(&sx1_machine_v2); 245 qemu_register_machine(&sx1_machine_v1); 246 } 247 248 machine_init(sx1_machine_init); 249