xref: /qemu/hw/arm/npcm7xx_boards.c (revision d1cb5eda67a0a6188608bef6372fd046fc447bf1)
1 /*
2  * Machine definitions for boards featuring an NPCM7xx SoC.
3  *
4  * Copyright 2020 Google LLC
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License as published by the
8  * Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14  * for more details.
15  */
16 
17 #include "qemu/osdep.h"
18 
19 #include "exec/address-spaces.h"
20 #include "hw/arm/npcm7xx.h"
21 #include "hw/core/cpu.h"
22 #include "qapi/error.h"
23 #include "qemu/units.h"
24 
25 #define NPCM750_EVB_POWER_ON_STRAPS 0x00001ff7
26 #define QUANTA_GSJ_POWER_ON_STRAPS 0x00001fff
27 
28 static void npcm7xx_connect_dram(NPCM7xxState *soc, MemoryRegion *dram)
29 {
30     memory_region_add_subregion(get_system_memory(), NPCM7XX_DRAM_BA, dram);
31 
32     object_property_set_link(OBJECT(soc), "dram-mr", OBJECT(dram),
33                              &error_abort);
34 }
35 
36 static NPCM7xxState *npcm7xx_create_soc(MachineState *machine,
37                                         uint32_t hw_straps)
38 {
39     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine);
40     MachineClass *mc = &nmc->parent;
41     Object *obj;
42 
43     if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
44         error_report("This board can only be used with %s",
45                      mc->default_cpu_type);
46         exit(1);
47     }
48 
49     obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc",
50                                 &error_abort, NULL);
51     object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort);
52 
53     return NPCM7XX(obj);
54 }
55 
56 static void npcm750_evb_init(MachineState *machine)
57 {
58     NPCM7xxState *soc;
59 
60     soc = npcm7xx_create_soc(machine, NPCM750_EVB_POWER_ON_STRAPS);
61     npcm7xx_connect_dram(soc, machine->ram);
62     qdev_realize(DEVICE(soc), NULL, &error_fatal);
63 
64     npcm7xx_load_kernel(machine, soc);
65 }
66 
67 static void quanta_gsj_init(MachineState *machine)
68 {
69     NPCM7xxState *soc;
70 
71     soc = npcm7xx_create_soc(machine, QUANTA_GSJ_POWER_ON_STRAPS);
72     npcm7xx_connect_dram(soc, machine->ram);
73     qdev_realize(DEVICE(soc), NULL, &error_fatal);
74 
75     npcm7xx_load_kernel(machine, soc);
76 }
77 
78 static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type)
79 {
80     NPCM7xxClass *sc = NPCM7XX_CLASS(object_class_by_name(type));
81     MachineClass *mc = MACHINE_CLASS(nmc);
82 
83     nmc->soc_type = type;
84     mc->default_cpus = mc->min_cpus = mc->max_cpus = sc->num_cpus;
85 }
86 
87 static void npcm7xx_machine_class_init(ObjectClass *oc, void *data)
88 {
89     MachineClass *mc = MACHINE_CLASS(oc);
90 
91     mc->no_floppy = 1;
92     mc->no_cdrom = 1;
93     mc->no_parallel = 1;
94     mc->default_ram_id = "ram";
95     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
96 }
97 
98 /*
99  * Schematics:
100  * https://github.com/Nuvoton-Israel/nuvoton-info/blob/master/npcm7xx-poleg/evaluation-board/board_deliverables/NPCM750x_EB_ver.A1.1_COMPLETE.pdf
101  */
102 static void npcm750_evb_machine_class_init(ObjectClass *oc, void *data)
103 {
104     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
105     MachineClass *mc = MACHINE_CLASS(oc);
106 
107     npcm7xx_set_soc_type(nmc, TYPE_NPCM750);
108 
109     mc->desc = "Nuvoton NPCM750 Evaluation Board (Cortex A9)";
110     mc->init = npcm750_evb_init;
111     mc->default_ram_size = 512 * MiB;
112 };
113 
114 static void gsj_machine_class_init(ObjectClass *oc, void *data)
115 {
116     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
117     MachineClass *mc = MACHINE_CLASS(oc);
118 
119     npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
120 
121     mc->desc = "Quanta GSJ (Cortex A9)";
122     mc->init = quanta_gsj_init;
123     mc->default_ram_size = 512 * MiB;
124 };
125 
126 static const TypeInfo npcm7xx_machine_types[] = {
127     {
128         .name           = TYPE_NPCM7XX_MACHINE,
129         .parent         = TYPE_MACHINE,
130         .instance_size  = sizeof(NPCM7xxMachine),
131         .class_size     = sizeof(NPCM7xxMachineClass),
132         .class_init     = npcm7xx_machine_class_init,
133         .abstract       = true,
134     }, {
135         .name           = MACHINE_TYPE_NAME("npcm750-evb"),
136         .parent         = TYPE_NPCM7XX_MACHINE,
137         .class_init     = npcm750_evb_machine_class_init,
138     }, {
139         .name           = MACHINE_TYPE_NAME("quanta-gsj"),
140         .parent         = TYPE_NPCM7XX_MACHINE,
141         .class_init     = gsj_machine_class_init,
142     },
143 };
144 
145 DEFINE_TYPES(npcm7xx_machine_types)
146