16d262dcbSSubbaraya Sundeep /* 26d262dcbSSubbaraya Sundeep * SmartFusion2 SOM starter kit(from Emcraft) emulation. 36d262dcbSSubbaraya Sundeep * 4a7f16aedSPhilippe Mathieu-Daudé * M2S-FG484 SOM hardware architecture specification: 5a7f16aedSPhilippe Mathieu-Daudé * https://www.emcraft.com/jdownloads/som/m2s/m2s-som-ha.pdf 6a7f16aedSPhilippe Mathieu-Daudé * 76d262dcbSSubbaraya Sundeep * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com> 86d262dcbSSubbaraya Sundeep * 96d262dcbSSubbaraya Sundeep * Permission is hereby granted, free of charge, to any person obtaining a copy 106d262dcbSSubbaraya Sundeep * of this software and associated documentation files (the "Software"), to deal 116d262dcbSSubbaraya Sundeep * in the Software without restriction, including without limitation the rights 126d262dcbSSubbaraya Sundeep * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 136d262dcbSSubbaraya Sundeep * copies of the Software, and to permit persons to whom the Software is 146d262dcbSSubbaraya Sundeep * furnished to do so, subject to the following conditions: 156d262dcbSSubbaraya Sundeep * 166d262dcbSSubbaraya Sundeep * The above copyright notice and this permission notice shall be included in 176d262dcbSSubbaraya Sundeep * all copies or substantial portions of the Software. 186d262dcbSSubbaraya Sundeep * 196d262dcbSSubbaraya Sundeep * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 206d262dcbSSubbaraya Sundeep * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 216d262dcbSSubbaraya Sundeep * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 226d262dcbSSubbaraya Sundeep * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 236d262dcbSSubbaraya Sundeep * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 246d262dcbSSubbaraya Sundeep * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 256d262dcbSSubbaraya Sundeep * THE SOFTWARE. 266d262dcbSSubbaraya Sundeep */ 276d262dcbSSubbaraya Sundeep 286d262dcbSSubbaraya Sundeep #include "qemu/osdep.h" 29fc6b3cf9SPhilippe Mathieu-Daudé #include "qemu/units.h" 306d262dcbSSubbaraya Sundeep #include "qapi/error.h" 316d262dcbSSubbaraya Sundeep #include "qemu/error-report.h" 326d262dcbSSubbaraya Sundeep #include "hw/boards.h" 33a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 3412ec8bd5SPeter Maydell #include "hw/arm/boot.h" 359bfaf375SPeter Maydell #include "hw/qdev-clock.h" 366d262dcbSSubbaraya Sundeep #include "exec/address-spaces.h" 376d262dcbSSubbaraya Sundeep #include "hw/arm/msf2-soc.h" 386d262dcbSSubbaraya Sundeep 396d262dcbSSubbaraya Sundeep #define DDR_BASE_ADDRESS 0xA0000000 40d23b6caaSPhilippe Mathieu-Daudé #define DDR_SIZE (64 * MiB) 416d262dcbSSubbaraya Sundeep 42d23b6caaSPhilippe Mathieu-Daudé #define M2S010_ENVM_SIZE (256 * KiB) 43d23b6caaSPhilippe Mathieu-Daudé #define M2S010_ESRAM_SIZE (64 * KiB) 446d262dcbSSubbaraya Sundeep 456d262dcbSSubbaraya Sundeep static void emcraft_sf2_s2s010_init(MachineState *machine) 466d262dcbSSubbaraya Sundeep { 476d262dcbSSubbaraya Sundeep DeviceState *dev; 486d262dcbSSubbaraya Sundeep DeviceState *spi_flash; 496d262dcbSSubbaraya Sundeep MSF2State *soc; 506d262dcbSSubbaraya Sundeep MachineClass *mc = MACHINE_GET_CLASS(machine); 5164eaa820SMarkus Armbruster DriveInfo *dinfo = drive_get(IF_MTD, 0, 0); 526d262dcbSSubbaraya Sundeep qemu_irq cs_line; 5357d479c9SMarkus Armbruster BusState *spi_bus; 546d262dcbSSubbaraya Sundeep MemoryRegion *sysmem = get_system_memory(); 556d262dcbSSubbaraya Sundeep MemoryRegion *ddr = g_new(MemoryRegion, 1); 569bfaf375SPeter Maydell Clock *m3clk; 576d262dcbSSubbaraya Sundeep 586d262dcbSSubbaraya Sundeep memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE, 596d262dcbSSubbaraya Sundeep &error_fatal); 606d262dcbSSubbaraya Sundeep memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr); 616d262dcbSSubbaraya Sundeep 623e80f690SMarkus Armbruster dev = qdev_new(TYPE_MSF2_SOC); 63*f503bc4bSPhilippe Mathieu-Daudé object_property_add_child(OBJECT(machine), "soc", OBJECT(dev)); 646d262dcbSSubbaraya Sundeep qdev_prop_set_string(dev, "part-name", "M2S010"); 656d262dcbSSubbaraya Sundeep qdev_prop_set_string(dev, "cpu-type", mc->default_cpu_type); 666d262dcbSSubbaraya Sundeep 676d262dcbSSubbaraya Sundeep qdev_prop_set_uint64(dev, "eNVM-size", M2S010_ENVM_SIZE); 686d262dcbSSubbaraya Sundeep qdev_prop_set_uint64(dev, "eSRAM-size", M2S010_ESRAM_SIZE); 696d262dcbSSubbaraya Sundeep 706d262dcbSSubbaraya Sundeep /* 716d262dcbSSubbaraya Sundeep * CPU clock and peripheral clocks(APB0, APB1)are configurable 726d262dcbSSubbaraya Sundeep * in Libero. CPU clock is divided by APB0 and APB1 divisors for 736d262dcbSSubbaraya Sundeep * peripherals. Emcraft's SoM kit comes with these settings by default. 746d262dcbSSubbaraya Sundeep */ 759bfaf375SPeter Maydell /* This clock doesn't need migration because it is fixed-frequency */ 769bfaf375SPeter Maydell m3clk = clock_new(OBJECT(machine), "m3clk"); 779bfaf375SPeter Maydell clock_set_hz(m3clk, 142 * 1000000); 789bfaf375SPeter Maydell qdev_connect_clock_in(dev, "m3clk", m3clk); 796d262dcbSSubbaraya Sundeep qdev_prop_set_uint32(dev, "apb0div", 2); 806d262dcbSSubbaraya Sundeep qdev_prop_set_uint32(dev, "apb1div", 2); 816d262dcbSSubbaraya Sundeep 823c6ef471SMarkus Armbruster sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 836d262dcbSSubbaraya Sundeep 846d262dcbSSubbaraya Sundeep soc = MSF2_SOC(dev); 856d262dcbSSubbaraya Sundeep 866d262dcbSSubbaraya Sundeep /* Attach SPI flash to SPI0 controller */ 8757d479c9SMarkus Armbruster spi_bus = qdev_get_child_bus(dev, "spi0"); 88a7f16aedSPhilippe Mathieu-Daudé spi_flash = qdev_new("s25sl12801"); /* Spansion S25FL128SDPBHICO */ 896d262dcbSSubbaraya Sundeep qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1); 906d262dcbSSubbaraya Sundeep if (dinfo) { 91934df912SMarkus Armbruster qdev_prop_set_drive_err(spi_flash, "drive", 92934df912SMarkus Armbruster blk_by_legacy_dinfo(dinfo), &error_fatal); 936d262dcbSSubbaraya Sundeep } 9457d479c9SMarkus Armbruster qdev_realize_and_unref(spi_flash, spi_bus, &error_fatal); 956d262dcbSSubbaraya Sundeep cs_line = qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0); 966d262dcbSSubbaraya Sundeep sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line); 976d262dcbSSubbaraya Sundeep 986d262dcbSSubbaraya Sundeep armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, 99761c532aSPeter Maydell 0, soc->envm_size); 1006d262dcbSSubbaraya Sundeep } 1016d262dcbSSubbaraya Sundeep 1026d262dcbSSubbaraya Sundeep static void emcraft_sf2_machine_init(MachineClass *mc) 1036d262dcbSSubbaraya Sundeep { 1043e71f4a7SGavin Shan static const char * const valid_cpu_types[] = { 1053e71f4a7SGavin Shan ARM_CPU_TYPE_NAME("cortex-m3"), 1063e71f4a7SGavin Shan NULL 1073e71f4a7SGavin Shan }; 1083e71f4a7SGavin Shan 1096d262dcbSSubbaraya Sundeep mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)"; 1106d262dcbSSubbaraya Sundeep mc->init = emcraft_sf2_s2s010_init; 1116d262dcbSSubbaraya Sundeep mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); 1123e71f4a7SGavin Shan mc->valid_cpu_types = valid_cpu_types; 1136d262dcbSSubbaraya Sundeep } 1146d262dcbSSubbaraya Sundeep 1156d262dcbSSubbaraya Sundeep DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init) 116