xref: /qemu/hw/arm/msf2-som.c (revision 64eaa8209597a580c026d4891c072723a38ff0a6)
16d262dcbSSubbaraya Sundeep /*
26d262dcbSSubbaraya Sundeep  * SmartFusion2 SOM starter kit(from Emcraft) emulation.
36d262dcbSSubbaraya Sundeep  *
46d262dcbSSubbaraya Sundeep  * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
56d262dcbSSubbaraya Sundeep  *
66d262dcbSSubbaraya Sundeep  * Permission is hereby granted, free of charge, to any person obtaining a copy
76d262dcbSSubbaraya Sundeep  * of this software and associated documentation files (the "Software"), to deal
86d262dcbSSubbaraya Sundeep  * in the Software without restriction, including without limitation the rights
96d262dcbSSubbaraya Sundeep  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
106d262dcbSSubbaraya Sundeep  * copies of the Software, and to permit persons to whom the Software is
116d262dcbSSubbaraya Sundeep  * furnished to do so, subject to the following conditions:
126d262dcbSSubbaraya Sundeep  *
136d262dcbSSubbaraya Sundeep  * The above copyright notice and this permission notice shall be included in
146d262dcbSSubbaraya Sundeep  * all copies or substantial portions of the Software.
156d262dcbSSubbaraya Sundeep  *
166d262dcbSSubbaraya Sundeep  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
176d262dcbSSubbaraya Sundeep  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
186d262dcbSSubbaraya Sundeep  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
196d262dcbSSubbaraya Sundeep  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
206d262dcbSSubbaraya Sundeep  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
216d262dcbSSubbaraya Sundeep  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
226d262dcbSSubbaraya Sundeep  * THE SOFTWARE.
236d262dcbSSubbaraya Sundeep  */
246d262dcbSSubbaraya Sundeep 
256d262dcbSSubbaraya Sundeep #include "qemu/osdep.h"
26fc6b3cf9SPhilippe Mathieu-Daudé #include "qemu/units.h"
276d262dcbSSubbaraya Sundeep #include "qapi/error.h"
286d262dcbSSubbaraya Sundeep #include "qemu/error-report.h"
296d262dcbSSubbaraya Sundeep #include "hw/boards.h"
30a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h"
3112ec8bd5SPeter Maydell #include "hw/arm/boot.h"
329bfaf375SPeter Maydell #include "hw/qdev-clock.h"
336d262dcbSSubbaraya Sundeep #include "exec/address-spaces.h"
346d262dcbSSubbaraya Sundeep #include "hw/arm/msf2-soc.h"
356d262dcbSSubbaraya Sundeep 
366d262dcbSSubbaraya Sundeep #define DDR_BASE_ADDRESS      0xA0000000
37d23b6caaSPhilippe Mathieu-Daudé #define DDR_SIZE              (64 * MiB)
386d262dcbSSubbaraya Sundeep 
39d23b6caaSPhilippe Mathieu-Daudé #define M2S010_ENVM_SIZE      (256 * KiB)
40d23b6caaSPhilippe Mathieu-Daudé #define M2S010_ESRAM_SIZE     (64 * KiB)
416d262dcbSSubbaraya Sundeep 
426d262dcbSSubbaraya Sundeep static void emcraft_sf2_s2s010_init(MachineState *machine)
436d262dcbSSubbaraya Sundeep {
446d262dcbSSubbaraya Sundeep     DeviceState *dev;
456d262dcbSSubbaraya Sundeep     DeviceState *spi_flash;
466d262dcbSSubbaraya Sundeep     MSF2State *soc;
476d262dcbSSubbaraya Sundeep     MachineClass *mc = MACHINE_GET_CLASS(machine);
48*64eaa820SMarkus Armbruster     DriveInfo *dinfo = drive_get(IF_MTD, 0, 0);
496d262dcbSSubbaraya Sundeep     qemu_irq cs_line;
5057d479c9SMarkus Armbruster     BusState *spi_bus;
516d262dcbSSubbaraya Sundeep     MemoryRegion *sysmem = get_system_memory();
526d262dcbSSubbaraya Sundeep     MemoryRegion *ddr = g_new(MemoryRegion, 1);
539bfaf375SPeter Maydell     Clock *m3clk;
546d262dcbSSubbaraya Sundeep 
556d262dcbSSubbaraya Sundeep     if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
566d262dcbSSubbaraya Sundeep         error_report("This board can only be used with CPU %s",
576d262dcbSSubbaraya Sundeep                      mc->default_cpu_type);
58dd97ef04SPhilippe Mathieu-Daudé         exit(1);
596d262dcbSSubbaraya Sundeep     }
606d262dcbSSubbaraya Sundeep 
616d262dcbSSubbaraya Sundeep     memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE,
626d262dcbSSubbaraya Sundeep                            &error_fatal);
636d262dcbSSubbaraya Sundeep     memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr);
646d262dcbSSubbaraya Sundeep 
653e80f690SMarkus Armbruster     dev = qdev_new(TYPE_MSF2_SOC);
666d262dcbSSubbaraya Sundeep     qdev_prop_set_string(dev, "part-name", "M2S010");
676d262dcbSSubbaraya Sundeep     qdev_prop_set_string(dev, "cpu-type", mc->default_cpu_type);
686d262dcbSSubbaraya Sundeep 
696d262dcbSSubbaraya Sundeep     qdev_prop_set_uint64(dev, "eNVM-size", M2S010_ENVM_SIZE);
706d262dcbSSubbaraya Sundeep     qdev_prop_set_uint64(dev, "eSRAM-size", M2S010_ESRAM_SIZE);
716d262dcbSSubbaraya Sundeep 
726d262dcbSSubbaraya Sundeep     /*
736d262dcbSSubbaraya Sundeep      * CPU clock and peripheral clocks(APB0, APB1)are configurable
746d262dcbSSubbaraya Sundeep      * in Libero. CPU clock is divided by APB0 and APB1 divisors for
756d262dcbSSubbaraya Sundeep      * peripherals. Emcraft's SoM kit comes with these settings by default.
766d262dcbSSubbaraya Sundeep      */
779bfaf375SPeter Maydell     /* This clock doesn't need migration because it is fixed-frequency */
789bfaf375SPeter Maydell     m3clk = clock_new(OBJECT(machine), "m3clk");
799bfaf375SPeter Maydell     clock_set_hz(m3clk, 142 * 1000000);
809bfaf375SPeter Maydell     qdev_connect_clock_in(dev, "m3clk", m3clk);
816d262dcbSSubbaraya Sundeep     qdev_prop_set_uint32(dev, "apb0div", 2);
826d262dcbSSubbaraya Sundeep     qdev_prop_set_uint32(dev, "apb1div", 2);
836d262dcbSSubbaraya Sundeep 
843c6ef471SMarkus Armbruster     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
856d262dcbSSubbaraya Sundeep 
866d262dcbSSubbaraya Sundeep     soc = MSF2_SOC(dev);
876d262dcbSSubbaraya Sundeep 
886d262dcbSSubbaraya Sundeep     /* Attach SPI flash to SPI0 controller */
8957d479c9SMarkus Armbruster     spi_bus = qdev_get_child_bus(dev, "spi0");
9057d479c9SMarkus Armbruster     spi_flash = qdev_new("s25sl12801");
916d262dcbSSubbaraya Sundeep     qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1);
926d262dcbSSubbaraya Sundeep     if (dinfo) {
93934df912SMarkus Armbruster         qdev_prop_set_drive_err(spi_flash, "drive",
94934df912SMarkus Armbruster                                 blk_by_legacy_dinfo(dinfo), &error_fatal);
956d262dcbSSubbaraya Sundeep     }
9657d479c9SMarkus Armbruster     qdev_realize_and_unref(spi_flash, spi_bus, &error_fatal);
976d262dcbSSubbaraya Sundeep     cs_line = qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0);
986d262dcbSSubbaraya Sundeep     sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line);
996d262dcbSSubbaraya Sundeep 
1006d262dcbSSubbaraya Sundeep     armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
1016d262dcbSSubbaraya Sundeep                        soc->envm_size);
1026d262dcbSSubbaraya Sundeep }
1036d262dcbSSubbaraya Sundeep 
1046d262dcbSSubbaraya Sundeep static void emcraft_sf2_machine_init(MachineClass *mc)
1056d262dcbSSubbaraya Sundeep {
1066d262dcbSSubbaraya Sundeep     mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)";
1076d262dcbSSubbaraya Sundeep     mc->init = emcraft_sf2_s2s010_init;
1086d262dcbSSubbaraya Sundeep     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
1096d262dcbSSubbaraya Sundeep }
1106d262dcbSSubbaraya Sundeep 
1116d262dcbSSubbaraya Sundeep DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init)
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