1 /*
2 * NXP i.MX 8M Plus Evaluation Kit System Emulation
3 *
4 * Copyright (c) 2024, Bernhard Beschow <shentey@gmail.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
8
9 #include "qemu/osdep.h"
10 #include "system/address-spaces.h"
11 #include "hw/arm/boot.h"
12 #include "hw/arm/fsl-imx8mp.h"
13 #include "hw/boards.h"
14 #include "hw/qdev-properties.h"
15 #include "system/qtest.h"
16 #include "qemu/error-report.h"
17 #include "qapi/error.h"
18 #include <libfdt.h>
19
imx8mp_evk_modify_dtb(const struct arm_boot_info * info,void * fdt)20 static void imx8mp_evk_modify_dtb(const struct arm_boot_info *info, void *fdt)
21 {
22 int i, offset;
23
24 /* Temporarily disable following nodes until they are implemented */
25 const char *nodes_to_remove[] = {
26 "nxp,imx8mp-fspi",
27 };
28
29 for (i = 0; i < ARRAY_SIZE(nodes_to_remove); i++) {
30 const char *dev_str = nodes_to_remove[i];
31
32 offset = fdt_node_offset_by_compatible(fdt, -1, dev_str);
33 while (offset >= 0) {
34 fdt_nop_node(fdt, offset);
35 offset = fdt_node_offset_by_compatible(fdt, offset, dev_str);
36 }
37 }
38
39 /* Remove cpu-idle-states property from CPU nodes */
40 offset = fdt_node_offset_by_compatible(fdt, -1, "arm,cortex-a53");
41 while (offset >= 0) {
42 fdt_nop_property(fdt, offset, "cpu-idle-states");
43 offset = fdt_node_offset_by_compatible(fdt, offset, "arm,cortex-a53");
44 }
45 }
46
imx8mp_evk_init(MachineState * machine)47 static void imx8mp_evk_init(MachineState *machine)
48 {
49 static struct arm_boot_info boot_info;
50 FslImx8mpState *s;
51
52 if (machine->ram_size > FSL_IMX8MP_RAM_SIZE_MAX) {
53 error_report("RAM size " RAM_ADDR_FMT " above max supported (%08" PRIx64 ")",
54 machine->ram_size, FSL_IMX8MP_RAM_SIZE_MAX);
55 exit(1);
56 }
57
58 boot_info = (struct arm_boot_info) {
59 .loader_start = FSL_IMX8MP_RAM_START,
60 .board_id = -1,
61 .ram_size = machine->ram_size,
62 .psci_conduit = QEMU_PSCI_CONDUIT_SMC,
63 .modify_dtb = imx8mp_evk_modify_dtb,
64 };
65
66 s = FSL_IMX8MP(object_new(TYPE_FSL_IMX8MP));
67 object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
68 object_property_set_uint(OBJECT(s), "fec1-phy-num", 1, &error_fatal);
69 sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal);
70
71 memory_region_add_subregion(get_system_memory(), FSL_IMX8MP_RAM_START,
72 machine->ram);
73
74 for (int i = 0; i < FSL_IMX8MP_NUM_USDHCS; i++) {
75 BusState *bus;
76 DeviceState *carddev;
77 BlockBackend *blk;
78 DriveInfo *di = drive_get(IF_SD, i, 0);
79
80 if (!di) {
81 continue;
82 }
83
84 blk = blk_by_legacy_dinfo(di);
85 bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus");
86 carddev = qdev_new(TYPE_SD_CARD);
87 qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
88 qdev_realize_and_unref(carddev, bus, &error_fatal);
89 }
90
91 if (!qtest_enabled()) {
92 arm_load_kernel(&s->cpu[0], machine, &boot_info);
93 }
94 }
95
imx8mp_evk_machine_init(MachineClass * mc)96 static void imx8mp_evk_machine_init(MachineClass *mc)
97 {
98 mc->desc = "NXP i.MX 8M Plus EVK Board";
99 mc->init = imx8mp_evk_init;
100 mc->max_cpus = FSL_IMX8MP_NUM_CPUS;
101 mc->default_ram_id = "imx8mp-evk.ram";
102 }
103 DEFINE_MACHINE("imx8mp-evk", imx8mp_evk_machine_init)
104