xref: /qemu/hw/arm/exynos4_boards.c (revision ead62c75f618c072a3a18221fd03ae99ae923cca)
1 /*
2  *  Samsung exynos4 SoC based boards emulation
3  *
4  *  Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
5  *    Maksim Kozlov <m.kozlov@samsung.com>
6  *    Evgeny Voevodin <e.voevodin@samsung.com>
7  *    Igor Mitsyanko  <i.mitsyanko@samsung.com>
8  *
9  *  This program is free software; you can redistribute it and/or modify it
10  *  under the terms of the GNU General Public License as published by the
11  *  Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful, but WITHOUT
15  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17  *  for more details.
18  *
19  *  You should have received a copy of the GNU General Public License along
20  *  with this program; if not, see <http://www.gnu.org/licenses/>.
21  *
22  */
23 
24 #include "qemu/osdep.h"
25 #include "qemu/units.h"
26 #include "qapi/error.h"
27 #include "qemu/error-report.h"
28 #include "cpu.h"
29 #include "hw/sysbus.h"
30 #include "net/net.h"
31 #include "hw/arm/boot.h"
32 #include "exec/address-spaces.h"
33 #include "hw/arm/exynos4210.h"
34 #include "hw/net/lan9118.h"
35 #include "hw/qdev-properties.h"
36 #include "hw/boards.h"
37 #include "hw/irq.h"
38 
39 #define SMDK_LAN9118_BASE_ADDR      0x05000000
40 
41 typedef enum Exynos4BoardType {
42     EXYNOS4_BOARD_NURI,
43     EXYNOS4_BOARD_SMDKC210,
44     EXYNOS4_NUM_OF_BOARDS
45 } Exynos4BoardType;
46 
47 typedef struct Exynos4BoardState {
48     Exynos4210State soc;
49     MemoryRegion dram0_mem;
50     MemoryRegion dram1_mem;
51 } Exynos4BoardState;
52 
53 static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = {
54     [EXYNOS4_BOARD_NURI]     = 0xD33,
55     [EXYNOS4_BOARD_SMDKC210] = 0xB16,
56 };
57 
58 static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
59     [EXYNOS4_BOARD_NURI]     = EXYNOS4210_SECOND_CPU_BOOTREG,
60     [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG,
61 };
62 
63 static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
64     [EXYNOS4_BOARD_NURI]     = 1 * GiB,
65     [EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
66 };
67 
68 static struct arm_boot_info exynos4_board_binfo = {
69     .loader_start     = EXYNOS4210_BASE_BOOT_ADDR,
70     .smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR,
71     .nb_cpus          = EXYNOS4210_NCPUS,
72     .write_secondary_boot = exynos4210_write_secondary,
73 };
74 
75 static void lan9215_init(uint32_t base, qemu_irq irq)
76 {
77     DeviceState *dev;
78     SysBusDevice *s;
79 
80     /* This should be a 9215 but the 9118 is close enough */
81     if (nd_table[0].used) {
82         qemu_check_nic_model(&nd_table[0], "lan9118");
83         dev = qdev_new(TYPE_LAN9118);
84         qdev_set_nic_properties(dev, &nd_table[0]);
85         qdev_prop_set_uint32(dev, "mode_16bit", 1);
86         s = SYS_BUS_DEVICE(dev);
87         sysbus_realize_and_unref(s, &error_fatal);
88         sysbus_mmio_map(s, 0, base);
89         sysbus_connect_irq(s, 0, irq);
90     }
91 }
92 
93 static void exynos4_boards_init_ram(Exynos4BoardState *s,
94                                     MemoryRegion *system_mem,
95                                     unsigned long ram_size)
96 {
97     unsigned long mem_size = ram_size;
98 
99     if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
100         memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
101                                mem_size - EXYNOS4210_DRAM_MAX_SIZE,
102                                &error_fatal);
103         memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
104                                     &s->dram1_mem);
105         mem_size = EXYNOS4210_DRAM_MAX_SIZE;
106     }
107 
108     memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
109                            &error_fatal);
110     memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
111                                 &s->dram0_mem);
112 }
113 
114 static Exynos4BoardState *
115 exynos4_boards_init_common(MachineState *machine,
116                            Exynos4BoardType board_type)
117 {
118     Exynos4BoardState *s = g_new(Exynos4BoardState, 1);
119 
120     exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type];
121     exynos4_board_binfo.board_id = exynos4_board_id[board_type];
122     exynos4_board_binfo.smp_bootreg_addr =
123             exynos4_board_smp_bootreg_addr[board_type];
124     exynos4_board_binfo.gic_cpu_if_addr =
125             EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
126 
127     exynos4_boards_init_ram(s, get_system_memory(),
128                             exynos4_board_ram_size[board_type]);
129 
130     object_initialize_child(OBJECT(machine), "soc", &s->soc,
131                             TYPE_EXYNOS4210_SOC);
132     sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
133 
134     return s;
135 }
136 
137 static void nuri_init(MachineState *machine)
138 {
139     exynos4_boards_init_common(machine, EXYNOS4_BOARD_NURI);
140 
141     arm_load_kernel(ARM_CPU(first_cpu), machine, &exynos4_board_binfo);
142 }
143 
144 static void smdkc210_init(MachineState *machine)
145 {
146     Exynos4BoardState *s = exynos4_boards_init_common(machine,
147                                                       EXYNOS4_BOARD_SMDKC210);
148 
149     lan9215_init(SMDK_LAN9118_BASE_ADDR,
150             qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
151     arm_load_kernel(ARM_CPU(first_cpu), machine, &exynos4_board_binfo);
152 }
153 
154 static void nuri_class_init(ObjectClass *oc, void *data)
155 {
156     MachineClass *mc = MACHINE_CLASS(oc);
157 
158     mc->desc = "Samsung NURI board (Exynos4210)";
159     mc->init = nuri_init;
160     mc->max_cpus = EXYNOS4210_NCPUS;
161     mc->min_cpus = EXYNOS4210_NCPUS;
162     mc->default_cpus = EXYNOS4210_NCPUS;
163     mc->ignore_memory_transaction_failures = true;
164 }
165 
166 static const TypeInfo nuri_type = {
167     .name = MACHINE_TYPE_NAME("nuri"),
168     .parent = TYPE_MACHINE,
169     .class_init = nuri_class_init,
170 };
171 
172 static void smdkc210_class_init(ObjectClass *oc, void *data)
173 {
174     MachineClass *mc = MACHINE_CLASS(oc);
175 
176     mc->desc = "Samsung SMDKC210 board (Exynos4210)";
177     mc->init = smdkc210_init;
178     mc->max_cpus = EXYNOS4210_NCPUS;
179     mc->min_cpus = EXYNOS4210_NCPUS;
180     mc->default_cpus = EXYNOS4210_NCPUS;
181     mc->ignore_memory_transaction_failures = true;
182 }
183 
184 static const TypeInfo smdkc210_type = {
185     .name = MACHINE_TYPE_NAME("smdkc210"),
186     .parent = TYPE_MACHINE,
187     .class_init = smdkc210_class_init,
188 };
189 
190 static void exynos4_machines_init(void)
191 {
192     type_register_static(&nuri_type);
193     type_register_static(&smdkc210_type);
194 }
195 
196 type_init(exynos4_machines_init)
197